CD54ACT113A [INTERSIL]

Dual “J-K” Flip-Flop with Set and Reset; 双“ J- K”触发器具有​​置位和复位
CD54ACT113A
型号: CD54ACT113A
厂家: Intersil    Intersil
描述:

Dual “J-K” Flip-Flop with Set and Reset
双“ J- K”触发器具有​​置位和复位

触发器
文件: 总2页 (文件大小:18K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CD54AC112/3A  
CD54ACT112/3A  
S E M I C O N D U C T O R  
COMPLETE DATA SHEET  
COMING SOON!  
Dual “J-K” Flip-Flop with Set and Reset  
June 1997  
Description  
Functional Diagram  
4
The CD54AC112/3A and CD54ACT112/3A are dual “J-K”  
flip-flops with set and reset that utilize the Harris Advanced  
CMOS Logic technology. These flip-flops have independent  
J, K, Set, Reset and Clock inputs and Q and Q outputs. The  
CD54AC112/3A and CD54ACT112/3A changes state on the  
negative-going transition of the clock. Set and Reset are  
accomplished asynchronously by low-level inputs.  
1S  
3
5
1J  
1Q  
2
FF 1  
6
1K  
1Q  
1
1CP  
1R  
15  
The CD54AC112/3A and CD54ACT112/3A are supplied in  
16 lead dual-in-line ceramic packages (F suffix).  
10  
2S  
11  
12  
ACT INPUT LOAD TABLE  
9
7
2J  
2Q  
2Q  
INPUT  
J, CP, CP  
K
UNIT LOAD (NOTE 1)  
FF 2  
2K  
1
13  
14  
2CP  
2R  
0.53  
0.58  
GND = 8  
CC = 16  
V
S, R  
NOTE:  
1. Unit load is I limit specified in DC Electrical Specifications  
CC  
o
Table, e.g., 2.4mA Max at +25 C.  
Absolute Maximum Ratings  
DC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6V  
Power Dissipation Per Package, P  
D
CC  
o
o
DC Input Diode Current, I  
T = -55 C to +100 C (Package F) . . . . . . . . . . . . . . . . . . 500mW  
IK  
A
o
o
For V < -0.5V or V > V + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA  
T = +100 C to +125 C (Package F) . . . . . . . . Derate Linearly at  
I
I
CC  
A
o
DC Output Diode Current, I  
8mW/ C to 300mW  
OK  
For V < -0.5V or V > V + 0.5V. . . . . . . . . . . . . . . . . . . . .±50mA Operating Temperature Range, T  
O
O
CC  
A
o
o
DC Output Source or Sink Current, Per Output Pin, I  
Package Type F. . . . . . . . . . . . . . . . . . . . . . . . . .-55 C to +125 C  
O
o
o
For V > -0.5V or V < V + 0.5V. . . . . . . . . . . . . . . . . . . . .±50mA  
Storage Temperature, T  
. . . . . . . . . . . . . . . . . .-65 C to +150 C  
O
O
CC  
STG  
DC V or GND Current, I or I  
Lead Temperature (During Soldering)  
CC  
CC  
GND  
For Up to 4 Outputs Per Device, Add ±25mA For Each  
Additional Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±100mA  
At Distance 1/16in. ± 1/32in. (1.59mm ± 0.79mm)  
From Case For 10s Max . . . . . . . . . . . . . . . . . . . . . . . . . . +265 C  
Unit Inserted Into a PC Board (Min Thickness 1/16in., 1.59mm)  
o
o
With Solder Contacting Lead Tips Only. . . . . . . . . . . . . . . +300 C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
Recommended Operating Conditions  
o
o
Supply Voltage Range, V  
Operating Temperature, T . . . . . . . . . . . . . . . . . . .-55 C to +125 C  
CC  
A
Unless Otherwise Specified, All Voltages Referenced to GND  
Input Rise and Fall Slew Rate, dt/dv  
T = Full Package Temperature Range  
CD54AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V  
CD54ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V  
at 1.5V to 3V (AC Types) . . . . . . . . . . . . . . . . . . . 0ns/V to 50ns/V  
at 3.6V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 20ns/V  
at 4.5V to 5.5V (AC Types) . . . . . . . . . . . . . . . . . 0ns/V to 10ns/V  
A
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . . 0V to V  
CC  
I
O
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.  
File Number 3886  
Copyright © Harris Corporation 1994  
1
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