CDP1857C_1 [INTERSIL]
4-Bit Bus Buffer/Separator; 4位总线缓冲器/分离器
| 型号： | CDP1857C_1 |
| 厂家： | 
Intersil |
| 描述： | 4-Bit Bus Buffer/Separator |
| 文件： | 总5页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TM
CDP1857C
March 1997
4-Bit Bus Buffer/Separator
Features
Description
The CDP1857C is a 4-bit CMOS non-inverting bus separator
designed for use in CDP1800-series microprocessor systems. It can
be controlled directly by a 1800-series microprocessor without the
use of additional components.
• Provides Easy Connection of I/O to CDP1800-Series
Microprocessor Data Bus
• Non-Inverting Fully Buffered Data Transfer
Ordering Information
PART
The CDP1857 is designed for use as a bus buffer or separator
between the 1800-series microprocessor data bus and I/O devices.
It provides a chip-select (CS) input signal which, when high (1),
enables the bus-separator three-state output drivers. The direction
of data flow, when enabled, is controlled by the MRD input signal.
NUMBER
CDP1857CE
CDP1857CD
TEMP. RANGE
PACKAGE
PKG. NO.
E16.3
o
o
-40 C to +85 C PDIP
In the CDP1857, when MRD = 1, it enables the three-state bus driv-
ers (DB0-DB3) and transfers data from the DATA-IN lines onto the
data bus. When MRD = 0, it disables the three-state bus drivers
(DB0-DB3) and enables the three-state data output drivers (DO0-
DO3), thus, transferring data from the data bus to the DATA-OUT ter-
minals.
o
o
-40 C to +85 C SBDIP
D16.3
TABLE 1. CDP1857 FUNCTION FOR I/O BUS SEPARATOR
OPERATION
DATA BUS OUT
DB0-DB3
DATA OUT
DO0-DO3
The CDP1857 can be used as a bidirectional bus buffer by connect-
ing the corresponding DI and DO terminals (Figure 1). The MRD out-
put signal from the 1800-series microprocessor has the correct
polarity to control the CDP1857 when it is used as I/O bus buffer/sep-
arator. Therefore, the 1800-series microprocessor MRD signal can be
connected directly to the MRD input of CDP1857. See Function Table
1 for use of the CDP1857 as an I/O bus buffer/separator.
CS
0
MRD
X
0
1
High Impedance
High Impedance
Data In
High Impedance
Data Bus
1
1
High Impedance
The CDP1857C is supplied in 16-lead hermetic, dual-in-line ceramic
packages (D suffix), and in 16-lead plastic packages (E suffix).
Pinout
16 LEAD DIP
TOP VIEW
16
V
DD
DI0
DI1
1
2
3
4
5
6
7
8
15 CS
DO0
DO1
DO2
DO3
DI2
14 DB0
13 DB1
12 DB2
11 DB3
10 MRD
9
DI3
V
SS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Copyright © Intersil Americas Inc. 2001. All Rights Reserved
62
File Number 1192.2
TM
Functional Diagram For CDP1857
1
DI0
14
13
DB0
DB1
3
DO0
2
DI1
4
DO1
7
DI2
12
DB2
DB3
CS
5
DO2
9
DI3
11
15
6
DO3
10
16 = V
DD
MRD
8 = V
SS
File Number
63
CDP1857C
Absolute Maximum Ratings
Thermal Information
o
o
DC Supply Voltage Range, (V
)
Thermal Resistance (Typical)
θ
( C/W)
θ
( C/W)
DD
(All Voltages Referenced to V Terminal) . . . . . . . -0.5V to +7V
JA
JC
SS
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
PDIP Package . . . . . . . . . . . . . . . . . . .
SBDIP Package. . . . . . . . . . . . . . . . . .
Device Dissipation Per Output Transistor
85
85
N/A
22
+0.5V
DD
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
T
= Full Package Temperature Range
A
(All Package Types) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mW
Operating Temperature Range (T )
Package Type D . . . . . . . . . . . . . . . . . . . . . . . . .-55 C to +125 C
Package Type E . . . . . . . . . . . . . . . . . . . . . . . . . .-40 C to +85 C
A
o
o
o
o
o
o
Storage Temperature Range (T
) . . . . . . . . . . .-65 C to +150 C
STG
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265 C
At distance 1/16 ± 1/32 In. (1.59 ± 0.79mm)
from case for 10s max
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
o
o
Static Electrical Specifications At T = -40 C to +85 C, Except as Noted:
A
CONDITIONS
V
(V)
V
V
(NOTE 1)
TYP
O
IN
DD
(V)
PARAMETER
Quiescent Device Current
Output Low Drive (Sink) Current
Output High Drive (Source) Current
Output Voltage Low-Level (Note 3)
Output Voltage High-Level (Note 3)
Input Low Voltage
SYMBOL
(V)
0, 5
0, 5
0, 5
0, 5
0, 5
-
MIN
MAX
50
-
UNITS
µA
mA
mA
V
I
-
5
5
5
5
5
5
5
5
5
-
-
5
3.2
-2.3
0
DD
I
0.4
1.6
OL
I
4.6
-1.15
-
OH
V
-
-
-
0.1
-
OL
V
4.9
5
V
OH
V
0.5, 4.5
0.5, 4.5
Any Input
0, 5
-
-
1.5
-
V
IL
IH
IN
Input High Voltage
V
-
3.5
-
V
Input Leakage Current
I
0, 5
0, 5
-
-
-
-
-
±1
100
7.5
µA
µA
pF
Operating Current (Note 2)
Input Capacitance
I
50
5
DD1
C
-
IN
NOTES:
1. Typical values are for T =+25 C and nominal voltage.
o
A
2. Operating current measured in a CDP1802 system at 3.2MHz with outputs floating.
3. I = I = 1µA.
OL
OH
o
o
Dynamic Electrical Specifications At T = -40 C to +85 C, V = 5V ±5%, V = 0.7 V , V = 0.3 V , t , t = 20ns, C =
A
DD
IH
DD IL
DD
R
F
L
100pF
V
(NOTE 1)
TYP
DD
(V)
PARAMETER
SYMBOL
MAX
UNITS
Propagation Delay Time:
MRD or CS to DO
t
t
5
5
5
5
150
150
100
100
225
225
150
150
ns
ns
ns
ns
ED
MRD or CS to DB
DI to DB
EB
t
IB
DB to DO
t
BO
NOTE:
o
1. Typical values are for T = 25 C and nominal voltages.
A
64
CDP1857C
Recommended Operating Conditions At T = Full Package Temperature Range.For maximum reliability, operating condi-
A
tions should be selected so that operation is always within the following ranges:
PARAMETER
Supply-Voltage Range
MIN
MAX
UNITS
4
6.5
V
V
Recommended Input Voltage Range
V
V
DD
SS
Timing Diagrams
CS
CS
MRD
MRD
DI
DI
t
t
ED
EB
t
t
ED
EB
90%
10%
90%
10%
DB
DB
FIGURE 1A. ENABLE TO DB TIME
FIGURE 1B. ENABLE TO DO TIME
CS
CS
MRD
MRD
DI
DI
t
t
BO
IB
t
t
BO
IB
VALID DATA
VALID DATA
DB
DB
FIGURE 1C. DI TO DB TIME
FIGURE 1D. DB TO DO TIME
FIGURE 1. TIMING DIAGRAMS FOR CDP1857C
65
CDP1857C
Typical Applications
CDP1857
DO0-DO3
BUS
BUS
DB0-DB3
DI0-DI3
MRD
CS
DIRECTION
CONTROL
ENABLE BUS-TO-BUS
DATA TRANSFER
FIGURE 2. CDP1857 BIDIRECTIONAL BUS BUFFER OPERATION
MRD
CDP1800
SERIES
CPU
MWR
N0, N1
OR N2
DATA
BUS
CS
CDP1857
DO0-DO3
DB0-DB3
(4)
(4)
DI0-0I3
MRD
(8)
(4)
I/O
(4)
(4)
(8)
MRD
CDP1857
DI0-DI3
(4)
DB0-DB3
DO0-DO3
CS
FIGURE 3. CDP1857 BUS SEPARATOR OPERATION
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66
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