EL5150_08 [INTERSIL]
200MHz Amplifiers; 200MHz的放大器
| 型号： | EL5150_08 |
| 厂家： | 
Intersil |
| 描述： | 200MHz Amplifiers |
| 文件： | 总18页 (文件大小：404K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5150, EL5151, EL5250, EL5251, EL5451
®
Data Sheet
January 16, 2008
FN7384.7
200MHz Amplifiers
Features
The EL5150, EL5151, EL5250, EL5251, and EL5451 are
200MHz bandwidth -3dB voltage mode feedback amplifiers
with DC accuracy of 0.01%, 1mV offsets and 10kV/V open
loop gains. These amplifiers are ideally suited for applications
ranging from precision measurement instrumentation to high
speed video and monitor applications. Capable of operating
with as little as 1.4mA of current from a single supply ranging
from 5V to 12V, dual supplies ranging from ±2.5V to ±5.0V,
these amplifiers are also well suited for handheld, portable
and battery-powered equipment.
• 200MHz -3dB bandwidth
• 67V/µs slew rate
• Very high open loop gains 50kV/V
• Low supply current = 1.4mA
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±5V
• Fast disable on the EL5150 and EL5250
• Low cost
Single amplifiers are offered in SOT-23 packages and duals in
a 10 Ld MSOP package for applications where board space is
critical. Quad amplifiers are available in a 14 Ld SOIC
package. Additionally, singles and duals are available in the
industry-standard 8 Ld SOIC package. All parts operate over
the industrial temperature range of -40°C to +85°C.
• Pb-free available (RoHS compliant)
Applications
• Imaging
• Instrumentation
• Video
• Communications devices
Pinouts
EL5150
EL5150
EL5151
(8 LD SOIC)
(6 LD SOT-23)
(5 LD SOT-23)
TOP VIEW
TOP VIEW
TOP VIEW
NC
IN-
1
2
3
4
8
7
6
5
CE
OUT
VS-
IN+
1
2
3
6
5
4
VS+
CE
OUT
VS-
IN+
1
2
3
5
4
VS+
IN-
VS+
OUT
NC
-
+
+
-
+ -
IN+
VS-
IN-
EL5250
(10 LD MSOP)
TOP VIEW
EL5251
(8 LD MSOP)
TOP VIEW
EL5451
(14 LD SOIC)
TOP VIEW
INA+
CEA
VS-
INA-
OUTA
INA-
INA+
VS-
OUTA
INA-
1
2
3
4
5
10
9
1
2
3
4
8
7
6
5
VS+
1
2
3
4
5
6
7
14 OUTD
13 IND-
12 IND+
11 VS-
-
+
OUTA
VS+
-
+
OUTB
INB-
-
-
+
+
+
+
-
-
8
INA+
VS+
-
+
+
-
OUTB
INB-
CEB
INB+
7
INB+
6
INB+
INB-
10 INC+
9
8
INC-
OUTB
OUTC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5150, EL5151, EL5250, EL5251, EL5451
Ordering Information
PART
PART NUMBER
EL5150IS
MARKING
PACKAGE
PKG. DWG. #
MDP0027
5150IS
8 Ld SOIC
EL5150IS-T7*
5150IS
5150IS
5150ISZ
5150ISZ
5150ISZ
BEAA
8 Ld SOIC (Tape and Reel)
8 Ld SOIC (Tape and Reel)
8 Ld SOIC (Pb-free)
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0038
MDP0038
MDP0038
MDP0038
MDP0038
MDP0038
MDP0038
MDP0038
MDP0043
MDP0043
MDP0043
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
EL5150IS-T13*
EL5150ISZ (Note)
EL5150ISZ-T7* (Note)
EL5150ISZ-T13* (Note)
EL5150IW-T7*
8 Ld SOIC (Tape and Reel) (Pb-free)
8 Ld SOIC (Tape and Reel) (Pb-free)
6 Ld SOT-23 (Tape and Reel)
6 Ld SOT-23 (Tape and Reel)
6 Ld SOT-23 (Tape and Reel) (Pb-free)
6 Ld SOT-23 (Tape and Reel) (Pb-free)
5 Ld SOT-23 (Tape and Reel)
5 Ld SOT-23 (Tape and Reel)
5 Ld SOT-23 (Tape and Reel) (Pb-free)
5 Ld SOT-23 (Tape and Reel) (Pb-free)
10 Ld MSOP
EL5150IW-T7A*
EL5150IWZ-T7* (Note)
EL5150IWZ-T7A* (Note)
EL5151IW-T7*
BEAA
BAAJ
BAAJ
BFAA
EL5151IW-T7A*
EL5151IWZ-T7* (Note)
EL5151IWZ-T7A* (Note)
EL5250IY
BFAA
BAAK
BAAK
BAEAA
BAEAA
BAEAA
5251IS
5251IS
5251IS
5251ISZ
5251ISZ
5251ISZ
BAFAA
BAFAA
BAFAA
BBBHA
BBBHA
BBBHA
5451IS
5451IS
5451IS
5451ISZ
5451ISZ
5451ISZ
EL5250IY-T7*
10 Ld MSOP (Tape and Reel)
10 Ld MSOP (Tape and Reel)
8 Ld SOIC
EL5250IY-T13*
EL5251IS
EL5251IS-T7*
8 Ld SOIC (Tape and Reel)
8 Ld SOIC (Tape and Reel)
8 Ld SOIC (Pb-free)
EL5251IS-T13*
EL5251ISZ (Note)
EL5251ISZ-T13* (Note)
EL5251ISZ-T7* (Note)
EL5251IY
8 Ld SOIC (Tape and Reel) (Pb-free)
8 Ld SOIC (Tape and Reel) (Pb-free)
8 Ld MSOP
EL5251IY-T7*
8 Ld MSOP (Tape and Reel)
8 Ld MSOP (Tape and Reel)
8 Ld MSOP (Pb-free)
EL5251IY-T13*
EL5251IYZ (Note)
EL5251IYZ-T13* (Note)
EL5251IYZ-T7* (Note)
EL5451IS
8 Ld MSOP (Tape and Reel) (Pb-free)
8 Ld MSOP (Tape and Reel) (Pb-free)
14 Ld SOIC
EL5451IS-T7*
14 Ld SOIC (Tape and Reel)
14 Ld SOIC (Tape and Reel)
14 Ld SOIC (Pb-free)
EL5451IS-T13*
EL5451ISZ (Note)
EL5451ISZ-T7* (Note)
EL5451ISZ-T13* (Note)
14 Ld SOIC (Tape and Reel) (Pb-free)
14 Ld SOIC (Tape and Reel) (Pb-free)
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN7384.7
January 16, 2008
2
EL5150, EL5151, EL5250, EL5251, EL5451
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage between V and V . . . . . . . . . . . . . . . . . . . . 13.2V
S-
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
S
Slewrate of Voltage between V and V . . . . . . . . . . . . . . . . 1V/µs
S
S-
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 40mA
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . GND - 0.5V to V + 0.5V
S
Current into I +, I -, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
N
N
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 150Ω, T = +25°C, unless otherwise specified.
S
S
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
A
= +1, R = 500Ω
200
40
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
V
L
A
= +2, R = 150Ω
V
L
GBWP
BW1
SR
Gain Bandwidth Product
0.1dB Bandwidth
Slew Rate
A
= 500
40
V
A
= +1, R = 500Ω
10
V
L
V
V
V
= ±2.5V, A = +2
50
67
O
V
= ±3.0V, A = 1, R = 500Ω
100
80
O
V
L
t
0.1% Settling Time
= -1V to +1V, A = -2
OUT V
S
dG
dP
Differential Gain Error (Note 1)
Differential Phase Error (Note 1)
Input Referred Voltage Noise
Input Referred Current Noise
A
= +2, R = 150Ω
0.04
0.9
12
%
V
L
A
= +2, R = 150Ω
°
V
L
V
nV/√Hz
pA/√Hz
N
I
1.0
N
DC PERFORMANCE
V
Offset Voltage
-1
0.5
-2
1
mV
OS
T V
Input Offset Voltage Temperature
Coefficient
Measured from T
MIN
to T
MAX
µV/°C
C
OS
A
Open Loop Gain
15
56
kV/V
VOL
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
Guaranteed by CMRR test
-3.5
85
+3.5
V
CMRR
Common Mode Rejection Ratio
Input Bias Current
100
20
6
dB
nA
nA
MΩ
pF
I
I
-100
-30
80
+100
30
B
Input Offset Current
Input Resistance
OS
R
C
170
1
IN
Input Capacitance
IN
OUTPUT CHARACTERISTICS
V
Output Voltage Swing Low
Output Current
R
R
R
= 150Ω to GND
= 500Ω to GND
= 10Ω to GND
±2.5
±3.1
±40
±2.8
±3.4
±70
V
V
OUT
L
L
L
I
mA
OUT
FN7384.7
January 16, 2008
3
EL5150, EL5151, EL5250, EL5251, EL5451
Electrical Specifications V + = +5V, V - = -5V, R = 150Ω, T = +25°C, unless otherwise specified. (Continued)
S
S
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
ENABLE (SELECTED PACKAGES ONLY)
t
t
I
I
Enable Time
EL5150
EL5150
CE = V +
210
620
5
ns
ns
µA
µA
V
EN
Disable Time
DIS
CE Pin Input High Current
CE Pin Input Low Current
1
25
+1
IHCE
ILCE
S
CE = V + - 5V
S
-1
0
V
V
CE Input High Voltage for Powerdown
CE Input Low Voltage for Powerdown
Disable
Enable
V + - 1
S
IHCE
ILCE
V + - 3
S
V
SUPPLY
I
I
I
Supply Current - Enabled (per amplifier) No load, V = 0V, CE = +5V
IN
1.12
-10
-25
80
1.35
-1
1.6
+5
0
mA
µA
µA
dB
SON
Supply Current - Disabled (per amplifier)
SOFF+
SOFF-
Supply Current - Disabled (per amplifier) No load, V = 0V
IN
-14
110
PSRR
Power Supply Rejection Ratio
DC, V = ±3.0V to ±6.0V
S
NOTE:
1. Standard NTSC test, AC signal amplitude = 286mV , f = 3.58MHz, V
P-P
is swept from 0.8V to 3.4V, R is DC-coupled.
L
OUT
Typical Performance Curves
100
80
60
40
20
0
-45
0
180
90
A
= +1
V
L
F
R = 500Ω
R
= 0Ω
45
0
-90
A
R
R
= +2
= 150Ω
= 400Ω
V
L
F
90
A
R
R
= +5
V
L
F
= 500Ω
= 1.5kΩ
135
180
-180
-270
1k
10k
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. EL5150 FREQUENCY vs OPEN LOOP
GAIN/PHASE
FIGURE 2. PHASE vs FREQUENCY FOR VARIOUS GAINS
FN7384.7
January 16, 2008
4
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
5
3
5
3
A
= +1
V
= ±5V
A = +2
V
V
L
S
C = 5pF
R
= R = 402Ω
F
G
1
1
R
= 1kΩ
L
R
= 500Ω
L
-1
-3
-5
-1
-3
-5
R
= 500Ω
L
R
= 200Ω
L
R
= 150Ω
L
R
= 300Ω
L
R
= 100Ω
R
= 100Ω
L
L
100k
1M
10M
FREQUENCY (Hz)
100M
1G
0.1
1
10
100
FREQUENCY (Hz)
FIGURE 3. EL5150 GAIN vs FREQUENCY FOR VARIOUS R
FIGURE 4. EL5150 GAIN vs FREQUENCY FOR VARIOUS R
5
L
L
L
L
L
L
4
A
= +5
A
= +1
V
V
R
C
= 1.5kΩ
= 5pF
R
= 500Ω
L
F
L
C
= 15pF
L
2
0
3
1
C
= 8.2pF
L
R
= 500Ω
L
R
= 400Ω
= 200Ω
L
C
= 3.9pF
-2
-4
-6
-1
-3
-5
L
C
= 0pF
L
R
L
R
= 100Ω
L
100k
1M
10M
100M
100k
1M
10M
FREQUENCY (Hz)
100M 300M
FREQUENCY (Hz)
FIGURE 5. EL5150 GAIN vs FREQUENCY FOR VARIOUS R
5
FIGURE 6. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
5
A
R
R
= +2
= 500Ω
C
= 68pF
A
R
R
= +5
= 1.5kΩ
= 500Ω
V
L
F
L
V
F
L
C
= 47pF
L
C
= 82pF
= R = 400Ω
L
G
3
1
3
1
C
= 68pF
= 47pF
L
C
= 22pF
L
C
-1
-3
-5
-1
-3
-5
L
C
= 0pF
L
C
= 15pF
L
C
= 0pF
10M
L
100k
1M
10M
100M
100k
1M
FREQUENCY (Hz)
30M
FREQUENCY (Hz)
FIGURE 7. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
FIGURE 8. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
FN7384.7
January 16, 2008
5
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
5
3
4
2
A
R
C
= +1
= 500Ω
= 5pF
A
= +2
= 500Ω
= 5pF
V
L
L
V
C
- = 4.7pF
C
= 12pF
IN
IN
C
- = 18pF
IN
R
C
R
L
L
F
C
C
- = 12pF
IN
IN
= R = 400Ω
G
- = 8.2pF
1
0
C
= 8.2pF
IN
C
C
- = 3.3pF
IN
-1
-3
-5
-2
-4
-6
= 3.9pF
IN
C
- = 0pF
IN
C
= 0pF
IN
C
- = 1pF
IN
100k
1M
10M
FREQUENCY (Hz)
100M 400M
100k
1M
10M
100M
FREQUENCY (Hz)
FIGURE 9. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
-
FIGURE 10. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
4
IN
IN
4
A
= +5
C
- = 33pF
A = +5
V
IN
V
C
- = 100pF
R
R
C
= 1.5kΩ
= 500Ω
= 5pF
R
R
C
= 1.5kΩ
= 500Ω
= 5pF
IN
F
L
L
F
L
L
2
0
2
0
C
- = 68pF
IN
R
= 500Ω
L
C
- = 8.2pF
IN
C
- = 8pF
R = 300Ω
L
IN
-2
-4
-6
-2
-4
-6
C
- = 3.3pF
IN
C
R
= 200Ω
= 100Ω
L
- = 0pF
IN
R
L
R
= 50Ω
L
100k
1M
FREQUENCY (Hz)
10M
40M
100k
1M
FREQUENCY (Hz)
10M
30M
FIGURE 11. EL5150 GAIN vs FREQUENCY FOR VARIOUS C
-
FIGURE 12. EL5250 GAIN vs FREQUENCY FOR VARIOUS R
IN
L
5
4
A
R
C
= +2
= 500Ω
= 5pF
R
C
= 500Ω
= 5pF
V
L
L
L
L
R
= R = 3kΩ
G
F
3
1
2
0
R
= R = 2kΩ
G
F
A
= +1
V
R
= R = 1kΩ
G
F
A
= +2
V
-1
-3
-5
-2
-4
-6
R
= R = 500Ω
G
F
A
= +3
R
= R = 100Ω
V
F
G
100k
1M
10M
100M
100k
1M
10M
FREQUENCY (Hz)
100M 300M
FREQUENCY (Hz)
FIGURE 13. EL5150 GAIN vs FREQUENCY FOR VARIOUS
R /R
FIGURE 14. EL5250 GAIN vs FREQUENCY FOR VARIOUS
GAINS
F
G
FN7384.7
January 16, 2008
6
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
4
2
0
20
R
C
= 500Ω
= 5pF
BOTH CHANNELS SHOWN
A = +1
V
POSITIVE SUPPLY
L
L
A
= +1
V
0
40
A
= +2
V
-2
-4
-6
60
A
= +3
10M
V
80
100
100k
1M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 15. EL5250 GAIN vs FREQUENCY FOR VARIOUS
GAINS
FIGURE 16. PSRR vs FREQUENCY
0
-40
-50
-60
-70
-80
-90
A
= +1
A
R
C
= +2
= 500Ω
= 5pF
V
V
L
L
NEGATIVE SUPPLY
20
40
IN CHANNEL A
OUT CHANNEL B
60
80
100
1k
10k
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY RESPONSE (Hz)
FREQUENCY (Hz)
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. EL5250 CROSSTALK vs FREQUENCY
1.000k
40
50
60
70
80
90
A
R
C
= +2
= 500Ω
= 5pF
A = +2
V
V
L
L
100.000
10.000
1.000
IN CHANNEL B
OUT CHANNEL A
0.100
0.001
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. EL5250 CROSSTALK vs FREQUENCY
FIGURE 20. OUTPUT IMPEDANCE
FN7384.7
January 16, 2008
7
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
0
20
2500
1500
500
A
= +2
A
R
C
= +1
= 500Ω
= 5pF
V
V
L
L
40
60
-500
80
-1500
100
100
-2500
1k
10k
100k
1M
10M
100M
1M
10M
100M
600M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. CMRR
FIGURE 22. GROUP DELAY
3.0
2.5
2.0
1.5
1.0
0.5
0
100.0
10.0
1.0
A
R
C
= +1
= 500Ω
= 5pF
V
L
L
0.1
100
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
1k
10k
100k
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. VOLTAGE + CURRENT NOISE vs FREQUENCY
90
80
105
100
95
3RD HD
2ND HD
70
60
50
40
30
20
10
0
90
85
80
A
R
C
= +1
= 500Ω
= 2.2pF
V
L
L
75
FREQ = 1.9MHz
70
2.2
0
1
2
3
4
5
6
7
8
9
2.7
3.2
3.7
4.2
4.7
5.2
5.7
6.2
OUTPUT SWING (V
)
SPLIT POWER SUPPLY (V)
P-P
FIGURE 25. DISTORTION vs OUTPUT AMPLITUDE
FIGURE 26. SLEW RATE vs POWER SUPPLY
FN7384.7
January 16, 2008
8
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
-30
-40
-50
-60
-70
-20
-30
-40
-50
-60
-70
A
= +5
A
= +5
V
V
V
= ±5V
= 500Ω
= 402Ω
V
R
R
= ±5V
= 500Ω
= 402Ω
S
S
R
R
L
F
L
F
THD
V
= 2V
THD_Fin = 2MHz
OUT
P-P
2ND HD
3RD HD
THD_Fin = 500kHz
0
1
2
3
4
5
7
8
0.5
1.0
FUNDAMENTAL FREQUENCY (MHz)
10.0
OUTPUT VOLTAGE (V
)
P-P
FIGURE 27. TOTAL HARMONIC DISTORTION vs OUTPUT
VOLTAGE
FIGURE 28. HARMONIC DISTORTION vs FREQUENCY
A
R
C
= +1
= 500Ω
= 2.2pF
A
R
C
= +1
= 500Ω
= 2.2pF
V
L
L
V
L
L
20%-80%
CH3 RISE
1.874ns
80%-20%
CH3 FALL
3.106ns
20%-80%
CH3 RISE
11.72ns
80%-20%
CH3 FALL
15.28ns
TIME (40ns/DIV)
TIME (40ns/DIV)
FIGURE 29. SMALL SIGNAL STEP RESPONSE
FIGURE 30. LARGE SIGNAL STEP RESPONSE
A
R
C
= +2
=150Ω
= 2.2pF
A
R
C
= +2
= 150Ω
= 2.2pF
V
L
L
V
L
L
20%-80%
CH3 RISE
4.337ns
80%-20%
CH3 FALL
6.229ns
20%-80%
CH3 RISE
12.87ns
80%-20%
CH3 FALL
15.67ns
TIME (40ns/DIV)
TIME (40ns/DIV)
FIGURE 31. SMALL SIGNAL STEP RESPONSE
FIGURE 32. LARGE SIGNAL STEP RESPONSE
FN7384.7
January 16, 2008
9
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
A
R
= +1
= 500Ω
R = 500Ω
L
SUPPLY = ±5.0V, ±2.7mA
V
L
CH 1
CH 4
CH 2
210ns
ENABLE
620ns
DISABLE
800ns
ENABLE
520ns
DISABLE
TIME (400ns/DIV)
TIME (1µs/DIV)
FIGURE 33. EL5150 ENABLE/DISABLE
FIGURE 34. EL5250 ENABLE/DISABLE
0.06
1.5
0.04
0.02
0
1.0
0.5
0
-0.02
-0.04
-0.5
-1.0
0
10 20 30 40 50 60 70 80 90 100
IRE
0
10 20 30 40 50 60 70 80 90 100
IRE
FIGURE 35. DIFFERENTIAL GAIN
FIGURE 36. DIFFERENTIAL PHASE
4
2
-50
-70
A
R
C
= +1
= 500Ω
= 5pF
A
R
C
= +1
= 500Ω
= 2.7pF
V
L
L
V
L
L
0
-90
±2.0V
-2
-4
-6
-110
-130
-150
±6.0V
100k
1M
10M
100M 300M
100k
1M
10M
100M 300M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 37. SMALL SIGNAL FREQUENCY vs SUPPLY
FIGURE 38. INPUT-TO-OUTPUT ISOLATION WITH PART
DISABLED
FN7384.7
January 16, 2008
10
EL5150, EL5151, EL5250, EL5251, EL5451
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1.0
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
833mW
1.136W
SO14
SO14
= 120°C/W
θ
= 88°C/W
θ
JA
909mW
JA
625mW
486mW
SO8
= 110°C/W
SO8
= 160°C/W
JA
0.8 870mW
θ
θ
JA
0.6
MSOP8/10
435mW
391mW
θ
= 206°C/W
JA
MSOP8/10
0.4
θ
= 115°C/W
SOT23-5/6
θ = 265°C/W
JA
JA
SOT23-5/6
= 230°C/W
0.2
0
θ
JA
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 40. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
TEMPERATURE
accordingly; for instance, if the load resistor is 150Ω, the
output swing ranges from -3.5V to 3.5V. This response is a
simple application of Ohms law indicating a lower value
resistance results in greater current demands of the
amplifier. Additionally, the load resistance affects the
frequency response of this family as well as all operational
amplifiers; as clearly indicated by the Gain vs Frequency For
Product Description
The EL5150, EL5151, EL5250, EL5251 and EL5451 are
wide bandwidth, low power, low offset voltage feedback
operational amplifiers capable of operating from a single or
dual power supplies. This family of operational amplifiers are
internally compensated for closed loop gain of +1 or greater.
Connected in voltage follower mode, driving a 500Ω load
members of this amplifier family demonstrate a -3dB
bandwidth of about 200MHz. With the loading set to
accommodate typical video application, 150Ω load and gain
set to +2, bandwidth reduces to about 40MHz with a 67V/µs
slew rate. Power down pins on the EL5151 and EL5251
reduce the already low power demands of this amplifier
family to 12µA typical while the amplifier is disabled.
Various R curves clearly indicate. In the case of the
L
frequency response reduced bandwidth with decreasing
load resistance is a function of load resistance in conjunction
with the output zero response of the amplifier.
Choosing A Feedback Resistor
A feedback resistor is required to achieve unity gain; simply
short the output pin to the inverting input pin. Gains greater
than +1 require a feedback and gain resistor to set the
desired gain. This gets interesting because the feedback
resistor forms a pole with the parasitic capacitance at the
inverting input; as the feedback resistance increases the
position of the pole shifts in the frequency domain, the
amplifier's phase margin is reduced and the amplifier
becomes less stable. Peaking in the frequency domain and
ringing in the time domain are symptomatic of this shift in
pole location. So we want to keep the feedback resistor as
small as possible. You may want to use a large feedback
resistor for some reason; in this case to compensate the shift
of the pole and maintain stability a small capacitor in the few
Pico farad range in parallel with the feedback resistor is
recommended.
Input, Output and Supply Voltage Range
The EL5150 and family members have been designed to
operate with supply voltage ranging from 5V to 12V. Supply
voltages range from ±2.5V to ±5V for split supply operation.
And of course split supply operation can easily be achieved
using single supplies with by splitting off half of the single
supply with a simple voltage divider as illustrated in the
application circuit section.
Input Common Mode Range
These amplifiers have an input common mode voltage
ranging from 3.5V above the negative supply (V - pin) to
3.5V below the positive supply (V + pin). If the input signal is
driven beyond this range the output signal will exhibit
distortion.
S
S
For the gains greater than unity it has been determined a
feedback resistance ranging from 500Ω to 750Ω provides
optimal response.
Maximum Output Swing & Load Resistance
The outputs of the EL5150 and family members exhibit
maximum output swing ranges from -4V to 4V for V = ±5V
S
with a load resistance of 500Ω. Naturally, as the load
resistance becomes lower, the output swing lowers
FN7384.7
January 16, 2008
11
EL5150, EL5151, EL5250, EL5251, EL5451
ranging from 70mA and 95mA can be expected and
Gain Bandwidth Product
naturally, if the output is shorted indefinitely the part can
easily be damaged from overheating; or excessive current
density may eventually compromise metal integrity.
Maximum reliability is maintained if the output current is
always held below ±40mA. This limit is set and limited by the
design of the internal metal interconnect. Note that in
transient applications, the part is extremely robust.
The EL5150 and family members have a gain bandwidth
product of 40MHz for a gain of +5. Bandwidth can be
predicted by the following equation:
(Gain) x (BW) = GainBandwidthProduct
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and same frequency
response as DC levels are changed at the output; this
characteristic is widely referred to as “diffgain-diffphase”.
Many amplifiers have a difficult time with this especially while
driving standard video loads of 150Ω, as the output current
has a natural tendency to change with DC level. The dG and
dP for these families is a respectable 0.04% and 0.9°, while
driving 150Ω at a gain of 2. Driving high impedance loads
would give a similar or better dG and dP performance as the
current output demands placed on the amplifier lessen with
increased load.
Power Dissipation
With the high output drive capability of these devices, it is
possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
T
– T
AMAX
JMAX
Driving Capacitive Loads
(EQ. 1)
--------------------------------------------
PD
=
MAX
Θ
JA
These devices can easily drive capacitive loads as
demanding as 27pF in parallel with 500Ω while holding
peaking to within 5dB of peaking at unity gain. Of course if
less peaking is desired, a small series resistor (usually
between 5Ω to 50Ω) can be placed in series with the output
to eliminate most peaking; however, there will be a small
sacrifice of gain which can be recovered by simply adjusting
the value of the gain resistor.
Where:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
T
AMAX
θ
= Thermal resistance of the package
JA
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
Driving Cables
Both ends of all cables must always be properly terminated;
double termination is absolutely necessary for reflection-free
performance. Additionally, a back-termination series resistor
at the amplifier's output will isolate the amplifier from the
cable and allow extensive capacitive drive. However, other
applications may have high capacitive loads without a
back-termination resistor. Again, a small series resistor at
the output can help to reduce peaking.
For sourcing:
n
V
OUTi
-----------------
PD
= V × I
+
+
(V – V
) ×
(EQ. 2)
(EQ. 3)
MAX
S
SMAX
S
OUTi
∑
R
Li
i = 1
For sinking:
n
PD
= V × I
(V
– V ) × I
OUTi S LOADi
MAX
S
SMAX
∑
Disable/Power-Down
i = 1
Devices with disable can be disabled with their output placed
in a high impedance state. The turn off time is about 330ns
and the turn on time is about 130ns. When disabled, the
amplifier's supply current is reduced to 17µA typically;
essentially eliminating power consumption. The amplifier's
power down is controlled by standard TTL or CMOS signal
levels at the ENABLE pin. The applied logic signal is relative
Where:
V = Supply voltage
S
I
= Maximum quiescent supply current
SMAX
V
= Maximum output voltage of the application
OUT
R
= Load resistance tied to ground
LOAD
to V - pin. Letting the ENABLE pin float or the application of
S
I
= Load current
a signal that is less than 0.8V above V - enables the
S
LOAD
amplifier. The amplifier is disabled when the signal at
ENABLE pin is above V + - 1.5V.
S
N = number of amplifiers (Max = 2)
By setting the two PD equations equal to each other, we
MAX
Output Drive Capability
can solve the output current and R
to avoid the device
LOAD
Members of the EL5150 family do not have internal short
circuit protection circuitry. Typically, short circuit currents
overheat.
FN7384.7
January 16, 2008
12
EL5150, EL5151, EL5250, EL5251, EL5451
compromised performance. Minimizing parasitic capacitance
Power Supply Bypassing Printed Circuit Board
Layout
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
Application Circuits
For normal single supply operation, where the V - pin is
S
connected to the ground plane, a single 4.7µF tantalum
capacitor in parallel with a 0.1µF ceramic capacitor from V +
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
Sallen Key Low Pass Filter
S
A common and easy to implement filter taking advantage of
the wide bandwidth, low offset and low power demands of
the EL5150. A derivation of the transfer function is provided
for convenience (see Figure 41).
be used. In this case, the V - pin becomes the negative
S
supply rail.
Sallen Key High Pass Filter
Printed Circuit Board Layout
Again, this useful filter benefits from the characteristics of the
EL5150. The transfer function is very similar to the low pass
so only the results are presented (see Figure 42).
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
RB
K = 1+
RA
1
5V
V2
Vo = K
V1
R2C2s +1
0.1µF
Vo
V1− Vi
R1
Vo − Vi
1
K − V1
1+
+
= 0
R2
C1s
K
H(s) =
2
R1C1R2C2s + ((1− K)R1C1+ R1C2 + R21C2)s +1
1
C1
1n
H(jw) =
2
1− w R1C1R2C2 + jw((1− K)R1C1+ R1C2 + R2C2)
R1
1k
U1A
+
R2
1k
Holp = K
4
3
1
1
V+
V-
wo =
V
OUT
1n
R1C1R2C2
2
V1
C2
-
1
R7
11
Q =
1k
R1C1
R1C2
R2C1
R2C2
R1C1
1k
(1− K)
+
+
R2C2
RB
RA
1k
Holp = K
Equations simplify if we let all
components be equal R = C
1
wo =
RC
1
0.1µF
Q =
3 − K
5V
V3
FIGURE 41. SALLEN KEY LOW PASS FILTER
FN7384.7
January 16, 2008
13
EL5150, EL5151, EL5250, EL5251, EL5451
5V
V2
0.1µF
R8
Holp = K
1k
C7
1n
U1A
C9
1n
1
4
3
wo =
+
R1C1R2C2
1
V+
V-
V
OUT
1n
1
2
V1
C2
Q =
-
R1C1
R1C2
R2C1
R2C2
R1C1
R7
11
1k
(1− K)
+
+
1k
RB
R2C2
RA
1k
K
Holp =
wo =
4 − K
Equations simplify if we let
all components be equal R = C
2
0.1µF
RC
5V
2
V3
Q =
4 − K
FIGURE 42. SALLEN KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
A
1
R
R
3
3
e
1
The addition of a third amplifier to the conventional three
amplifier Instrumentation Amplifier introduces the benefits of
differential signal realization; specifically the advantage of
using common mode rejection to remove coupled noise and
ground –potential errors inherent in remote transmission.
This configuration also provides enhanced bandwidth, wider
output swing and faster slew rate than conventional three
amplifier solutions with only the cost of an additional
amplifier and few resistors.
+
-
A
3
R
e 3
2
o
-
+
+
R
R
3
3
REF
R
e
G
o
R
R
3
3
A
4
R
2
-
+
-
e 4
o
A
2
R
R
3
3
-
+
e
2
e
e
= –(1 + 2R ⁄ R )(e – e )
e
= (1 + 2R ⁄ R )(e – e )
o4 2 G 1 2
o3
o
2
G
1
2
= –2(1 + 2R ⁄ R )(e – e )
2
G
1
2
2f
C1, 2
A
= –2(1 + 2R ⁄ R )
2 G
-----------------
Di
BW =
A
Di
FN7384.7
January 16, 2008
14
EL5150, EL5151, EL5250, EL5251, EL5451
resulting in an imbalance in the bridge. A voltage variation
Strain Gauge
from the referenced high accuracy source is generated and
translated to the difference amplifier through the buffer
stage. This voltage difference as a function of the strain is
converted into an output voltage.
The strain gauge is an ideal application to take advantage of
the moderate bandwidth and high accuracy of the EL5150.
The operation of the circuit is very straight-forward. As the
strain variable component resistor in the balanced bridge is
subjected to increasing strain, its resistance changes
5V
V2
0.1µF
VARIABLE SUBJECT TO STRAIN
1k
V5
U1A
4
R17
4
3
22
22
0V
R15
R15
1k
+
1k
1
1k
V+
V-
V
(V1+V2+V3+V4)
OUT
R14
R18
4
2
-
RL
11
1k
1k
1k
RF
0.1µF
5V
V4
FN7384.7
January 16, 2008
15
EL5150, EL5151, EL5250, EL5251, EL5451
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
±0.003
±0.002
±0.003
±0.001
±0.004
±0.008
±0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
±0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN7384.7
January 16, 2008
16
EL5150, EL5151, EL5250, EL5251, EL5451
SOT-23 Package Family
MDP0038
e1
D
SOT-23 PACKAGE FAMILY
A
MILLIMETERS
6
4
N
SYMBOL
SOT23-5
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
5
SOT23-6
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
6
TOLERANCE
MAX
A
A1
A2
b
±0.05
E1
E
±0.15
2
3
±0.05
0.15
2X
C
D
c
±0.06
1
2
3
0.20
2X
C
D
Basic
5
e
E
Basic
E1
e
Basic
0.20
C
A-B
D
M
B
b
NX
Basic
e1
L
Basic
±0.10
L1
N
Reference
Reference
Rev. F 2/07
0.15
2X
C
A-B
1
3
D
NOTES:
C
1. Plastic or metal protrusions of 0.25mm maximum per side are not
included.
A2
SEATING
PLANE
2. Plastic interlead protrusions of 0.25mm maximum per side are not
included.
A1
0.10
NX
C
3. This dimension is measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE
PLANE
0.25
c
+3°
-0°
L
0°
FN7384.7
January 16, 2008
17
EL5150, EL5151, EL5250, EL5251, EL5451
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
N
SYMBOL
MSOP8
1.10
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
MSOP10
1.10
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
M
C A B
b
0.08
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3° ±3°
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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FN7384.7
January 16, 2008
18
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