EL5205IYZ-T13 [INTERSIL]
700MHz Slew Enhanced VFA; 700MHz的压摆增强VFA
| 型号： | EL5205IYZ-T13 |
| 厂家： | 
Intersil |
| 描述： | 700MHz Slew Enhanced VFA |
| 文件： | 总17页 (文件大小：2619K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5104, EL5105, EL5204, EL5205, EL5304
®
Data Sheet
October 26, 2005
FN7332.5
700MHz Slew-Enhanced VFAs
Features
• Specified for 5V or ±5V applications
The EL5104, EL5105, EL5204, EL5205, and EL5304
represent high speed voltage feedback amplifiers based on
the current feedback amplifier architecture. This gives the
typical high slew rate benefits of a CFA family along with the
stability and ease of use associated with the VFA type
architecture. This family is available in single, dual, and triple
versions, with 200MHz, 400MHz, and 700MHz versions.
This family operates on single 5V or ±5V supplies from
minimum supply current. The EL5104 and EL5204 also
feature an output enable function, which can be used to put
the output in to a high-impedance mode. This enables the
outputs of multiple amplifiers to be tied together for use in
multiplexing applications.
• Power-down to 17µA
• -3dB bandwidth = 700MHz
• ±0.1dB bandwidth = 45MHz
• Low supply current = 9.5mA
• Slew rate = 7000V/µs
• Low offset voltage = 10mV max
• Output current = 160mA
• A
= 1400
• Diff gain/phase = 0.01%/0.02°
VOL
• Pb-free plus anneal available (RoHS compliant)
Applications
• Video amplifiers
• PCMCIA applications
• A/D drivers
• Line drivers
• Portable computers
• High speed communications
• RGB applications
• Broadcast equipment
• Active filtering
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL5104, EL5105, EL5204, EL5205, EL5304
Pinouts
EL5104
(6 LD SOT-23)
TOP VIEW
EL5104
(8 LD SO)
TOP VIEW
EL5105
(5 LD SOT-23, SC-70)
TOP VIEW
OUT
1
2
3
6
5
4
VS+
NC
IN-
1
2
3
4
8
7
6
5
ENABLE
VS+
OUT
VS-
IN+
1
2
3
5
VS+
VS-
IN+
ENABLE
IN-
-
+
+
-
+ -
IN+
VS-
OUT
4
IN-
NC
EL5204
(10 LD MSOP)
TOP VIEW
EL5205
EL5304
(16 LD QSOP)
TOP VIEW
(8 LD SO, MSOP)
TOP VIEW
OUTA
INA-
INA+
VS-
OUT
IN-
1
2
3
4
5
10 VS+
1
8
VS+
INA+
CEA
VS-
1
2
3
4
5
6
7
8
16 INA-
15 OUTA
14 VS+
-
9
8
7
6
OUT
IN-
2
3
4
-
+
7
6
5
OUTB
INB-
-
+
+
IN+
VS-
CE
-
-
+
+
+
-
IN+
CE
INB+
CEB
INB+
NC
13 OUTB
12 INB-
11 NC
+
-
CEC
INC+
10 OUTC
9
INC-
Ordering Information
PART NUMBER
PART MARKING
5104IS
TAPE & REEL
-
PACKAGE
PKG. DWG. #
MDP0027
EL5104IS
8 Ld SO
EL5104IS-T7
5104IS
5104IS
5104ISZ
5104ISZ
5104ISZ
n
7”
8 Ld SO
8 Ld SO
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0038
MDP0038
MDP0038
MDP0038
P5.049
EL5104IS-T13
13”
EL5104ISZ (Note)
EL5104ISZ-T7 (Note)
EL5104ISZ-T13 (Note)
EL5104IW-T7
-
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
6 Ld SOT-23
7”
13”
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
7” (250 pcs)
EL5104IW-T7A
n
6 Ld SOT-23
EL5104IWZ-T7 (Note)
EL5104IWZ-T7A (Note)
EL5105IC-T7
BAEA
BAEA
C
6 Ld SOT-23 (Pb-Free)
6 Ld SOT-23 (Pb-Free)
5 Ld SC-70
EL5105IC-T7A
C
5 Ld SC-70
P5.049
EL5105IW-T7
f
5 Ld SOT-23
MDP0038
MDP0038
MDP0038
MDP0038
EL5105IW-T7A
f
5 Ld SOT-23
EL5105IWZ-T7 (Note)
EL5105IWZ-T7A (Note)
BBMA
BBMA
5 Ld SOT-23 (Pb-Free)
5 Ld SOT-23 (Pb-Free)
FN7332.5
October 26, 2005
2
EL5104, EL5105, EL5204, EL5205, EL5304
Ordering Information (Continued)
PART NUMBER
PART MARKING
TAPE & REEL
PACKAGE
PKG. DWG. #
MDP0043
EL5204IY
BTAAA
-
7”
13”
-
10 Ld MSOP
10 Ld MSOP
10 Ld MSOP
EL5204IY-T7
BTAAA
BTAAA
BAAAF
BAAAF
BAAAF
5205IS
5205IS
5205IS
5205ISZ
5205ISZ
5205ISZ
BVAAA
BVAAA
BVAAA
BAAAG
BAAAG
BAAAG
5304IU
5304IU
5304IU
5304IUZ
5304IUZ
5304IUZ
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0040
MDP0040
MDP0040
MDP0040
MDP0040
MDP0040
EL5204IY-T13
EL5204IYZ (Note)
EL5204IYZ-T7 (Note)
EL5204IYZ-T13 (Note)
EL5205IS
10 Ld MSOP (Pb-Free)
10 Ld MSOP (Pb-Free)
10 Ld MSOP (Pb-Free)
8 Ld SO
7”
13”
-
EL5205IS-T7
7”
13”
-
8 Ld SO
EL5205IS-T13
8 Ld SO
EL5205ISZ (Note)
EL5205ISZ-T7 (Note)
EL5205ISZ-T13 (Note)
EL5205IY
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
8 Ld SO (Pb-Free)
8 Ld MSOP
7”
13”
-
EL5205IY-T7
7”
13”
-
8 Ld MSOP
EL5205IY-T13
8 Ld MSOP
EL5205IYZ (Note)
EL5205IYZ-T7 (Note)
EL5205IYZ-T13 (Note)
EL5304IU
8 Ld MSOP (Pb-free)
8 Ld MSOP (Pb-free)
8 Ld MSOP (Pb-free)
16 Ld QSOP
7”
13”
-
EL5304IU-T7
7”
13”
-
16 Ld QSOP
EL5304IU-T13
16 Ld QSOP
EL5304IUZ (Note)
EL5304IUZ-T7 (Note)
EL5304IUZ-T13 (Note)
16 Ld QSOP (Pb-Free)
16 Ld QSOP (Pb-Free)
16 Ld QSOP (Pb-Free)
7”
13”
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN7332.5
3
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage between V + and GND. . . . . . . . . . . . . . . . . . 13.2V
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
S
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4V
Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80mA
V + to V - Maximum Slew Rate . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
S
S
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
DC Electrical Specifications
V
= ±5V, GND = 0V, T = 25°C, V
= 0V, V
= 0V, V
= GND or OPEN, unless otherwise
ENABLE
S
A
CM
OUT
specified.
DESCRIPTION
Offset Voltage
PARAMETER
CONDITIONS
MIN
-10
-18
TYP
3
MAX
10
UNIT
mV
V
EL5104, EL5105, EL5204, EL5205
EL5304
OS
5
18
mV
TCV
IB
Offset Voltage Temperature Coefficient
Input Bias Current
Measured from T
to T
10
8
µV/°C
µA
OS
MIN
MAX
MAX
V
V
= 0V
= 0V
30
15
IN
IN
I
Input Offset Current
4
µA
OS
TCI
Input Bias Current Temperature
Coefficient
Measured from T
to T
50
nA/°C
OS
MIN
PSRR
CMRR
CMIR
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Common Mode Input Range
Input Resistance
60
56
-3
70
62
dB
dB
V
V
from -3V to +3V
CM
Guaranteed by CMRR test
Common mode
SO package
+3
R
C
50
120
1
kΩ
pF
mA
µA
µA
V
IN
Input Capacitance
IN
I
I
Supply Current - Enabled
Supply Current - Shut Down
Per amplifier
8.5
+1
-25
4
9.5
0
11
+25
-1
S,ON
S,OFF
V +, per amplifier
S
V -, per amplifier
17
S
PSOR
AVOL
Power Supply Operating Range
Open Loop Gain
13.2
R = 1kΩ to GND
55
65
60
dB
dB
V
L
R = 150Ω to GND
L
V
V
Positive Output Voltage Swing
Negative Output Voltage Swing
Output Current
R = 150Ω to 0V
3.6
3.8
OP
ON
L
R = 150Ω to 0V
-3.8
±160
-3.6
V
L
I
R = 10Ω to 0V
±90
mA
V
OUT
L
V
ENABLE Pin Voltage for Power Up
(V +)
S
(V +)
S
IH-EN
-5
-3
V
ENABLE Pin Voltage for Shut Down
(V +)
S
V +
V
IL-EN
S
-1
FN7332.5
4
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Closed Loop AC Electrical Specifications V = +5V, GND = 0V, T = 25°C, V
= +1.5V, V
= +1.5V, V
= +5V,
CLAMP
S
A
CM
L
OUT
V
= 0V, A = +1, R = 0Ω, R = 150Ω to GND pin, unless otherwise specified.
ENABLE
V
F
PARAMETER
BW
SR
DESCRIPTION
-3dB Bandwidth (V = 200mV
CONDITIONS
MIN
TYP
700
3000
0.4
10
MAX
UNIT
MHz
V/µs
ns
)
V
= ±5V, A = 1, R = 0Ω
OUT
P-P
S
V
F
Slew Rate
R = 100Ω, V
= -3V to +3V
OUT
2000
7000
L
t , t
R
Rise Time, Fall Time
Overshoot
±0.1V step
±0.1V step
±0.1V step
F
OS
%
t
t
Propagation Delay
0.1% Settling Time
Differential Gain
Differential Phase
Input Noise Voltage
Input Noise Current
Disable Time
0.4
7
ns
PD
S
V
= ±5V, R = 500Ω, A = 1, V
= ±2.5V
ns
S
L
V
OUT
dG
dP
A
= 2, R = 150Ω, V
= -1 to +1V
= -1 to +1V
0.01
0.02
10
%
V
L
INDC
INDC
A
= 2, R = 150Ω, V
°
V
L
e
f = 10kHz
f = 10kHz
nV/√Hz
pA/√Hz
ns
N
i
54
N
t
t
I
180
650
DIS
EN
EN
Enable Time
ns
Enable Pin Current
Enabled, V
= 0V
= 5V
-1
1
1
µA
EN
Disabled, V
25
µA
EN
FN7332.5
5
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves
5
4
240
180
120
60
V =±5V
S
V =±5V
S
A =+1
V
A =+1
V
R =0
F
3
R =0
F
R =500Ω
L
R =500Ω
L
2
1
0
0
-1
-2
-3
-4
-5
-60
-3dB BW @ 925MHz
-120
-180
-240
100k
1M
10M
100M
1G
10G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. GAIN vs FREQUENCY (-3dB BANDWIDTH)
FIGURE 2. PHASE vs FREQUENCY
70
60
50
40
30
20
0.5
V =±5V
S
0.4
0.3
0.2
0.1
0
A =+1
V
GAIN=40dB or 100
FREQ.=2.64MHz
R =0
F
GAIN BW PRODUCT=2.64x100=264MHz
R =500Ω
L
0.1dB BW @ 39MHz
-0.1
-0.2
-0.3
-0.4
-0.5
V =±5V
L
S
R =500Ω
1
10
FREQUENCY (MHz)
100
0
1
10
100
FREQUENCY (MHz)
FIGURE 3. 0.1dB BANDWIDTH
FIGURE 4. GAIN BANDWIDTH PRODUCT
300
250
200
150
100
50
5
4
V =±5V
L
S
R =500Ω
3
A =+1
F
V
R =0
2
1
0
-1
-2
-3
-4
-5
A =+5
G
V
R =1.6k, R =402
F
V =±5V
L
S
A =+2
V
R =500Ω
R =R =255Ω
F
G
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
100k
1M
10M
100M
1G
SUPPLY VOLTAGES (±V)
FREQUENCY (Hz)
FIGURE 5. GAIN BANDWIDTH PRODUCT vs SUPPLY
VOLTAGES
FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS +A
V
FN7332.5
6
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
5
4
5
4
V =±5
S
A =+1
V
A =+1
V
R =0
F
3
3
R =0
F
R =500Ω
L
V =±6V
S
R =1kΩ
L
2
2
V =±5V
S
1
1
R =500Ω
L
0
0
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
V =±4V
S
R =150Ω
L
V =±3V
S
R =75Ω
L
V =±2V
S
R =50Ω
L
100k
1M
10M
100M
1G
10G
100k
1M
10M
100M
FREQUENCY (Hz)
1G
10G
FREQUENCY (Hz)
FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±Vs
FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS R (A =+1)
L
V
5
5
4
V =±5
S
V =±5
4
3
S
A =+2
V
A =+5
V
R =255Ω
F
3
R =1600Ω
F
C =12pF
L
2
2
R =1kΩ
R =500Ω
L
L
R =1kΩ
1
L
1
R =500Ω
0
L
0
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
R =50Ω
L
R =50Ω
L
R =75Ω
L
R =75Ω
L
R =150Ω
L
R =150Ω
L
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS R (A =+2)
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS R (A =+5)
L
V
L
V
5
4
5
4
C =22pF
L
C =33pF
L
V =±5
S
V =±5
S
C =22pF
L
A =+2
V
A =+1
V
C =5.6pF
L
3
3
R =255Ω
R =0
F
C =12pF
F
L
2
R =500Ω
2
C =15pF
L
R =500Ω
L
L
C =3.3pF
L
1
1
C =8.2pF
L
0
0
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
C =0pF
L
C =0pF
L
100k
1M
10M
100M
1G
10G
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS C (A =+1)
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS C (A =+2)
L
V
L
V
FN7332.5
7
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
5
4
5
4
R =100Ω
V =±5
S
F
V =±5
S
C =100pF
L
A =+1
V
A =+5
V
R =500Ω
R =50Ω
3
R =1600Ω
3
L
F
F
C =68pF
L
R =500Ω
L
2
2
C =39pF
L
R =25Ω
F
1
1
0
0
C =22pF
L
-1
-2
-3
-4
-5
-1
-2
-3
R =0
F
C =0pF
L
-4
-5
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
100M
1G
10G
FREQUENCY (Hz)
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS C (A =+5)
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS R (A =+1)
L
V
F
V
5
4
3
2
1
5
4
V =±5
S
V =±5
S
R =604Ω
F
A =+5
V
A =+2
V
R =6kΩ
F
R =500Ω
R =500Ω
L
R =511Ω
L
3
F
R =4kΩ
F
2
R =402Ω
F
1
R =2kΩ
F
0
0
-1
-1
-2
-3
-4
-5
R =255Ω
F
R =1kΩ
F
-2
-3
-4
-5
R =50Ω
F
R =100Ω
F
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS R (A = +2)
FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS R (A = +5)
F V
F
V
5
4
5
4
V =±5
S
V =±5
S
C
=3.9pF
IN
A =+5
V
C
=4.7pF
IN
A =+2
V
C
=2.7pF
3
IN
3
R =402Ω
R =R =255Ω
C
=3.3pF
G
F
L
G
IN
R =1600Ω
R =500Ω
L
2
2
C
=2.2pF
IN
C
=2.2pF
C =15pF
L
IN
1
1
0
0
C
=1pF
IN
C =1.5pF
IN
-1
-2
-3
-4
-5
-1
-2
-3
-4
-5
C
=0pF
IN
C
=0pF
IN
100k
1M
10M
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 17. GAIN vs FREQUENCY FOR VARIOUS C
FIGURE 18. GAIN vs FREQUENCY FOR VARIOUS C
IN(-)
IN(-)
(A = +2)
(A = +5)
V
V
FN7332.5
8
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
70
50
30
10
100
10
A =+2
V
V =±5V
S
1
0.1
-10
-30
0.01
1k
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 20. Z
OUT
vs FREQUENCY
-10
10
-10
-30
-50
A =+5
V
A =+1
V
V =±5V
S
V =±5V
S
-30
-50
-70
V +
S
-90
-70
-90
V -
S
-110
1k
10k
100k
1M
10M
100M
1G
1k
10k
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. CMRR vs FREQUENCY
FIGURE 22. PSRR vs FREQUENCY
10
9
8
7
6
5
4
3
2
1
0
30
25
20
15
10
5
V =±5V
S
R =500Ω
L
A =+1
V
R =0
F
R =500Ω
L
R =150Ω
L
0
-5
-10
-15
-20
-25
-30
V =±5V
S
A =+2
V
R =R =402Ω
F
G
100k
1M
10M
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100M
1G
FREQUENCY (Hz)
FIGURE 23. MAX OUTPUT VOLTAGE SWING vs FREQUENCY
FIGURE 24. GROUP DELAY vs FREQUENCY
FN7332.5
October 26, 2005
9
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
0
-10
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
V =±5V
S
V =±5V
S
OUTPUT TO INPUT
A =+1
V
A =+1
V
-20
R =0
F
R =0
F
-30
CHIP DISABLED
R =500Ω
L
-40
A IN TO B OUT
-50
-60
-70
INPUT TO OUTPUT
-80
-90
B IN TO A OUT
-100
-110
-120
-130
-140
NOTE:
This was done on the
EL5205 (dual op amp).
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FIGURE 25. INPUT AND OUTPUT ISOLATION
FIGURE 26. CHANNEL TO CHANNEL ISOLATION
-20
-40
-50
-60
-70
-80
-90
V
=±5V
S
V
=±5V
S
A =+5
A =+1
V
-30
-40
V
R
=402Ω
R =0
R =500Ω
V
G
F
L
F
L
R =1600Ω
R =500Ω
=2V
OUT
P-P
T.H.D
-50 C =15pF
L
F
= 10MHz
IN
-60
-70
-80
-90
nd
H.D.
2
F
= 1MHz
6
rd
IN
3
H.D.
-100
-110
-100
0
1
2
3
4
5
7
8
100k
1M
10M
100M
OUTPUT VOLTAGES (V
)
FUNDAMENTAL FREQUENCY (Hz)
P-P
FIGURE 27. HARMONIC DISTORTION vs FREQUENCY
FIGURE 28. TOTAL HARMONIC DISTORTION vs OUTPUT
VOLTAGES
6
6
Vs =±5V
Vs =±5V
A =+1
5
4
A =+1
V
V
5
4
ENABLE SIGNAL
R =0
R =0
F
F
R =500Ω
R =500Ω
L
OUT
L
OUT
DISABLE SIGNAL
OUTPUT SIGNAL
V
=2V
P-P
V
=2V
P-P
3
3
2
2
OUTPUT SIGNAL
1
1
0
0
-1
-2
-3
-1
-2
-3
-600 -400 -200
0
200 400 600 800 1000 1200 1400 1600
TIME (ns)
-600 -400 -200
0
200 400 600 800 1000 1200 1400 1600
TIME (ns)
FIGURE 29. TURN-ON TIME
FIGURE 30. TURN-OFF TIME
FN7332.5
10
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
1K
100
10
0.5
0.4
V =±5V
Vs =±5V
A =+1
S
V
R =0
F
R =500Ω
L
0.3
V
=400mV
OUT
0.2
0.1
T
= 860ps
FALL
0.0
T
=852ps
RISE
-0.1
-0.2
-0.3
1
10
100
1k
10k
100k
-20
0
20 40 60 80 100 120 140 160 180
TIME (ns)
FREQUENCY (Hz)
FIGURE 31. EQUIVALENT NOISE VOLTAGE vs FREQUENCY
FIGURE 32. SMALL SIGNAL STEP RESPONSE_RISE & FALL
TIME
5
12
Vs =±5V
A =+1
V
A =+1
V
4
3
R =0
F
R =0
F
10
8
R =500Ω
L
R =500Ω
L
V
=4.0V
OUT
P-P
2
1
6
T
= 944ps
FALL
0
4
T
=958ps
RISE
-1
-2
-3
NOTE:
2
The curve showed positive current.
The negative current was the same.
0
-20
0
20 40 60 80 100 120 140 160 180
TIME (ns)
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
FIGURE 33. LARGE SIGNAL STEP RESPONSE_RISE & FALL
TIME
FIGURE 34. SUPPLY CURRENT vs SUPPLY VOLTAGE
5000
10
Vs =±5V
A =+2
V
NEGATIVE SLEW RATE
POSITIVE SLEW RATE
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
A =+5
V
R =R =255Ω
4500
4000
F
G
Delta IM=(4)-(-73)=77dB
IP3=4+(77/2)=42.5dBm
R =1600Ω
F
R =500Ω
L
R =100Ω
L
V
=4V
OUT P-P
C =15pF
L
f2=4.1dBm
@ 1.05MHz
3500
3000
2500
2000
1500
1000
f1=4dBm
@ 0.95MHz
2f2-f1=-73dBm
@ 1.15MHz
2f1-f2=-72.7dBm
@ 0.85MHz
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0.8
0.9
1.0
1.1
1.2
SUPPLY VOLTAGES (±V)
FREQUENCY (MHz)
FIGURE 35. SLEW RATE vs SUPPLY VOLTAGES
FIGURE 36. THIRD ORDER IMD INTERCEPT (IP3)
FN7332.5
11
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
Typical Performance Curves (Continued)
60
55
50
45
40
35
30
25
Vs =±5V
A =+5
V
20 R =1600Ω
F
R =100Ω
L
15
10
C =15pF
L
1
10
100
FREQUENCY (MHz)
FIGURE 37. THIRD ORDER IMD INTERCEPT vs FREQUENCY
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
CONDUCTIVITY TEST BOARD
1.4
1
0.8
0.6
0.4
0.2
0
1.2 1.136W
791mW
1.116W
QSOP16
SO8
θ
=158°C/W
1.087W
1
781mW
JA
θ
=110°C/W
JA
SO8
QSOP16
θ
=160°C/W
0.8
JA
607mW
488mW
θ
=112°C/W
JA
MSOP8/10
543mW
0.6
0.4
0.2
0
θ
=206°C/W
JA
MSOP8/10
JA
SOT23-5/6
θ
=115°C/W
125
θ
=256°C/W
JA
SOT23-5/6
θ
=230°C/W
JA
0
25
50
75 85 100
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 38. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7332.5
October 26, 2005
12
EL5104, EL5105, EL5204, EL5205, EL5304
MSOP Package Outline Drawing
FN7332.5
13
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
SO Package Outline Drawing
FN7332.5
14
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
SOT-23 Package Outline Drawing
FN7332.5
15
October 26, 2005
EL5104, EL5105, EL5204, EL5205, EL5304
QSOP Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
FN7332.5
October 26, 2005
16
EL5104, EL5105, EL5204, EL5205, EL5304
Small Outline Trans is tor Plas tic Packages (SC70-5)
D
P5.049
VIEW C
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e1
INCHES
MIN
MILLIMETERS
SYMBOL
MAX
0.043
0.004
0.039
0.012
0.010
0.009
0.009
0.085
0.094
0.053
MIN
0.80
0.00
0.80
0.15
0.15
0.08
0.08
1.85
1.80
1.15
MAX
1.10
0.10
1.00
0.30
0.25
0.22
0.20
2.15
2.40
1.35
NOTES
5
1
4
A
A1
A2
b
0.031
0.000
0.031
0.006
0.006
0.003
0.003
0.073
0.071
0.045
-
-
-
-
E
C
L
C
E1
L
2
3
b
b1
c
e
6
6
3
-
C
L
c1
D
0.20 (0.008) M
C
C
C
L
E
E1
e
3
-
SEATING
PLANE
0.0256 Ref
0.0512 Ref
0.010 0.018
0.65 Ref
1.30 Ref
0.26 0.46
A2
A1
A
e1
L
-
-C-
4
-
L1
L2
0.017 Ref.
0.420 Ref.
0.10 (0.004)
C
0.006 BSC
o
0.15 BSC
o
o
o
0
8
0
8
-
α
N
b
WITH
5
5
5
PLATING
b1
R
0.004
0.004
-
0.10
0.15
-
R1
0.010
0.25
c
c1
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
GAUGE PLANE
SEATING
PLANE
7. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
L
C
α
L2
L1
4X θ1
VIEW C
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
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FN7332.5
17
October 26, 2005
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