EL5220 [INTERSIL]
12MHz Rail-to-Rail Input-Output Op Amps; 12MHz的轨至轨输入输出运算放大器
| 型号： | EL5220 |
| 厂家： | 
Intersil |
| 描述： | 12MHz Rail-to-Rail Input-Output Op Amps |
| 文件： | 总12页 (文件大小：253K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5120, EL5220, EL5420
®
Data Sheet
February 21, 2005
FN7186.4
12MHz Rail-to-Rail Input-Output Op Amps
Features
The EL5120, EL5220, and EL5420 are low power, high
voltage, rail-to-rail input-output amplifiers. The EL5120
contains a single amplifier, the EL5220 contains two
amplifiers, and the EL5420 contains four amplifiers.
Operating on supplies ranging from 5V to 15V, while
consuming only 500µA per amplifier, the EL5120, EL5220,
and EL5420 have a bandwidth of 12MHz (-3dB). They also
provide common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
• 12MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current (per amplifier) = 500µA
• High slew rate = 10V/µs
• Unity-gain stable
• Beyond the rails input capability
• Rail-to-rail output swing
• Ultra-small package
• Pb-Free available (RoHS compliant)
The EL5120, EL5220, and EL5420 also feature fast slewing
and settling times, as well as a high output drive capability of
30mA (sink and source). These features make these
amplifiers ideal for use as voltage reference buffers in Thin
Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices, and
anywhere low power consumption is important.
Applications
• TFT-LCD drive circuits
• Electronics notebooks
• Electronics games
The EL5420 is available in the space-saving 14-pin TSSOP
package, the industry-standard 14-pin SO package, as well
as the 16-pin QFN package. The EL5220 is available in the
8-pin MSOP package and the EL5120 is available in the 5-
pin TSOT and 8-pin HMSOP packages. All feature a
standard operational amplifier pin out. These amplifiers are
specified for operation over the full -40°C to +85°C
temperature range.
• Touch-screen displays
• Personal communication devices
• Personal digital assistants (PDA)
• Portable instrumentation
• Sampling ADC amplifiers
• Wireless LANs
• Office automation
• Active filters
• ADC/DAC buffer
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL5120, EL5220, EL5420
Ordering Information (Continued)
Ordering Information
TAPE &
REEL
TAPE &
REEL
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
PART NUMBER
PACKAGE
PKG. DWG. #
MDP0046
PART NUMBER
EL5120IWT-T7
EL5120IWT-T7A
PACKAGE
5-Pin TSOT
5-Pin TSOT
PKG. DWG. #
MDP0049
MDP0049
MDP0049
EL5420CLZ
(See Note)
16-Pin QFN
(Pb-free)
-
EL5420CLZ-T7
(See Note)
16-Pin QFN
(Pb-free)
7”
MDP0046
MDP0046
EL5120IWTZ-T7
(See Note)
5-Pin TSOT
(Pb-Free)
EL5420CLZ-T13
(See Note)
16-Pin QFN
(Pb-free)
13”
EL5120IWTZ-T7A
(See Note)
5-Pin TSOT
(Pb-Free)
7” (250 pcs)
MDP0049
EL5420CS
EL5420CS-T7
EL5420CS-T13
EL5420CSZ
(See Note)
14-Pin SO
14-Pin SO
14-Pin SO
14-Pin SO
(Pb-free)
-
7”
13”
-
MDP0027
MDP0027
MDP0027
MDP0027
EL5120IYE
EL5120IYE-T7
EL5120IYE-T13
8-Pin HMSOP
8-Pin HMSOP
8-Pin HMSOP
-
7”
13”
-
MDP0050
MDP0050
MDP0050
MDP0050
EL5120IYEZ
(See Note)
8-Pin HMSOP
(Pb-Free)
EL5420CSZ-T7
(See Note)
14-Pin SO
(Pb-free)
7”
MDP0027
MDP0027
EL5120IYEZ-T7
(See Note)
8-Pin HMSOP
(Pb-Free)
7”
MDP0050
MDP0050
EL5420CSZ-T13
(See Note)
14-Pin SO
(Pb-free)
13”
EL5120IYEZ-T13
(See Note)
8-Pin HMSOP
(Pb-Free)
13”
EL5420CR
EL5420CR-T7
EL5420CR-T13
EL5420CRZ
(Note)
14-Pin TSSOP
14-Pin TSSOP
14-Pin TSSOP
14-Pin TSSOP
(Pb-Free)
-
7”
13”
-
MDP0044
MDP0044
MDP0044
MDP0044
EL5220CY
EL5220CY-T7
EL5220CY-13
8-Pin MSOP
8-Pin MSOP
8-Pin MSOP
-
7”
13”
-
MDP0043
MDP0043
MDP0043
MDP0043
EL5220CYZ
(See Note)
8-Pin MSOP
(Pb-Free)
EL5420CRZ-T7
(Note)
14-Pin TSSOP
(Pb-Free)
7”
MDP0044
MDP0044
EL5220CYZ-T7
(See Note)
8-Pin MSOP
(Pb-Free)
7”
MDP0043
MDP0043
EL5420CRZ-T13
(Note)
14-Pin TSSOP
(Pb-Free)
13”
EL5220CYZ-T13
(See Note)
8-Pin MSOP
(Pb-Free)
13”
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which are
RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
EL5420CL
EL5420CL-T7
EL5420CL-T13
16-Pin QFN
16-Pin QFN
16-Pin QFN
-
7”
13”
MDP0046
MDP0046
MDP0046
Pinouts
EL5120
EL5220
EL5420
(5-PIN TSOT)
(8-PIN MSOP)
(16-PIN QFN)
TOP VIEW
TOP VIEW
TOP VIEW
VOUT
VS-
1
2
3
5
4
VS+
VIN-
VOUTA
VINA-
VINA+
VS-
1
2
3
4
8
7
6
5
VS+
-
+
VOUTB
VINB-
VINB+
+
-
VIN+
VINA-
VINA+
VS+
1
2
3
4
12 VIND-
11 VIND+
10 VS-
-
+
THERMAL
PAD
EL5120
(8-PIN HMSOP)
TOP VIEW
EL5420
(14-PIN TSSOP, SO)
TOP VIEW
9
VINC+
VINB+
NC
IN-
1
2
3
4
8
7
6
5
NC
VOUTA
VINA-
VINA+
VS+
1
2
3
4
5
6
7
14 VOUTD
VS+
OUT
NC
13 VIND-
12 VIND+
11 VS-
-
-
+
+
+
+
-
-
-
+
IN+
VS-
VINB+
VINB-
VOUTB
10 VINC+
9
8
VINC-
VOUTC
FN7186.4
2
February 21, 2005
EL5120, EL5220, EL5420
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . .+18V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
S
S
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V - - 0.5V, V +0.5V
S
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 10kΩ and C = 10pF to 0V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 0V
2
5
12
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 0V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
Input Impedance
1
GΩ
pF
IN
IN
C
Input Capacitance
1.35
CMIR
Common-Mode Input Range
-5.5
50
+5.5
V
CMRR
Common-Mode Rejection Ratio
Open Loop Gain
for V from -5.5V to +5.5V
IN
70
95
dB
A
-4.5V ≤ V
≤ +4.5V
OUT
75
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
-4.92
4.92
±120
±30
-4.85
V
V
OL
L
I = 5mA
4.85
60
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from ±2.25V to ±7.75V
80
dB
µA
S
I
No load
500
750
S
-4.0V ≤ V
≤ +4.0V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
t
Settling to +0.1% (A = +1)
V
(A = +1), V = 2V step
V O
S
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10kΩ, C = 10pF
L
= 10kΩ, C = 10 pF
50
75
L
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
FN7186.4
3
February 21, 2005
EL5120, EL5220, EL5420
Electrical Specifications V + = +5V, V - = 0V, R = 10kΩ and C = 10pF to 2.5V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 2.5V
2
5
10
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 2.5V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
Input Impedance
1
GΩ
pF
IN
IN
C
Input Capacitance
1.35
CMIR
Common-Mode Input Range
-0.5
45
+5.5
150
V
CMRR
Common-Mode Rejection Ratio
Open Loop Gain
for V from -0.5V to +5.5V
IN
66
95
dB
A
0.5V ≤ V
≤+ 4.5V
OUT
75
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = +5mA
4.85
60
4.92
±120
±30
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from 4.5V to 15.5V
80
dB
µA
S
I
No load
500
750
S
1V ≤ V
≤ 4V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10 kΩ, C = 10pF
L
= 10 kΩ, C = 10 pF
50
75
L
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
FN7186.4
4
February 21, 2005
EL5120, EL5220, EL5420
Electrical Specifications V + = +15V, V - = 0V, R = 10kΩ and C = 10pF to 7.5V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 7.5V
2
5
14
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 7.5V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
Input Impedance
1
GΩ
pF
IN
IN
C
Input Capacitance
1.35
CMIR
Common-Mode Input Range
-0.5
53
+15.5
150
V
CMRR
Common-Mode Rejection Ratio
Open Loop Gain
for V from -0.5V to +15.5V
IN
72
95
dB
A
0.5V ≤ V
≤ 14.5V
OUT
75
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = +5mA
14.85
60
14.92
±120
±30
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from 4.5V to 15.5V
80
dB
µA
S
I
No load
500
750
S
1V ≤ V
≤ 14V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10kΩ, C = 10pF
L
= 10kΩ, C = 10 pF
50
75
L
CS
Channel Separation
f = 5MHz (EL5220 & EL5420 only)
dB
NOTES:
1. Measured over operating temperature range
2. Slew rate is measured on rising and falling edges
FN7186.4
5
February 21, 2005
EL5120, EL5220, EL5420
Typical Performance Curves
70
1800
TYPICAL
V =±5V
S
TYPICAL
PRODUCTION
DISTRIBUTION
V =±5V
S
1600
1400
1200
1000
800
600
400
200
0
PRODUCTION
DISTRIBUTION
T =25°C
A
60
50
40
30
20
10
0
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE DRIFT, TCV (µV/°C)
OS
FIGURE 1. EL5420 INPUT OFFSET VOLTAGE DISTRIBUTION
FIGURE 2. EL5420 INPUT OFFSET VOLTAGE DRIFT
10
5
V =±5V
S
V =±5V
S
2.0
0.0
0
-5
-2.0
-50
0
50
100
150
-50
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
4.97
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
-4.91
V =±5V
S
V =±5V
S
I
=5mA
OUT
I
=-5mA
OUT
-4.92
-4.93
-4.94
-4.95
-4.96
-4.97
4.96
4.95
4.94
4.93
-50
0
50
100
150
-50
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
FN7186.4
February 21, 2005
6
EL5120, EL5220, EL5420
Typical Performance Curves (Continued)
V =±5V
10.40
10.35
10.30
10.25
S
V =±5V
S
100
90
R =10kΩ
L
80
-50
0
50
100
150
-50
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 7. OPEN LOOP GAIN vs TEMPERATURE
FIGURE 8. SLEW RATE vs TEMPERATURE
700
V =±5V
S
T =25°C
A
0.55
0.5
600
500
400
300
0.45
-50
0
50
100
150
0
5
10
15
20
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
FIGURE 9. EL5420 SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
FIGURE 10. EL5420 SUPPLY CURRENT PER AMPLIFIER vs
SUPPLY VOLTAGE
200
20
5
10kΩ
150
100
50
-30
PHASE
0
1kΩ
-80
560Ω
-5
150Ω
-130
-10
V =±5V, T =25°C
C =10pF
L
0
S
A
-180
-230
GAIN
R =10KΩ to GND
A =1
V
L
C =12pF to GND
L
V =±5V
S
-50
-15
10
100
1K
10K 100K 1M
10M 100M
1M
FREQUENCY (Hz)
100M
100K
10M
FREQUENCY (Hz)
FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS R
L
FN7186.4
7
February 21, 2005
EL5120, EL5220, EL5420
Typical Performance Curves (Continued)
20
10
200
160
120
80
R =10kΩ
L
A =1
V
A =1
V
V =±5V
S
V =±5V
S
T =25°C
A
12pF
50pF
100pF
0
-10
-20
-30
40
1000pF
0
1M
FREQUENCY (Hz)
100M
100K
10M
10K
100K
1M
10M
FREQUENCY (Hz)
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs
FREQUENCY
L
80
60
40
20
12
10
8
6
V =±5V
S
T =25°C
A
4
2
0
A =1
V
R =10kΩ
L
V =±5V
S
C =12pF
L
T =25°C
A
Distortion <1%
0
1K
10K
100K
100
1M
10K
100K
1M
10M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 15. MAXIMUM OUTPUT SWING vs FREQUENCY
FIGURE 16. CMRR vs FREQUENCY
600
100
80
PSRR+
PSRR-
60
40
20
0
10
V =±5V
S
T =25°C
A
1
100
1K
10K
100K
1M
10M
100M
1K
10K
FREQUENCY (Hz)
100K
1M
100
10M
FREQUENCY (Hz)
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
FN7186.4
8
February 21, 2005
EL5120, EL5220, EL5420
Typical Performance Curves (Continued)
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
-60
-80
DUAL MEASURED CHANNEL A TO B
QUAD MEASURED CHANNEL A TO D
OR B TO C
OTHER COMBINATIONS YIELD
IMPROVED REJECTION
-100
-120
-140
V =±5V
S
V =±5V
S
R =10kΩ
R =10kΩ
L
L
A =1
V
A =1
V
V
=1V
RMS
V
=220mV
RMS
IN
IN
1K
10K
100K
1K
10K
100K
FREQUENCY (Hz)
1M
6M
FREQUENCY (Hz)
FIGURE 19. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
FIGURE 20. CHANNEL SEPARATION vs FREQUENCY
RESPONSE
V =±5V
S
V =±5V
S
90
4
3
2
1
0
-1
-2
-3
-4
A =1
V
A =1
V
R =10kΩ
R =10kΩ
L
L
V
=±50mV
C =12pF
L
IN
0.1%
70
50
30
10
T =25°C
T =25°C
A
A
0.1%
600
0
200
400
SETTLING TIME (ns)
800
10
100
1K
LOAD CAPACITANCE (pF)
FIGURE 21. SMALL SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
FIGURE 22. SETTLING TIME vs STEP SIZE
50mV
200ns
1V
1µs
V =±5V
V =±5V
S
S
T =25°C
A
T =25°C
A
A =1
V
A =1
V
R =10kΩ
R =10kΩ
L
L
C =12pF
L
C =12pF
L
FIGURE 23. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 24. SMALL SIGNAL TRANSIENT RESPONSE
FN7186.4
February 21, 2005
9
EL5120, EL5220, EL5420
Pin Descriptions
EL5120
EL5220
EL5420
PIN NAME
PIN FUNCTION
EQUIVALENT CIRCUIT
1
1
1
VOUTA
Amplifier A Output
V
S+
V
S-
GND
CIRCUIT 1
4
2
2
VINA-
Amplifier A Inverting Input
V
V
S+
S-
CIRCUIT 2
3
5
3
8
5
6
7
3
4
VINA+
VS+
Amplifier A Non-Inverting Input
Positive Power Supply
(Reference Circuit 2)
5
VINB+
VINB-
VOUTB
VOUTC
VINC-
VINC+
VS-
Amplifier B Non-Inverting Input
Amplifier B Inverting Input
Amplifier B Output
(Reference Circuit 2)
(Reference Circuit 2)
(Reference Circuit 1)
(Reference Circuit 1)
(Reference Circuit 2)
(Reference Circuit 2)
6
7
8
Amplifier C Output
9
Amplifier C Inverting Input
Amplifier C Non-Inverting Input
Negative Power Supply
Amplifier D Non-Inverting Input
Amplifier D Inverting Input
Amplifier D Output
10
11
12
13
14
2
4
VIND+
VIND-
VOUTD
(Reference Circuit 2)
(Reference Circuit 2)
(Reference Circuit 1)
Operating Voltage, Input, and Output
Applications Information
The EL5120, EL5220, and EL5420 are specified with a
single nominal supply voltage from 5V to 15V or a split
supply with its total range from 5V to 15V. Correct operation
is guaranteed for a supply range of 4.5V to 16.5V. Most
EL5120, EL5220, and EL5420 specifications are stable over
both the full supply range and operating temperatures of
-40°C to +85°C. Parameter variations with operating voltage
and/or temperature are shown in the typical performance
curves.
Product Description
The EL5120, EL5220, and EL5420 voltage feedback
amplifiers are fabricated using a high voltage CMOS
process. They exhibit rail-to-rail input and output capability,
they are unity gain stable, and have low power consumption
(500µA per amplifier). These features make the EL5120,
EL5220, and EL5420 ideal for a wide range of general-
purpose applications. Connected in voltage follower mode
and driving a load of 10kΩ and 12pF, the EL5120, EL5220,
and EL5420 have a -3dB bandwidth of 12MHz while
maintaining a 10V/µs slew rate. The EL5120 is a single
amplifier, the EL5220 is a dual amplifier, and the EL5420 is a
quad amplifier.
The input common-mode voltage range of the EL5120,
EL5220, and EL5420 extends 500mV beyond the supply
rails. The output swings of the EL5120, EL5220, and
EL5420 typically extend to within 80mV of positive and
negative supply rails with load currents of 5mA. Decreasing
load currents will extend the output voltage range even
closer to the supply rails. Figure 25 shows the input and
FN7186.4
10
February 21, 2005
EL5120, EL5220, EL5420
output waveforms for the device in the unity-gain
configuration. Operation is from ±5V supply with a 10kΩ load
connected to GND. The input is a 10V sinusoid. The
current conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
P-P
output voltage is approximately 9.985V
.
P-P
The maximum power dissipation allowed in a package is
determined according to:
V =±5V
S
T =25°C
A
A =1
V
T
– T
AMAX
Θ
V
=10V
IN
P-P
JMAX
P
= --------------------------------------------
DMAX
JA
where:
• T
• T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
AMAX
• θ = Thermal resistance of the package
JA
• P
DMAX
= Maximum power dissipation in the package
FIGURE 25. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
Short Circuit Current Limit
The EL5120, EL5220, and EL5420 will limit the short circuit
current to ±120mA if the output is directly shorted to the
positive or the negative supply. If an output is shorted
indefinitely, the power dissipation could easily increase such
that the device may be damaged. Maximum reliability is
maintained if the output continuous current never exceeds
±30mA. This limit is set by the design of the internal metal
interconnects.
P
= Σi × [V × I
+ (V + – V
i) × I
i]
LOAD
DMAX
S
SMAX
S
OUT
when sourcing, and:
P
= Σi × [V × I
+ (V
i – V -) × I
i]
LOAD
DMAX
S
SMAX
OUT
S
when sinking.
where:
Output Phase Reversal
The EL5120, EL5220, and EL5420 are immune to phase
• i = 1 to 2 for dual and 1 to 4 for quad
• V = Total supply voltage
reversal as long as the input voltage is limited from (V -)
S
S
-0.5V to (V +) +0.5V. Figure 26 shows a photo of the output
S
of the device with the input voltage driven beyond the supply
rails. Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diodes placed in the input stage of the device
begin to conduct and overvoltage damage could occur.
• I
= Maximum supply current per amplifier
SMAX
• V
• I
i = Maximum output voltage of the application
i = Load current
OUT
LOAD
If we set the two P
can solve for R
equations equal to each other, we
DMAX
i to avoid device overheat. Figures 27
LOAD
and 28 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
1V
100µs
simple matter to see if P
exceeds the device's power
DMAX
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves in Figures 27
and 28.
V =±2.5V
S
T =25°C
A
A =1
V
IN
V
=6V
P-P
1V
FIGURE 26. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5120, EL5220,
and EL5420 amplifiers, it is possible to exceed the 125°C
“absolute-maximum junction temperature” under certain load
FN7186.4
11
February 21, 2005
EL5120, EL5220, EL5420
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
3
2.5
2
2.500W
QFN16
θ
=40°C/W
JA
Driving Capacitive Loads
TSSOP14
=100°C/W
The EL5120, EL5220, and EL5420 can drive a wide range of
capacitive loads. As load capacitance increases, however,
the -3dB bandwidth of the device will decrease and the
peaking increase. The amplifiers drive 10pF loads in parallel
with 10kΩ with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5Ω and 50Ω) can be
placed in series with the output. However, this will obviously
reduce the gain slightly. Another method of reducing peaking
is to add a “snubber” circuit at the output. A snubber is a
shunt load consisting of a resistor in series with a capacitor.
Values of 150Ω and 10nF are typical. The advantage of a
snubber is that it does not draw any DC load current or
reduce the gain
θ
JA
1.5
1
1.136W
SO14
1.0W
θ
=88°C/W
JA
870mW
0.5
0
MSOP8
=115°C/W
θ
JA
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 27. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
833mW
667mW
Power Supply Bypassing and Printed Circuit
Board Layout
SO14
θ
=120°C/W
JA
The EL5120, EL5220, and EL5420 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
QFN16
=150°C/W
606mW
486mW
θ
JA
MSOP8
TSSOP14
JA
θ
=206°C/W
JA
θ
=165°C/W
For normal single supply operation, where the V - pin is
S
connected to ground, a 0.1µF ceramic capacitor should be
0
25
50
75 85 100
125 150
placed from V + to pin to V - pin. A 4.7µF tantalum
S
S
AMBIENT TEMPERATURE (°C)
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
FIGURE 28. PACKAGE POWER DISSIPATION VS AMBIENT
TEMPERATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7186.4
12
February 21, 2005
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