EL5227CR [INTERSIL]
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers; 为2.5MHz 4 ， 8 ， 10及12通道上轨至轨缓冲器
| 型号： | EL5227CR |
| 厂家： | 
Intersil |
| 描述： | 2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail Buffers |
| 文件： | 总12页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5127, EL5227, EL5327, EL5427
®
Data Sheet
September 9, 2005
FN7111.2
2.5MHz 4, 8, 10 & 12 Channel Rail-to-Rail
Buffers
Features
• 2.5MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current (per buffer) = 133µA
• High slew rate = 2.2V/µs
• Rail-to-rail input/output swing
• Ultra-small packages
The EL5127, EL5227, EL5327, and EL5427 are low power,
high voltage rail-to-rail input/output buffers designed for use
in reference voltage buffering applications in small LCD
displays. They are available in quad (EL5127), octal
(EL5227), 10-channel (EL5327), and 12-channel (EL5427)
topologies. All buffers feature a -3dB bandwidth of 2.5MHz
and operate from just 133µA per buffer. This family also
features a continuous output drive capability of 30mA (sink
and source).
• Pb-free plus anneal available (RoHS compliant)
Applications
• TFT-LCD drive circuits
The quad channel EL5127 is available in the 10-pin MSOP
package. The 8-channel EL5227 is available in both the 20-
pin TSSOP and 24-pin QFN packages, the 10-channel
EL5327 in the 24-pin TSSOP and 24-pin QFN packages,
and the 12-channel EL5427 in the 28-pin TSSOP and 32-pin
QFN packages. All buffers are specified for operation over
the full -40°C to +85°C temperature range.
• Electronic games
• Touch-screen displays
• Personal communication devices
• Personal digital assistants (PDAs)
• Portable instrumentation
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL5127, EL5227, EL5327, EL5427
Ordering Information
TAPE &
TAPE &
REEL
PART NUMBER
PACKAGE
REEL
PKG. DWG. #
PART NUMBER
PACKAGE
PKG. DWG. #
EL5127CY
10-Pin MSOP
-
MDP0043
EL5327CLZ
(Note)
24-Pin QFN
(Pb-Free)
-
MDP0046
EL5127CY-T7
EL5127CY-T13
10-Pin MSOP
10-Pin MSOP
7”
13”
-
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0046
MDP0046
EL5327CLZ-T7
(Note)
24-Pin QFN
(Pb-Free)
7”
MDP0046
MDP0046
MDP0044
MDP0044
MDP0044
MDP0044
MDP0044
EL5327CLZ-T13
(Note)
24-Pin QFN
(Pb-Free)
13”
7”
EL5127CYZ
(Note)
10-Pin MSOP
(Pb-Free)
EL5327CR-T7
24-Pin TSSOP
EL5127CYZ-T7
(Note)
10-Pin MSOP
(Pb-Free)
7”
13”
-
EL5327CR-T13
24-Pin TSSOP
13”
-
EL5127CYZ-T13 10-Pin MSOP
(Note)
EL5327CRZ
(Note)
24-Pin TSSOP
(Pb-Free)
(Pb-Free)
EL5227CL
24-Pin QFN
EL5327CRZ-T7 24-Pin TSSOP
(Note) (Pb-Free)
7”
EL5227CL-T7
24-Pin QFN
7”
EL5327CRZ-T13 24-Pin TSSOP
(Note)
13”
(Pb-Free)
32-Pin QFN
32-Pin QFN
EL5227CL-T13
24-Pin QFN
13”
-
MDP0046
MDP0046
EL5427CL
EL5427CL-T7
-
MDP0046
MDP0046
EL5227CLZ
(Note)
24-Pin QFN
(Pb-Free)
7”
EL5227CLZ-T7
(Note)
24-Pin QFN
(Pb-Free)
7”
13”
-
MDP0046
MDP0046
MDP0044
MDP0044
EL5427CL-T13
32-Pin QFN
13”
-
MDP0046
MDP0046
MDP0046
MDP0046
EL5227CLZ-T13
(Note)
24-Pin QFN
(Pb-Free)
EL5427CLZ
(Note)
32-Pin QFN
(Pb-Free)
EL5227CR
20-Pin TSSOP
20-Pin TSSOP
20-Pin TSSOP
EL5427CLZ-T7
(Note)
32-Pin QFN
(Pb-Free)
7”
EL5227CR-T7
EL5227CR-T13
7”
EL5427CLZ-T13
(Note)
32-Pin QFN
(Pb-Free)
13”
13”
-
MDP0044
MDP0044
EL5427CR
28-Pin TSSOP
28-Pin TSSOP
-
MDP0044
MDP0044
EL5227CRZ
(Note)
20-Pin TSSOP
(Pb-Free)
EL5427CR-T7
7”
EL5227CRZ-T7 20-Pin TSSOP
(Note) (Pb-Free)
7”
13”
-
MDP0044
MDP0044
MDP0046
MDP0046
MDP0046
EL5427CR-T13
28-Pin TSSOP
13”
-
MDP0044
MDP0044
MDP0044
MDP0044
EL5227CRZ-T13 20-Pin TSSOP
EL5427CRZ
(Note)
28-Pin TSSOP
(Pb-Free)
(Note)
(Pb-Free)
EL5327CL
24-Pin QFN
EL5427CRZ-T7 28-Pin TSSOP
(Note) (Pb-Free)
7”
EL5327CL-T7
EL5327CL-T13
24-Pin QFN
7”
EL5427CRZ-T13 28-Pin TSSOP
(Note) (Pb-Free)
13”
24-Pin QFN
13”
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
EL5127, EL5227, EL5327, EL5427
Pinouts
EL5127
EL5227
(20-PIN TSSOP)
TOP VIEW
EL5327
(24-PIN TSSOP)
TOP VIEW
EL5427
(28-PIN TSSOP)
TOP VIEW
(10-PIN MSOP)
TOP VIEW
VIN1
VIN2
VIN3
VIN4
VS+
1
20 VOUT1
19 VOUT2
18 VOUT3
17 VOUT4
16 VS-
VIN1
VIN2
VIN3
VIN4
VIN5
VS+
1
2
3
4
5
6
7
8
9
24 VOUT1
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VS+
1
2
3
4
5
6
7
8
9
28 VOUT1
VIN1
VIN2
VS+
1
2
3
4
5
10 VOUT1
2
3
4
5
6
7
8
9
23 VOUT2
22 VOUT3
21 VOUT4
20 VOUT5
19 VS-
27 VOUT2
26 VOUT3
25 VOUT4
24 VOUT5
23 VOUT6
22 VS-
9
VOUT2
VS-
8
7
6
VIN3
VIN4
VOUT3
VOUT4
VS+
15 VS-
VIN5
VIN6
VIN7
14 VOUT5
13 VOUT6
12 VOUT7
11 VOUT8
VS+
18 VS-
VIN6
VIN7
17 VOUT6
16 VOUT7
15 VOUT8
14 VOUT9
VS+
21 VS-
VIN7
20 VOUT7
19 VOUT8
18 VOUT9
17 VOUT10
16 VOUT11
15 VOUT12
VIN8 10
VIN8 10
VIN9 11
VIN8 10
VIN9 11
VIN10 12
13 VOUT10 VIN10 12
VIN11 13
VIN12 14
EL5227, EL5327
(24-PIN QFN)
TOP VIEW
EL5427
(32-PIN QFN)
TOP VIEW
VIN3
VIN4
VIN5
VS+
1
2
3
4
5
6
7
19 VOUT3
18 VOUT4
17 VOUT5
16 VS-
VIN3
VIN4
VIN5
VIN6
VS+
1
2
3
4
5
6
7
8
9
25 VOUT3
24 VOUT4
23 VOUT5
22 VOUT6
21 VS-
THERMAL
PAD
THERMAL
PAD
VIN6
VIN7
VIN8
15 VOUT6
14 VOUT7
13 VOUT8
VIN7
VIN8
VIN9
VIN10
20 VOUT7
19 VOUT8
18 VOUT9
17 VOUT10
* NOT AVAILABLE IN EL5227
3
EL5127, EL5227, EL5327, EL5427
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage Between V + and V -. . . . . . . . . . . . . . . . . . . .+18V
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
S
S
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . .V - -0.5V, V +0.5V
S
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA
ESD Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 10kΩ, C = 10pF to 0V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
15
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 0V
1
5
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 0V
Average Offset Voltage Drift
Input Bias Current
Input Impedance
OS
I
V
2
50
B
CM
R
1
GΩ
IN
IN
C
Input Capacitance
Voltage Gain
1.35
pF
AV
-4.5V ≤ V
≤ 4.5V
0.99
1.01
-4.85
30
V/V
OUT
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
I = -5mA
-4.95
4.95
V
V
OL
OH
L
Output Swing High
I = +5mA
4.85
100
L
I
(max)
Max Output Current (Note 2)
R
= 10Ω
±120
mA
OUT
L
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current
V
is moved from ±2.25V to ±7.75V
55
80
0.7
1.2
1.4
1.6
dB
mA
mA
mA
mA
S
I
No load (EL5127)
No load (EL5227)
No load (EL5327)
No load (EL5427)
0.9
1.4
2
S
2.2
DYNAMIC PERFORMANCE
SR Slew Rate (Note 3)
-4.0V ≤ V
≤ 4.0V, 20% to 80%
0.9
2.2
900
2.5
75
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
= 10kΩ, C = 10pF
MHz
dB
L
L
CS
Channel Separation
f = 100kHz
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
4
EL5127, EL5227, EL5327, EL5427
Electrical Specifications V + = +5V, V - = 0V, R = 10kΩ, C = 10pF to 2.5V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
15
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 2.5V
CM
1
5
mV
µV/°C
nA
OS
TCV
Average Offset Voltage Drift
Input Bias Current
Input Impedance
(Note 1)
= 2.5V
OS
I
V
2
50
B
CM
R
1
GΩ
IN
IN
V
C
Input Capacitance
Voltage Gain
1.35
pF
A
0.5V ≤ V
≤ 4.5V
0.99
1.01
150
V/V
OUT
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
I = -5mA
80
mV
V
OL
OH
L
Output Swing High
Output Current (Note 2)
I = +5mA
4.85
100
4.95
±120
L
I
(max)
R
= 10Ω
mA
OUT
L
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current
V
is moved from 4.5V to 15.5V
55
80
0.7
dB
mA
mA
mA
mA
S
I
No load (EL5127)
No load (EL5227)
No load (EL5327)
No load (EL5427)
0.9
1.35
1.9
S
1.1
1.35
1.5
2.05
DYNAMIC PERFORMANCE
SR Slew Rate (Note 3)
1V ≤ V
≤ 4V, 20% to 80%
0.9
1.5
1000
2.5
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
= 10kΩ, C = 10pF
MHz
dB
L
L
CS
Channel Separation
f = 5MHz
75
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
5
EL5127, EL5227, EL5327, EL5427
Electrical Specifications
V + = +15V, V - = 0V, R = 10kΩ, C = 10pF to 7.5V, T = 25°C, unless otherwise specified.
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
18
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 7.5V
1
5
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 7.5V
Average Offset Voltage Drift
Input Bias Current
Input Impedance
OS
I
V
2
50
B
CM
R
1
GΩ
IN
IN
C
Input Capacitance
Voltage Gain
1.35
pF
AV
0.5V ≤ V
≤ 14.5V
0.99
1.01
150
V/V
OUT
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
I = -5mA
50
mV
V
OL
OH
L
Output Swing High
Output Current (Note 2)
I = +5mA
14.85
100
14.95
±120
L
I
(max)
R
= 10Ω
mA
OUT
L
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current
V
is moved from 4.5V to 15.5V
55
80
0.75
1.3
dB
mA
mA
mA
mA
S
I
No load (EL5127)
No load (EL5227)
No load (EL5327)
No load (EL5427)
0.95
1.55
2.1
S
1.5
1.6
2.4
DYNAMIC PERFORMANCE
SR Slew Rate (Note 3)
1V ≤ V
≤ 14V, 20% to 80%
0.9
2.2
900
2.5
75
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
= 10kΩ, C = 10pF
MHz
dB
L
L
CS
Channel Separation
f = 5MHz
NOTES:
1. Measured over operating temperature range.
2. Instantaneous peak current.
3. Slew rate is measured on rising and falling edges.
6
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
20
20
C =10pF
R =10kΩ
L
L
V =±5V
V =±5V
S
S
10
0
10
0
47pF
12pF
10kΩ
562Ω
1kΩ
1nF
100pF
-10
-20
-30
-10
-20
-30
150Ω
1K
10K
100K
1M
10M
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. FREQEUNCY RESPONSE FOR VARIOUS R
2000
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS C
L
L
12
10
8
T =25°C
A
V =±5V
S
1600
1200
800
400
0
6
4
V =±5V
S
R =10kΩ
L
2
0
C =12pF
L
T =25°C
A
1K
10K
100K
1M
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. OUTPUT IMPEDANCE vs FREQUENCY
FIGURE 4. MAXIMUM OUTPUT SWING vs FREQUENCY
300
100
0.12
0.1
0.08
0.06
0.04
0.02
0
10
1K
10K
100K
1M
10M
100M
1K
10K
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
FIGURE 6. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
7
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
18
16
14
12
10
8
100
V =±5V
S
90
80
70
60
50
40
30
20
0
R =10kΩ
L
V
=±50mV
IN
T =25°C
A
6
4
2
0
10
100
1K
CAPACITANCE (pF)
INPUT OFFSET VOLTAGE (mV)
FIGURE 7. SMALL SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
FIGURE 8. INPUT OFFSET VOLTAGE DISTRIBUTION
3.5
4.955
V =±5V
S
V =±5V
S
I
=5mA
OUT
4.95
4.945
4.94
3
2.5
2
4.935
4.93
1.5
1
4.925
-35
-15
5
25
45
65
85
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE
-4.938
FIGURE 10. OUTPUT HIGH VOLTAGE vs TEMPERATURE
1.0045
V =±5V
V =±5V
S
S
I
=-5mA
1.004
1.0035
1.003
OUT
-4.942
-4.946
-4.95
1.0025
1.002
-4.954
-4.958
1.0015
1.001
-35
-15
5
25
45
65
85
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 11. OUTPUT LOW VOLTAGE vs TEMPERATURE
FIGURE 12. VOLTAGE GAIN vs TEMPERATURE
8
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
2.255
2.245
2.235
2.225
0.185
V =±5V
S
0.18
0.175
0.17
0.165
0.16
V =±5V
S
2.215
-40
-20
0
20
40
60
80
-35
-15
5
25
45
65
85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 13. SLEW RATE vs TEMPERATURE
FIGURE 14. SUPPLY CURRENT PER CHANNEL vs
TEMPERATURE
0.195
T =25°C
A
0.19
0.185
0.18
1V/DIV
0.175
0.17
0.165
4
6
8
10
12
14
16
18
4µs/DIV
SUPPLY VOLTAGE (V)
FIGURE 15. SUPPLY CURRENT PER CHANNEL vs SUPPLY
VOLTAGE
FIGURE 16. LARGE SIGNAL TRANSIENT RESPONSE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
3
2.857W
2.5 2.703W
QFN32
θ
=35°C/W
JA
2
1.5
1
QFN24
θ
=37°C/W
20mV/DIV
JA
870mW
0.5
0
MSOP10
=115°C/W
θ
JA
0
25
50
75 85 100
125
150
1µs/DIV
AMBIENT TEMPERATURE (°C)
FIGURE 17. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
9
EL5127, EL5227, EL5327, EL5427
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
CONDUCTIVITY TEST BOARD
758mW
1.4
1.2
1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.333W
1.176W
714mW
QFN32
1.111W
TSSOP24
=85°C/W
θ
=132°C/W
JA
θ
JA
0.8
0.6
0.4
0.2
0
486mW
QFN24
=140°C/W
TSSOP28
θ
JA
θ
=75°C/W
JA
MSOP10
TSSOP20
=90°C/W
θ
=206°C/W
JA
θ
JA
0
25
50
75 85 100
125
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
833mW
781mW
714mW
TSSOP28
=120°C/W
θ
JA
TSSOP24
=128°C/W
θ
JA
TSSOP20
=140°C/W
θ
JA
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
temperatures of -40°C to +85°C. Parameter variations with
operating voltage and/or temperature are shown in the
typical performance curves.
Applications Information
Product Description
The EL5127, EL5227, EL5327, and EL5427 unity gain
buffers are fabricated using a high voltage CMOS process. It
exhibits rail-to-rail input and output capability and has low
power consumption (120µA per buffer). These features
make the EL5127, EL5227, EL5327, and EL5427 ideal for a
wide range of general-purpose applications. When driving a
load of 10kΩ and 12pF, the EL5127, EL5227, EL5327, and
EL5427 have a -3dB bandwidth of 2.5MHz and exhibits
2.2V/µs slew rate.
The output swings of the EL5127, EL5227, EL5327, and
EL5427 typically extend to within 80mV of positive and
negative supply rails with load currents of 5mA. Decreasing
load currents will extend the output voltage range even
closer to the supply rails. Figure 22 shows the input and
output waveforms for the device. Operation is from ±5V
supply with a 10kΩ load connected to GND. The input is a
10V
sinusoid. The output voltage is approximately
P-P
9.985V
.
P-P
Operating Voltage, Input, and Output
The EL5127, EL5227, EL5327, and EL5427 are specified
with a single nominal supply voltage from 5V to 15V or a split
supply with its total range from 5V to 15V. Correct operation
is guaranteed for a supply range of 4.5V to 16.5V. Most
EL5127, EL5227, EL5327, and EL5427 specifications are
stable over both the full supply range and operating
10
EL5127, EL5227, EL5327, EL5427
application to determine if load conditions need to be
modified for the buffer to remain in the safe operating area.
5V
10µs
The maximum power dissipation allowed in a package is
determined according to:
T
- T
AMAX
JMAX
P
= --------------------------------------------
DMAX
Θ
JA
V =±5V
S
where:
T =25°C
A
V
=10V
P-P
IN
5V
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
FIGURE 22. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
T
AMAX
Short Circuit Current Limit
θ
= Thermal resistance of the package
JA
The EL5127, EL5227, EL5327, and EL5427 will limit the
short circuit current to ±120mA if the output is directly
shorted to the positive or the negative supply. If an output is
shorted indefinitely, the power dissipation could easily
increase such that the device may be damaged. Maximum
reliability is maintained if the output continuous current never
exceeds ±30mA. This limit is set by the design of the internal
metal interconnects.
P
= Maximum power dissipation in the package
DMAX
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
P
= Σi[V × I
+ (V + - V
i) × I
i]
LOAD
DMAX
S
SMAX
S
OUT
when sourcing, and:
Output Phase Reversal
The EL5127, EL5227, EL5327, and EL5427 are immune to
phase reversal as long as the input voltage is limited from
P
= Σi[V × I
+ (V
i - V -) × I
i]
LOAD
DMAX
S
SMAX
OUT
S
V - -0.5V to V + +0.5V. Figure 23 shows a photo of the
S
S
when sinking.
where:
output of the device with the input voltage driven beyond the
supply rails. Although the device's output will not change
phase, the input's overvoltage should be avoided. If an input
voltage exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage of
the device begin to conduct and overvoltage damage could
occur.
i = 1 to Total number of buffers
V = Total supply voltage
S
I
= Maximum quiescent current per channel
SMAX
1V
10µs
V
i = Maximum output voltage of the application
OUT
I
i = Load current
LOAD
If we set the two P
equations equal to each other, we
i to avoid device overheat. The package
DMAX
can solve for R
LOAD
power dissipation curves provide a convenient way to see if
the device will overheat. The maximum safe power
V =±2.5V
S
T =25°C
A
dissipation can be found graphically, based on the package
type and the ambient temperature. By using the previous
V
=6V
IN
P-P
1V
equation, it is a simple matter to see if P
device's power derating curves.
exceeds the
DMAX
FIGURE 23. OPERATION WITH BEYOND-THE-RAILS INPUT
Unused Buffers
Power Dissipation
It is recommended that any unused buffer have the input tied
to the ground plane.
With the high-output drive capability of the EL5127, EL5227,
EL5327, and EL5427 buffer, it is possible to exceed the
125°C “absolute-maximum junction temperature” under
certain load current conditions. Therefore, it is important to
calculate the maximum junction temperature for the
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EL5127, EL5227, EL5327, EL5427
Driving Capacitive Loads
The EL5127, EL5227, EL5327, and EL5427 can drive a wide
range of capacitive loads. As load capacitance increases,
however, the -3dB bandwidth of the device will decrease and
the peaking increase. The buffers drive 10pF loads in
parallel with 10kΩ with just 1.5dB of peaking, and 100pF
with 6.4dB of peaking. If less peaking is desired in these
applications, a small series resistor (usually between 5Ω and
50Ω) can be placed in series with the output. However, this
will obviously reduce the gain slightly. Another method of
reducing peaking is to add a “snubber” circuit at the output.
A snubber is a shunt load consisting of a resistor in series
with a capacitor. Values of 150Ω and 10nF are typical. The
advantage of a snubber is that it does not draw any DC load
current or reduce the gain.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible, and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
normal single supply operation, where the V - pin is
S
connected to ground, a 0.1µF ceramic capacitor should be
placed from V + pin to V - pin. A 4.7µF tantalum capacitor
S
S
should then be connected from V + pin to ground. One
S
4.7µF capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply pin
to ground if split supplies are to be used.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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