EL8172FSZ [INTERSIL]

Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers; 微功耗,单电源,轨到轨输入输出仪表放大器
EL8172FSZ
型号: EL8172FSZ
厂家: Intersil    Intersil
描述:

Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
微功耗,单电源,轨到轨输入输出仪表放大器

仪表放大器
文件: 总14页 (文件大小:643K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
EL8171, EL8172  
®
Data Sheet  
August 3, 2007  
FN6293.3  
Micropower, Single Supply, Rail-to-Rail  
Input-Output Instrumentation Amplifiers  
Features  
• 95µA maximum supply current  
The EL8171 and EL8172 are micropower instrumentation  
amplifiers optimized for single supply operation over the  
+2.4V to +5.5V range. Inputs and outputs can operate rail-to-  
rail. As with all instrumentation amplifiers, a pair of inputs  
provide very high common-mode rejection and are  
completely independent from a pair of feedback terminals.  
The feedback terminals allow zero input to be translated to  
any output offset, including ground. A feedback divider  
controls the overall gain of the amplifier.  
• Maximum input offset voltage  
- 300µV (EL8172)  
- 1500µV (EL8171)  
• 50pA maximum input bias current  
• 450kHz -3dB bandwidth (G = 10)  
• 170kHz -3dB bandwidth (G = 100)  
• Single supply operation  
- Input voltage range is rail-to-rail  
- Output swings rail-to-rail  
- Ground Sensing  
The EL8172 is compensated for a gain of 100 or more, and  
the EL8171 is compensated for a gain of 10 or more. The  
EL8171 and EL8172 have PMOS input devices that provide  
sub-nA input bias currents.  
• Pb-free plus anneal available (RoHS compliant)  
The amplifiers can be operated from one lithium cell or two  
Ni-Cd batteries. The EL8171 and EL8172 input range goes  
from below ground to slightly above positive rail. The output  
stage swings completely to ground (ground sensing) or  
positive supply - no pull-up or pull-down resistors are  
needed.  
Applications  
• Battery- or solar-powered systems  
• Strain gauges  
• Current monitors  
• Thermocouple amplifiers  
Pinout  
EL8171, EL8172  
(8 LD SOIC)  
TOP VIEW  
Ordering Information  
PART  
NUMBER  
(Note)  
PART  
MARKING  
PACKAGE  
(Pb-free)  
PKG.  
DWG. #  
+
EN  
IN-  
IN+  
V-  
1
2
3
4
8
7
6
5
FB+  
V+  
-
EL8171FSZ*  
EL8172FSZ*  
8171FSZ  
8172FSZ  
8 Ld SOIC  
8 Ld SOIC  
MDP0027  
MDP0027  
-
Σ
+
VOUT  
FB-  
*Add “-T7” suffix for tape and reel. Please refer to TB347 for details  
on reel specifications.  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations. Intersil  
Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved.  
1
All other trademarks mentioned are the property of their respective owners.  
EL8171, EL8172  
Absolute Maximum Ratings (T = +25°C)  
Thermal Information  
A
Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V  
+
Thermal Resistance  
θ
(°C/W)  
110  
JA  
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA  
Differential Input Voltage (EL8172) . . . . . . . . . . . . . . . . . . . . . . 0.5V  
Differential Input Voltage (EL8171) . . . . . . . . . . . . . . . . . . . . . . 1.0V  
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .  
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite  
Ambient Operating Temperature . . . . . . . . . . . . . . .-40°C to +125°C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V to V + 0.5V  
EN  
+
ESD Rating  
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and  
result in failures not covered by warranty.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests  
are at the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
Electrical Specifications  
V
= +5V, V- = GND, VCM = 1/2V  
V
= V-, R = Open, T = +25°C, unless otherwise specified. Boldface  
L A  
+
+
EN  
limits apply over the operating temperature range, -40°C to +125°C.  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 1)  
TYP  
(Note 1) UNIT  
DC SPECIFICATIONS  
V
Input Offset Voltage  
EL8171  
EL8172  
-1.5  
-2  
±0.47  
±0.07  
1.5  
2
mV  
mV  
OS  
-0.3  
0.3  
-0.7  
0.7  
TCV  
Input Offset Voltage Temperature  
Coefficient  
EL8171  
EL8172  
1.5  
0.14  
±4  
µV/°C  
µV/°C  
OS  
I
I
Input Offset Current, ± IN, ± FB  
Input Bias Current  
-25  
-500  
25  
500  
pA  
pA  
OS  
B
-50  
-4  
±10  
50  
4
pA  
nA  
V
Input Voltage Range  
Guaranteed by CMRR test  
= 0V to +5V  
0
75  
5
V
IN  
CMRR  
PSRR  
Common Mode Rejection Ratio  
Power Supply Rejection Ratio  
V
100  
90  
dB  
dB  
dB  
%
CM  
EL8171, V = 2.4V to 5V  
75  
+
EL8172, V = 2.4V to 5V  
75  
100  
+
E
V
Gain Error  
EL8171, R = 100kΩ to 2.5V  
-0.7  
±0.15  
±0.2  
0.7  
G
L
EL8172, R = 100kΩ to 2.5V  
-1  
-1.5  
+1  
1.5  
%
%
L
Maximum Voltage Swing  
Output low, 100kΩ to 2.5V  
Output low, 1kΩ to 2.5V  
Output high, 100kΩ to 2.5V  
Output high, 1kΩ to GND  
4
10  
10  
mV  
mV  
OUT  
0.13  
4.996  
4.87  
65  
0.2  
0.25  
V
V
4.985  
4.980  
V
V
4.860  
4.750  
V
V
I
I
Supply Current, Enabled  
Supply Current, Disabled  
45  
38  
95  
110  
µA  
µA  
µA  
S,EN  
S,DIS  
EL8171: EN = V  
EL8172: EN = V  
1.8  
1.3  
2.6  
4
5
+
+
1.8  
4.5  
7.0  
1.5  
25  
FN6293.3  
August 3, 2007  
2
EL8171, EL8172  
Electrical Specifications  
V
= +5V, V- = GND, VCM = 1/2V  
V
= V-, R = Open, T = +25°C, unless otherwise specified. Boldface  
EN L A  
+
+
limits apply over the operating temperature range, -40°C to +125°C. (Continued)  
MIN  
MAX  
PARAMETER  
DESCRIPTION  
CONDITIONS  
(Note 1)  
TYP  
0.5  
(Note 1) UNIT  
V
EN Pin for Shut-down  
EN Pin for Shut-down  
EN Pin for Power-on  
EN Pin for Power-on  
Supply Operating Range  
2
V
ENH  
I
µA  
ENH  
V
0.8  
5.5  
V
µA  
V
ENL  
I
0.5  
ENL  
V
V+ to V- (Note 2)  
2.4  
SUPPLY  
I
I
Output Source Current into 10Ω to V /2  
V
V
V
V
= 5V  
23  
19  
32  
8
mA  
O+  
+
+
+
+
+
= 2.4V  
= 5V  
6
4.5  
mA  
mA  
mA  
Output Sink Current into 10Ω to V /2  
19  
15  
26  
7
O-  
+
= 2.4V  
5
4
AC SPECIFICATIONS  
-3dB BW -3dB Bandwidth  
EL8171  
EL8172  
Gain = 10V/V  
Gain = 20  
450  
210  
66  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
kHz  
Gain = 50  
Gain = 100  
Gain = 100  
Gain = 200  
Gain = 500  
Gain = 1000  
f = 0.1Hz to 10Hz  
33  
170  
70  
25  
12  
e
Input Noise Voltage  
EL8171  
EL8172  
EL8171  
EL8172  
14  
µV  
N
P-P  
P-P  
10  
µV  
Input Noise Voltage Density  
Input Noise Current Density  
f = 1kHz  
220  
80  
nV/Hz  
nV/Hz  
pA/Hz  
pA/Hz  
dB  
o
i
EL8171, f = 1kHz  
0.9  
0.2  
85  
N
o
EL8172, f = 1kHz  
o
CMRR @ 60Hz Input Common Mode Rejection Ratio  
EL8171  
EL8172  
EL8171  
EL8172  
V
R
= 1V  
,
PP  
CM  
= 10kΩ to V  
L
CM  
100  
90  
dB  
PSRR+ @  
120Hz  
Power Supply Rejection Ratio (V )  
V , V = ±2.5V,  
dB  
+
+
-
V
= 1V ,  
SOURCE  
= 10kΩ to V  
PP  
92  
dB  
R
L
CM  
PSRR- @  
120Hz  
Power Supply Rejection Ratio (V )  
EL8171  
EL8172  
V , V = ±2.5V,  
97  
92  
dB  
dB  
-
+
-
V
= 1V ,  
SOURCE  
= 10kΩ to V  
PP  
R
L
CM  
TRANSIENT RESPONSE  
SR  
Slew Rate  
R
= 1kΩ to GND  
0.4  
0.55  
0.7  
V/µs  
L
0.35  
0.7  
NOTES:  
1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.  
2. V  
= +5.25V max when V  
= +V (device in disable state).  
ENL  
SUPPLY  
FN6293.3  
August 3, 2007  
3
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified.  
+
-
CM  
EN  
L
70  
60  
50  
40  
30  
20  
10  
90  
80  
70  
60  
50  
40  
30  
COMMON-MODE INPUT = 1/2V+  
COMMON-MODE INPUT = 1/2V+  
GAIN = 10,000  
GAIN = 5,000  
GAIN = 1000  
GAIN = 500  
GAIN = 200  
GAIN = 100  
GAIN = 50  
GAIN = 2,000  
GAIN = 1,000  
GAIN = 500  
GAIN = 20  
GAIN = 10  
GAIN = 200  
GAIN = 100  
1
10  
100  
1k  
10k  
100k  
1M  
1
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 1. EL8171 FREQUENCY RESPONSE vs CLOSED  
LOOP GAIN  
FIGURE 2. EL8172 FREQUENCY RESPONSE vs CLOSED  
LOOP GAIN  
25  
20  
45  
40  
V
= 5V  
+
35  
30  
25  
20  
15  
10  
5
V
= 5V  
+
V
= 2.4V  
15  
10  
+
V
= 2.4V  
+
A
R
C
= 100  
= 10kΩ  
= 10pF  
A
R
C
= 10  
= 10kΩ  
= 10pF  
V
L
L
F
F
G
V
L
L
F
F
G
5
0
R /R = 100  
R
R
R /R = 10  
R
R
G
G
= 10kΩ  
= 1kΩ  
= 100Ω  
= 100Ω  
0
10  
100  
1k  
10k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 3. EL8171 FREQUENCY RESPONSE vs SUPPLY  
VOLTAGE  
FIGURE 4. EL8172 FREQUENCY RESPONSE vs SUPPLY  
VOLTAGE  
50  
25  
820pF  
470pF  
2200pF  
1200pF  
45  
40  
35  
30  
25  
20  
220pF  
15  
100pF  
820pF  
56pF  
A
= 10  
A
= 10  
V
V
R = 10kΩ  
R = 10kΩ  
C
R /R = 10  
R
R
10  
5
= 10pF  
C
L
= 10pF  
L
R /R = 10  
F
F
G
G
F
F
G
G
R
R
= 10kΩ  
= 10kΩ  
= 100Ω  
= 100Ω  
10  
10  
100  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 5. EL8171 FREQUENCY RESPONSE vs C  
FIGURE 6. EL8172 FREQUENCY RESPONSE vs C  
LOAD  
LOAD  
FN6293.3  
August 3, 2007  
4
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
120  
90  
80  
70  
100  
80  
60  
40  
20  
0
60  
50  
40  
30  
A
= 10  
A = 100  
V
V
20  
10  
0
-10  
10  
100  
1k  
10k  
100k  
1M  
10  
100  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 8. EL8172 CMRR vs FREQUENCY  
FIGURE 7. EL8171 CMRR vs FREQUENCY  
120  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
PSRR+  
PSRR+  
PSRR-  
PSRR-  
A
= 10  
100  
V
A
= 10  
100  
V
10  
1k  
10k  
100k  
1M  
10  
1k  
10k  
100k  
1M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 9. EL8171 PSRR vs FREQUENCY  
FIGURE 10. EL8172 PSRR vs FREQUENCY  
1400  
1200  
1000  
800  
600  
400  
200  
0
700  
600  
500  
400  
300  
200  
100  
0
A
= 10  
100  
V
A
= 100  
V
1
10  
1k  
10k  
100k  
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 11. EL8171 VOLTAGE NOISE SPECTRAL DENSITY  
FIGURE 12. EL8172 VOLTAGE NOISE SPECTRAL DENSITY  
FN6293.3  
August 3, 2007  
5
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
6
5
4
3
2
1
0
A
= 100  
V
A
= 10  
V
1
10  
100  
1k  
10k  
100k  
10k  
1
10  
100  
1k  
100k  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 13. EL8171 CURRENT NOISE SPECTRAL DENSITY  
FIGURE 14. EL8172 CURRENT NOISE SPECTRAL DENSITY  
TIME (1s/DIV)  
TIME (1s/DIV)  
FIGURE 15. EL8171 0.1Hz TO 10Hz INPUT VOLTAGE NOISE  
(GAIN = 10)  
FIGURE 16. EL8172 0.1Hz TO 10Hz INPUT VOLTAGE NOISE  
(GAIN = 100)  
80  
90  
N = 1500  
85  
N = 1000  
75  
MAX  
80  
MAX  
70  
75  
65  
60  
55  
50  
45  
40  
MEDIAN  
70  
MEDIAN  
65  
60  
MIN  
MIN  
55  
50  
45  
40  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 17. EL8171 SUPPLY CURRENT ENABLED vs  
TEMPERATURE, V , V = ±2.5V, V = 0V  
FIGURE 18. EL8172 SUPPLY CURRENT ENABLED vs  
TEMPERATURE, V , V = ±2.5V, V = 0V  
+
-
IN  
+
-
IN  
FN6293.3  
August 3, 2007  
6
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
20  
18  
16  
14  
12  
10  
8
N = 1500  
N = 1000  
MAX  
MAX  
MEDIAN  
MEDIAN  
MIN  
MIN  
6
4
2
0
-40  
-20  
0
20  
40  
60  
80  
100 120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 20. EL8172 SUPPLY CURRENT DISABLED vs  
TEMPERATURE, V , V = ±2.5V, V = V , V = 0V  
FIGURE 19. EL8171 SUPPLY CURRENT DISABLED vs  
TEMPERATURE, V , V = ±2.5V, V = V , V = 0V  
EN  
+
-
+
IN  
EN  
+
-
+
IN  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0.7  
0.5  
N = 1500  
N = 1000  
MAX  
MAX  
0.3  
0.1  
MEDIAN  
MEDIAN  
-0.1  
-0.3  
-0.5  
-0.7  
-0.5  
-1.0  
-1.5  
-2.0  
MIN  
40  
MIN  
80  
-40  
-20  
0
20  
40  
60  
100 120  
-40  
-20  
0
20  
60  
80  
100 120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 21. EL8171 V  
vs TEMPERATURE, V , V = ±2.5V,  
FIGURE 22. EL8172 V  
vs TEMPERATURE, V , V = ±2.5V,  
OS  
+
-
OS  
+
-
V
= 0V  
V
= 0V  
IN  
IN  
0.9  
0.7  
2.5  
2.0  
1.5  
1.0  
0.5  
0
N = 1000  
N = 1500  
MAX  
0.5  
MAX  
0.3  
MEDIAN  
0.1  
MEDIAN  
-0.5  
-1.0  
-1.5  
-2.0  
-2.5  
-0.1  
-0.3  
-0.5  
-0.7  
MIN  
60  
MIN  
40  
-40  
-20  
0
20  
40  
80  
100 120  
-40  
-20  
0
20  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 23. EL8171 V  
vs TEMPERATURE, V , V = ±1.2V,  
FIGURE 24. EL8172 V  
vs TEMPERATURE, V , V = ±1.2V,  
OS + -  
OS  
+
-
V
= 0V  
V
= 0V  
IN  
IN  
FN6293.3  
August 3, 2007  
7
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
140  
130  
120  
110  
100  
90  
140  
130  
120  
110  
100  
90  
N = 1500  
N = 1000  
MAX  
MAX  
MEDIAN  
MEDIAN  
MIN  
40  
TEMPERATURE (°C)  
MIN  
40  
TEMPERATURE (°C)  
80  
80  
-40  
-20  
0
20  
60  
80  
100  
120  
-40  
-20  
0
20  
60  
80  
100  
120  
FIGURE 25. EL8171 CMRR vs TEMPERATURE,  
= +2.5V TO -2.5V, V , V = ±2.5V  
FIGURE 26. EL8172 CMRR vs TEMPERATURE,  
= +2.5V TO -2.5V, V , V = ±2.5V  
V
V
CM  
CM  
+
-
+
-
140  
130  
120  
110  
100  
90  
140  
130  
120  
110  
100  
90  
N = 1500  
N = 1000  
MAX  
MAX  
MEDIAN  
MIN  
MEDIAN  
MIN  
80  
80  
70  
70  
60  
60  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 27. EL8171 PSRR vs TEMPERATURE,  
V , V = ±1.2V TO ±2.5V  
FIGURE 28. EL8172 PSRR vs TEMPERATURE,  
V , V = ±1.2V TO ±2.5V  
+
-
+
-
1.5  
1.3  
1.1  
0.9  
0.7  
0.5  
0.3  
0.1  
-0.1  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
N = 1000  
N = 1500  
MAX  
MAX  
MEDIAN  
MEDIAN  
MIN  
MIN  
-0.1  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 29. EL8171% GAIN ERROR vs TEMPERATURE,  
= 100k  
FIGURE 30. EL8172% GAIN ERROR vs TEMPERATURE,  
= 100k  
R
R
L
L
FN6293.3  
August 3, 2007  
8
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
4.91  
4.90  
4.89  
4.88  
4.87  
4.86  
4.85  
4.84  
4.83  
4.91  
4.90  
4.89  
4.88  
4.87  
4.86  
4.85  
4.84  
4.83  
N = 1000  
N = 1500  
MAX  
MAX  
MEDIAN  
MEDIAN  
MIN  
80  
MIN  
80  
-40  
-20  
0
20  
40  
60  
100  
120  
-40  
-20  
0
20  
40  
60  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 31. EL8171 V  
HIGH vs TEMPERATURE,  
FIGURE 32. EL8172 V  
HIGH vs TEMPERATURE,  
OUT  
OUT  
= 1k, V , V = ±2.5V  
R
R
= 1k, V , V = ±2.5V  
L
+
-
L
+
-
200  
180  
160  
140  
120  
100  
80  
180  
170  
160  
150  
140  
130  
120  
110  
100  
90  
N = 1000  
N = 1000  
MAX  
MAX  
MEDIAN  
MEDIAN  
MIN  
MIN  
-40  
-20  
0
20  
40  
60  
80  
100 120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 33. EL8171 V  
LOW vs TEMPERATURE,  
FIGURE 34. EL8172 V  
LOW vs TEMPERATURE,  
OUT  
OUT  
= 1k, V , V = ±2.5V  
R
R = 1k, V , V = ±2.5V  
L
+
-
L + -  
0.65  
0.60  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
0.60  
0.58  
0.56  
0.54  
0.52  
0.50  
0.48  
0.46  
0.44  
0.42  
0.40  
MAX  
N = 1500  
MAX  
N = 1000  
MEDIAN  
MEDIAN  
MIN  
MIN  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 35. EL8171 +SLEW RATE vs TEMPERATURE,  
INPUT = ±0.015V @ GAIN + 100  
FIGURE 36. EL8172 +SLEW RATE vs TEMPERATURE,  
INPUT = ±0.015V @ GAIN + 100  
FN6293.3  
August 3, 2007  
9
EL8171, EL8172  
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, V = V-, R = Open, unless otherwise specified. (Continued)  
+
-
CM  
EN  
L
0.65  
0.70  
0.65  
0.60  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
N = 1000  
MAX  
N = 1500  
MAX  
0.60  
0.55  
0.50  
0.45  
0.40  
MEDIAN  
MEDIAN  
MIN  
MIN  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
-40  
-20  
0
20  
40  
60  
80  
100  
120  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 38. EL8172 -SLEW RATE vs TEMPERATURE,  
INPUT = ±0.015V @ GAIN + 100  
FIGURE 37. EL8171 -SLEW RATE vs TEMPERATURE,  
INPUT = ±0.015V @ GAIN + 100  
Pin Descriptions  
EL8171/EL8172  
PIN NAME  
EQUIVALENT CIRCUIT  
PIN FUNCTION  
1
EN  
Circuit 2  
Active LOW logic pins. When pulled above 2V, the corresponding channel turns off  
and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built  
in pull downs define each EN pin LOW when left floating.  
2
3
IN-  
Circuit 1A, Circuit 1B  
Circuit 1A, Circuit 1B  
High impedance input terminals. EL8172 input circuit is shown in Circuit 1A, and  
the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it is  
recommended that the terminals are not overdriven beyond 1V and the input  
current must never exceed 5mA.  
IN+  
4
5
8
V-  
Circuit 4  
Negative supply terminal.  
FB-  
FB+  
Circuit 1A, Circuit 1B  
Circuit 1A, Circuit 1B  
High impedance feedback terminals. EL8172 input circuit is shown in Circuit 1A,  
and the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it  
is recommended that the terminals are not overdriven beyond 1V and the input  
current must never exceed 5mA.  
7
6
V+  
Circuit 4  
Circuit 3  
Positive supply terminal.  
Output Voltage.  
VOUT  
V+  
V+  
V+  
V+  
CAPACITIVELY  
COUPLED  
ESD CLAMP  
IN+  
FB+  
IN-  
FB-  
LOGIC  
PIN  
OUT  
V-  
V-  
V-  
V-  
CIRCUIT 1A  
CIRCUIT 2  
CIRCUIT 3  
CIRCUIT 4  
V+  
IN+  
IN-  
FB+  
FB-  
V-  
CIRCUIT 1B  
FN6293.3  
August 3, 2007  
10  
EL8171, EL8172  
Output Stage and Output Voltage Range  
A pair of complementary MOSFET devices drive the output  
to within a few mV of the supply rails. At a 100kΩ load,  
the PMOS sources current and pulls the output up to 4mV  
below the positive supply, while the NMOS sinks current and  
pulls the output down to 4mV above the negative supply, or  
ground in the case of a single supply operation. The current  
sinking and sourcing capability of the EL8171 and EL8172  
are internally limited to less than 35mA.  
Description of Operation and Application  
Information  
V
OUT  
Product Description  
The EL8171 and EL8172 are micropower instrumentation  
amplifiers (in-amps) which deliver rail-to-rail input amplification  
and rail-to-rail output swing on a single 2.4V to 5.5V supply. The  
EL8171 and EL8172 also deliver excellent DC and AC  
specifications while consuming only 65µA typical supply  
current. Because EL8171 and EL8172 provide an independent  
pair of feedback terminals to set the gain and to adjust the  
output level, these in-amps achieve high common-mode  
rejection ratio regardless of the tolerance of the gain setting  
resistors. The EL8171 is internally compensated for a minimum  
closed loop gain of 10 or greater, well suited for moderate to  
high gains. For higher gains, the EL8172 is internally  
compensated for a minimum gain of 100. An EN pin is used to  
reduce power consumption, typically 4.5µA, while the  
instrumentation amplifier is disabled.  
Gain Setting  
V
, the potential difference across IN+ and IN-, is replicated  
IN  
(less the input offset voltage) across FB+ and FB-. The  
obsession of the EL8171 and EL8172 in-amp is to maintain  
the differential voltage across FB+ and FB- equal to IN+ and  
IN-; (FB+ - FB-) = (IN+ - IN-). Consequently, the transfer  
function can be derived. The gain of the EL8171 and EL8172  
is set by two external resistors, the feedback resistor R , and  
F
the gain resistor R .  
G
2.4V TO 5.5V  
EN  
Input Protection  
7
1
All input and feedback terminals of the EL8171 and EL8172  
have internal ESD protection diodes to both positive and  
negative supply rails, limiting the input voltage to within one  
diode drop beyond the supply rails. The inverting inputs and  
FB- inputs have ESD diodes to the V-rail, and the non-inverting  
inputs and FB+ terminals have ESD diodes to the V+ rail. The  
EL8172 has additional back-to-back diodes across the input  
terminals and also across the feedback terminals. If overdriving  
the inputs is necessary, the external input current must never  
exceed 5mA. On the other hand, the EL8171 has no clamps to  
limit the differential voltage on the input terminals allowing  
higher differential input voltages at lower gain applications. It is  
recommended however, that the input terminals of the EL8171  
are not overdriven beyond 1V to avoid offset drift. An external  
series resistor may be used as an external protection to limit  
excessive external voltage and current from damaging the  
inputs.  
VIN/2  
VIN/2  
V+  
EN  
2
3
8
5
IN+  
IN-  
+
-
6
VOUT  
EL8171/2  
FB+  
FB-  
+
-
VCM  
V-  
4
RG  
RF  
FIGURE 39. CIRCUIT 1 - GAIN IS BY EXTERNAL RESISTORS  
R
AND R  
G
F
R
F
(EQ. 1)  
--------  
V
=
1 +  
V
OUT  
IN  
R
G
In Figure 39, the FB+ pin and one end of resistor RG are  
connected to GND. With this configuration, Equation 1 is  
Input Stage and Input Voltage Range  
only true for a positive swing in V ; negative input swings  
will be ignored and the output will be at ground.  
The input terminals (IN+ and IN-) of the EL8171 and EL8172  
are single differential pair P-MOSFET devices aided by an  
Input Range Enhancement Circuit (IREC) to increase the  
headroom of operation of the common-mode input voltage.  
The feedback terminals (FB+ and FB-) also have a similar  
topology. As a result, the input common-mode voltage range  
of both the EL8171 and EL8172 is rail-to-rail. These in-amps  
are able to handle input voltages that are at or slightly  
beyond the supply and ground making these in-amps well  
suited for single 5V or 3.3V low voltage supply systems.  
There is no need to move the common-mode input of the in-  
amps to achieve symmetrical input voltage.  
IN  
Reference Connection  
Unlike a three-op amp instrumentation amplifier, a finite  
series resistance seen at the REF terminal does not degrade  
the EL8171 and EL8172's high CMRR performance,  
eliminating the need for an additional external buffer  
amplifier. Circuit 2 (Figure 40) uses the FB+ pin to provide a  
high impedance REF terminal.  
FN6293.3  
August 3, 2007  
11  
EL8171, EL8172  
External Resistor Mismatches  
2.4V TO 5.5V  
EN  
Because of the independent pair of feedback terminals  
provided by the EL8171 and EL8172, the CMRR is not  
degraded by any resistor mismatches. Hence, unlike a three op  
amp and especially a two op amp in-amp, the EL8171 and  
EL8172 reduce the cost of external components by allowing the  
use of 1% or more tolerance resistors without sacrificing CMRR  
performance. The EL8171 and EL8172 CMRR will be  
maintained regardless of the tolerance of the resistors used.  
7
1
VIN/2  
VIN/2  
V+  
EN  
2
3
8
5
IN+  
IN-  
+
-
6
VOUT  
EL8171/2  
FB+  
FB-  
+
-
VCM  
V-  
4
2.4V TO 5.5V  
R1  
REF  
Gain Error and Accuracy  
R2  
RG  
RF  
The EL8172 has a Gain Error (EG) of 0.2% typical. The  
EL8171 has an EG of 0.15% typical. The gain error indicated  
in the “Electrical Specifications” table on page 2 is the inherent  
gain error of the EL8171 and EL8172 and does not include  
the gain error contributed by the resistors. There is an  
additional gain error due to the tolerance of the resistors used.  
The resulting non-ideal transfer function effectively becomes:  
FIGURE 40. CIRCUIT 2 - GAIN SETTING AND REFERENCE  
CONNECTION  
R
R
F
R
G
F
(EQ. 2)  
--------  
--------  
V
=
1 +  
(V ) + 1 +  
(V  
)
REF  
OUT  
IN  
R
G
R
The FB+ pin is used as a REF terminal to center or to adjust  
the output. Because the FB+ pin is a high impedance input,  
an economical resistor divider can be used to set the voltage  
at the REF terminal without degrading or affecting the CMRR  
performance. Any voltage applied to the REF terminal will  
F
--------  
V
=
1 +  
× [1 (E  
+ E  
+ E )] × V  
RF G IN  
(EQ. 4)  
OUT  
RG  
R
G
Where:  
E
E
E
= Tolerance of R  
= Tolerance of R  
RG  
RF  
G
G
shift V  
by V  
times the closed loop gain, which is set  
OUT  
REF  
F
by resistors R and R . See Circuit 2 (Figure 40). Note that  
F
G
= Gain Error of the EL8171 or EL8172  
any noise or unwanted signals on the reference supply will  
be amplified at the output according to Equation 2.  
The term [1-(E  
RG  
+E +E )] is the deviation from the  
G
RF  
theoretical gain. Thus, (E  
+E +E ) is the total gain  
The FB+ pin can also be connected to the other end of resistor,  
RG  
RF  
G
error. For example, if 1% resistors are used for the EL8171,  
the total gain error would be:  
R . See Circuit 3 (Figure 41). Keeping the basic concept that  
G
the EL8171 and EL8172 in-amps maintain constant differential  
voltage across the input terminals and feedback terminals (IN+  
- IN- = FB+ - FB-), the transfer function of Circuit 3 can be  
derived. Note that the VREF gain term is eliminated and  
susceptibility to external noise is reduced, however the VREF  
source must be capable of sourcing or sinking the feedback  
= ±(E  
+ E  
+ E (typical))  
RF G  
RG  
(EQ. 5)  
= ±(0.01 + 0.01 + 0.003)  
= ±2.3%  
Disable/Power-Down  
current from V  
OUT  
through R and R .  
F
G
The EL8171 and EL8172 can be powered down reducing  
the supply current to typically 4.5µA. When disabled, the  
output is in a high impedance state. The active low EN bar  
pin has an internal pull-down and hence can be left floating  
and the in-amp enabled by default. When the EN bar is  
connected to an external logic, the in-amp will power down  
when EN bar is pulled above 2V, and will power on when EN  
bar is pulled below 0.8V.  
2.4V TO 5.5V  
EN  
7
1
VIN/2  
V+  
EN  
2
3
8
5
IN+  
+
IN-  
-
VIN/2  
6
VOUT  
EL8171/2  
FB+  
FB-  
+
-
VCM  
V-  
4
RG  
RF  
VREF  
FIGURE 41. CIRCUIT 3 - REFERENCE CONNECTION WITH AN  
AVAILABLE VREF  
R
F
(EQ. 3)  
--------  
V
=
1 +  
(V ) + (V  
)
REF  
OUT  
IN  
R
G
FN6293.3  
August 3, 2007  
12  
EL8171, EL8172  
Power Dissipation  
It is possible to exceed the +150°C maximum junction  
temperatures under certain load and power-supply  
conditions. It is therefore important to calculate the  
maximum junction temperature (T  
) for all applications  
JMAX  
to determine if power supply voltages, load conditions, or  
package type need to be modified to remain in the safe  
operating area. These parameters are related in Equation 6:  
T
= T  
+ xPD  
)
MAXTOTAL  
(EQ. 6)  
JMAX  
MAX  
JA  
where:  
• P  
is the sum of the maximum power  
MAX  
for each amplifier can be calculated as shown in  
DMAXTOTAL  
dissipation of each amplifier in the package (PD  
)
• PD  
MAX  
Equation 7:  
V
OUTMAX  
R
L
----------------------------  
PD  
= 2*V × I  
+ (V - V ) ×  
OUTMAX  
MAX  
S
SMAX  
S
(EQ. 7)  
where:  
• T  
MAX  
= Maximum ambient temperature  
θ = Thermal resistance of the package  
JA  
• PD  
MAX  
= Maximum power dissipation of 1 amplifier  
• V = Supply voltage (Magnitude of V and V )  
S
+
-
• I  
= Maximum supply current of 1 amplifier  
MAX  
• V  
OUTMAX  
= Maximum output voltage swing of the  
application  
• R = Load resistance  
L
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6293.3  
August 3, 2007  
13  
EL8171, EL8172  
Small Outline Package Family (SO)  
A
D
h X 45°  
(N/2)+1  
N
A
PIN #1  
I.D. MARK  
E1  
E
c
SEE DETAIL “X”  
1
(N/2)  
B
L1  
0.010 M  
C A B  
e
H
C
A2  
A1  
GAUGE  
PLANE  
SEATING  
PLANE  
0.010  
L
4° ±4°  
0.004 C  
b
0.010 M  
C
A
B
DETAIL X  
MDP0027  
SMALL OUTLINE PACKAGE FAMILY (SO)  
INCHES  
SO16  
(0.150”)  
SO16 (0.300”)  
(SOL-16)  
SO20  
SO24  
(SOL-24)  
SO28  
(SOL-28)  
SYMBOL  
SO-8  
0.068  
0.006  
0.057  
0.017  
0.009  
0.193  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
8
SO-14  
0.068  
0.006  
0.057  
0.017  
0.009  
0.341  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
14  
(SOL-20)  
0.104  
0.007  
0.092  
0.017  
0.011  
0.504  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
20  
TOLERANCE  
MAX  
NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.057  
0.017  
0.009  
0.390  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.406  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.606  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
24  
0.104  
0.007  
0.092  
0.017  
0.011  
0.704  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
28  
-
±0.003  
±0.002  
±0.003  
±0.001  
±0.004  
±0.008  
±0.004  
Basic  
-
-
-
c
-
D
1, 3  
E
-
E1  
e
2, 3  
-
L
±0.009  
Basic  
-
L1  
h
-
Reference  
Reference  
-
N
-
Rev. M 2/07  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not included.  
2. Plastic interlead protrusions of 0.010” maximum per side are not included.  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994  
FN6293.3  
August 3, 2007  
14  

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RENESAS

EL8172ISZ-T7

Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
INTERSIL