FSL23A0R1_技术文档

FSL23A0D, FSL23A0R

Data Sheet

June 1999

File Number 4476.2

6A, 200V, 0.350 Ohm, Radiation Hardened,

SEGR Resistant, N-Channel Power

MOSFETs

Features

• 6A, 200V, r

• Total Dose

= 0.350Ω

DS(ON)

The Discrete Products Operation of Intersil Corporation has

developed a series of Radiation Hardened MOSFETs

speciﬁcally designed for commercial and military space

applications. Enhanced Power MOSFET immunity to Single

Event Effects (SEE), Single Event Gate Rupture (SEGR) in

particular, is combined with 100K RADS of total dose

hardness to provide devices which are ideally suited to harsh

space environments. The dose rate and neutron tolerance

necessary for military applications have not been sacriﬁced.

- Meets Pre-RAD Speciﬁcations to 100K RAD (Si)

• Single Event

- Safe Operating Area Curve for Single Event Effects

2

- SEE Immunity for LET of 36MeV/mg/cm with

V

up to 80% of Rated Breakdown and

of 10V Off-Bias

DS

GS

• Dose Rate

- Typically Survives 3E9 RAD (Si)/s at 80% BV

DSS

- Typically Survives 2E12 if Current Limited to I

The Intersil portfolio of SEGR resistant radiation hardened

MOSFETs includes N-Channel and P-Channel devices in a

variety of voltage, current and on-resistance ratings.

Numerous packaging options are also available.

DM

• Photo Current

- 3.0nA Per-RAD(Si)/s Typically

• Neutron

This MOSFET is an enhancement-mode silicon-gate power

ﬁeld-effect transistor of the vertical DMOS (VDMOS)

structure. It is specially designed and processed to be

radiation tolerant. The MOSFET is well suited for

- Maintain Pre-RAD Speciﬁcations

for 1E13 Neutrons/cm

2

- Usable to 1E14 Neutrons/cm

applications exposed to radiation environments such as

switching regulation, switching converters, motor drives,

relay drivers and drivers for high-power bipolar switching

transistors requiring high speed and low gate drive power.

This type can be operated directly from integrated circuits.

Symbol

D

G

Reliability screening is available as either commercial, TXV

equivalent of MIL-S-19500, or Space equivalent of

MIL-S-19500. Contact Intersil for any desired deviations

from the data sheet.

S

Ordering Information

Package

TO-205AF

RAD LEVEL SCREENING LEVEL PART NUMBER/BRAND

10K

Commercial

TXV

FSL23A0D1

FSL23A0D3

FSL23A0R1

FSL23A0R3

FSL23A0R4

10K

100K

Commercial

TXV

G

Space

D

S

Formerly available as type TA17697.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

4-1

FSL23A0D, FSL23A0R

o

Absolute Maximum Ratings T = 25 C, Unless Otherwise Speciﬁed

C

FSL23A0D, FSL23A0R

UNITS

Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

200

V

DS

Drain to Gate Voltage (R

GS

= 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DGR

Continuous Drain Current

o

T

= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

6

4

A

V

C

D

o

= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

C

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

18

±20

DM

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

Maximum Power Dissipation

o

T

= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

25

10

W

C

T

o

= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

C

o

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . .I

0.20

18

W/ C

A

AS

Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

6

S

SM

Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

18

o

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T

-55 to 150

300

C

J

STG

o

Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

(Distance >0.063in (1.6mm) from Case, 10s Max)

C

L

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

o

Electrical Speciﬁcations

T

= 25 C, Unless Otherwise Speciﬁed

C

PARAMETER

Drain to Source Breakdown Voltage

Gate Threshold Voltage

SYMBOL

BV

TEST CONDITIONS

= 1mA, V = 0V

MIN

TYP

MAX

-

UNITS

V

I

200

-

DSS

D

GS

o

V

= V

DS

,

T

= -55 C

-

5.0

4.0

-

V

GS(TH)

GS

= 1mA

C

I

o

D

= 25 C

1.5

-

V

o

= 125 C

0.5

-

V

o

Zero Gate Voltage Drain Current

Gate to Source Leakage Current

I

V

= 160V,

= 0V

= 25 C

-

25

µA

nA

V

DSS

DS

GS

o

= 125 C

-

250

100

200

2.21

0.350

0.637

20

o

I

V

= ±20V

= 25 C

-

GSS

GS

o

= 125 C

-

Drain to Source On-State Voltage

Drain to Source On Resistance

V

= 12V, I = 6A

-

DS(ON)

GS

D

o

r

I

= 4A,

T

= 25 C

-

0.280

Ω

DS(ON)12

D

C

V

= 12V

o

GS

= 125 C

-

Ω

C

Turn-On Delay Time

Rise Time

t

V

R

= 100V, I = 6A,

-

ns

nC

V

d(ON)

DD

D

= 16.7Ω, V = 12V,

L

GS

t

-

30

r

= 7.5Ω

GS

Turn-Off Delay Time

Fall Time

t

-

55

d(OFF)

t

-

15

f

Total Gate Charge

Gate Charge at 12V

Threshold Gate Charge

Gate Charge Source

Gate Charge Drain

Plateau Voltage

Q

V

= 0V to 20V

= 0V to 12V

= 0V to 2V

V

= 100V,

-

57

g(TOT)

GS

DD

= 6A

I

D

Q

V

-

34

-

38

g(12)

g(TH)

GS

Q

V

-

1.9

6.8

20

GS

Q

-

6.0

18

7

gs

gd

Q

-

V

I

= 6A, V

= 15V

-

(PLATEAU)

D

DS

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

C

V

= 25V, V = 0V,

GS

-

750

180

50

-

pF

ISS

DS

f = 1MHz

C

-

OSS

RSS

-

o

Thermal Resistance Junction to Case

R

-

5.0

175

C/W

JC

JA

θ

o

Thermal Resistance Junction to Ambient

R

-

C/W

θ

4-2

FSL23A0D, FSL23A0R

Source to Drain Diode Speciﬁcations

PARAMETER

Forward Voltage

Reverse Recovery Time

SYMBOL

TEST CONDITIONS

MIN

0.6

-

TYP

MAX

1.8

UNITS

V

I

= 6A

-

SD

t

= 6A, dI /dt = 100A/µs

290

ns

rr

SD

o

Electrical Speciﬁcations up to 100K RAD T = 25 C, Unless Otherwise Speciﬁed

C

PARAMETER

Drain to Source Breakdown Volts

Gate to Source Threshold Volts

Gate to Body Leakage

SYMBOL

BV

TEST CONDITIONS

= 0, I = 1mA

MIN

MAX

-

UNITS

(Note 3)

V

200

V

DSS

GS

D

(Note 3)

V

= V , I = 1mA

DS

1.5

4.0

GS(TH)

GS

D

(Notes 2, 3)

(Note 3)

I

V

= ±20V, V

= 0V

-

100

25

nA

µA

V

GSS

GS

DS

= 160V

Zero Gate Leakage

I

V

= 0, V

DSS

GS DS

Drain to Source On-State Volts

Drain to Source On Resistance

NOTES:

(Notes 1, 3)

V

= 12V, I = 6A

2.21

0.350

DS(ON)

GS

D

r

V

= 12V, I = 4A

Ω

DS(ON)12

GS

D

1. Pulse test, 300µs Max.

2. Absolute value.

3. Insitu Gamma bias must be sampled for both V

GS

= 12V, V

DS

= 0V and V

GS

= 0V, V

= 80% BV .

DSS

DS

Single Event Effects (SEB, SEGR) (Note 4)

ENVIRONMENT (NOTE 5)

APPLIED

(NOTE 6)

ION

SPECIES

TYPICAL LET

(MeV/mg/cm)

TYPICAL

RANGE (µ)

V

BIAS

MAXIMUM

GS

(V)

TEST

SYMBOL

V

BIAS (V)

DS

Single Event Effects Safe Operating Area

SEESOA

Ni

Br

26

37

43

36

-20

-5

200

-10

-15

-20

160

100

40

NOTES:

4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.

2

o

5. Fluence = 1E5 ions/cm (typical), T = 25 C.

6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).

Typical Performance Curves Unless Otherwise Speciﬁed

2

LET = 26MeV/mg/cm , RANGE = 43µ

LET = 37MeV/mg/cm , RANGE = 36µ

1E-3

2

FLUENCE = 1E5 IONS/cm (TYPICAL)

200

1E-4

ILM = 10A

30A

160

1E-5

120

100A

300A

80

1E-6

40

o

TEMP = 25 C

1E-7

0

10

30

100

DRAIN SUPPLY (V)

300

1000

0

-5

-10

-15

-20

-25

V

(V)

GS

FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA

FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT

GAMMA DOT CURRENT TO I

AS

4-3

FSL23A0D, FSL23A0R

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

8

100

o

T

= 25 C

C

6

10

4

100µs

1ms

1

2

10ms

OPERATION IN THIS

AREA MAY BE

LIMITED BY r

DS(ON)

100ms

0

0.1

-50

0

T

50

100

o

150

1

10

100

1000

, CASE TEMPERATURE ( C)

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

C

FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs

TEMPERATURE

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

2.5

PULSE DURATION = 250ms, V

GS

= 12V, I = 4A

D

2.0

1.5

1.0

0.5

0.0

12V

Q

G

Q

GD

GS

V

G

-80

-40

0

40

80

120

160

o

T , JUNCTION TEMPERATURE ( C)

CHARGE

J

FIGURE 5. BASIC GATE CHARGE WAVEFORM

10

FIGURE 6. NORMALIZED r vs JUNCTION TEMPERATURE

DS(ON)

1

0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

P

DM

0.01

NOTES:

DUTY FACTOR: D = t /t

t

1

2

t

2

PEAK T = P

J

x Z

+ T

DM

θJC

C

0.001

-5

-4

10

-3

10

-2

10

-1

0

1

10

t, RECTANGULAR PULSE DURATION (s)

FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE

4-4

FSL23A0D, FSL23A0R

Typical Performance Curves Unless Otherwise Speciﬁed (Continued)

30

o

STARTING T = 25 C

J

10

o

STARTING T = 150 C

J

IF R = 0

t

= (L) (I ) / (1.3 RATED BV

- V

DD

)

AV

IF R ≠ 0

AS DSS

t

= (L/R) ln [(I *R) / (1.3 RATED BV

- V ) + 1]

DD

AV

AS

DSS

1

0.01

0.1

10

t

, TIME IN AVALANCHE (ms)

AV

FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING

Test Circuits and Waveforms

ELECTRONIC SWITCH OPENS

WHEN I IS REACHED

AS

V

DS

L

BV

DSS

+

I

-

CURRENT

TRANSFORMER

AS

t

P

V

DS

I

AS

V

VARY t TO OBTAIN

DD

P

+

50Ω

REQUIRED PEAK I

AS

V

DD

V

≤ 20V

GS

-

50V-150V

DUT

50Ω

t

P

0V

t

AV

FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 10. UNCLAMPED ENERGY WAVEFORMS

t

ON

OFF

t

d(OFF)

V

DD

t

d(ON)

t

f

r

R

L

V

DS

90%

V

DS

V

= 12V

GS

10%

DUT

0V

90%

50%

R

GS

50%

V

GS

PULSE WIDTH

10%

FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT

FIGURE 12. RESISTIVE SWITCHING WAVEFORMS

4-5

FSL23A0D, FSL23A0R

Screening Information

Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).

o

Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) T = 25 C, Unless Otherwise Speciﬁed

C

PARAMETER

Gate to Source Leakage Current

Zero Gate Voltage Drain Current

Drain to Source On Resistance

Gate Threshold Voltage

NOTES:

SYMBOL

TEST CONDITIONS

= ±20V

GS

MAX

UNITS

nA

I

V

±20 (Note 7)

±25 (Note 7)

±20% (Note 8)

GSS

I

V

= 80% Rated Value

o

µA

DSS

DS

r

T

= 25 C at Rated I

D

Ω

DS(ON)

C

V

I

= 1.0mA

V

GS(TH)

D

7. Or 100% of Initial Reading (whichever is greater).

8. Of Initial Reading.

Screening Information

TEST

JANTXV EQUIVALENT

= 30V, t = 250µs

JANS EQUIVALENT

= 30V, t = 250µs

Gate Stress

V

GS

Optional

MIL-S-19500 Group A,

Pind

Required

Pre Burn-In Tests (Note 9)

MIL-S-19500 Group A,

Subgroup 2 (All Static Tests at 25 C)

o

Subgroup 2 (All Static Tests at 25 C)

Steady State Gate

Bias (Gate Stress)

MIL-STD-750, Method 1042, Condition B

V

= 80% of Rated Value,

V

= 80% of Rated Value,

GS

o

T = 150 C, Time = 48 hours

A

Interim Electrical Tests (Note 9)

All Delta Parameters Listed in the Delta Tests

and Limits Table

All Delta Parameters Listed in the Delta Tests

and Limits Table

Steady State Reverse

Bias (Drain Stress)

MIL-STD-750, Method 1042, Condition A

V

= 80% of Rated Value,

V

= 80% of Rated Value,

DS

o

T = 150 C, Time = 160 hours

T = 150 C, Time = 240 hours

A

PDA

10%

5%

Final Electrical Tests (Note 9)

MIL-S-19500, Group A, Subgroup 2

MIL-S-19500, Group A,

Subgroups 2 and 3

NOTE:

9. Test limits are identical pre and post burn-in.

Additional Screening Tests

PARAMETER

Safe Operating Area

SYMBOL

TEST CONDITIONS

= 160V, t = 10ms

MAX

0.46

18

UNITS

A

SOA

V

DS

Unclamped Inductive Switching

Thermal Response

I

V

= 15V, L = 0.1mH

A

AS

GS(PEAK)

∆V

t

= 10ms; V = 25V; I = 1A

60

mV

SD

H

Thermal Impedance

∆V

= 500ms; V = 25V; I = 1A

230

H

4-6

FSL23A0D, FSL23A0R

Rad Hard Data Packages - Intersil Power Transistors

TXV Equivalent

Class S - Equivalents

1. RAD HARD TXV EQUIVALENT - STANDARD DATA

PACKAGE

1. RAD HARD “S” EQUIVALENT - STANDARD DATA

PACKAGE

A. Certificate of Compliance

B. Serialization Records

C. Assembly Flow Chart

D. SEM Photos and Report

B. Assembly Flow Chart

C. Preconditioning - Attributes Data Sheet

D. Group A

E. Group B

F. Group C

G. Group D

- Attributes Data Sheet

E. Preconditioning - Attributes Data Sheet

- Hi-Rel Lot Traveler

- HTRB - Hi Temp Gate Stress Post

Reverse Bias Data and Delta Data

- HTRB - Hi Temp Drain Stress Post

Reverse Bias Delta Data

2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA

PACKAGE

F. Group A

G. Group B

H. Group C

I. Group D

- Attributes Data Sheet

A. Certificate of Compliance

B. Assembly Flow Chart

C. Preconditioning - Attributes Data Sheet

- Precondition Lot Traveler

- Pre and Post Burn-In Read and Record

Data

2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL

DATA PACKAGE

D. Group A

- Attributes Data Sheet

- Group A Lot Traveler

A. Certificate of Compliance

B. Serialization Records

C. Assembly Flow Chart

D. SEM Photos and Report

E. Group B

- Attributes Data Sheet

- Group B Lot Traveler

- Pre and Post Read and Record Data for

Intermittent Operating Life (Subgroup B3)

- Bond Strength Data (Subgroup B3)

- Pre and Post High Temperature Operating

Life Read and Record Data (Subgroup B6)

E. Preconditioning - Attributes Data Sheet

- Hi-Rel Lot Traveler

- HTRB - Hi Temp Gate Stress Post

Reverse Bias Data and Delta Data

- HTRB - Hi Temp Drain Stress Post

Reverse Bias Delta Data

F. Group C

G. Group D

- Attributes Data Sheet

- Group C Lot Traveler

- Pre and Post Read and Record Data for

Intermittent Operating Life (Subgroup C6)

- Bond Strength Data (Subgroup C6)

- X-Ray and X-Ray Report

F. Group A

G. Group B

H. Group C

I. Group D

- Attributes Data Sheet

- Hi-Rel Lot Traveler

- Subgroups A2, A3, A4, A5 and A7 Data

- Attributes Data Sheet

- Group D Lot Traveler

- Pre and Post RAD Read and Record Data

- Attributes Data Sheet

- Hi-Rel Lot Traveler

- Subgroups B1, B3, B4, B5 and B6 Data

- Attributes Data Sheet

- Hi-Rel Lot Traveler

- Subgroups C1, C2, C3 and C6 Data

- Attributes Data Sheet

- Hi-Rel Lot Traveler

- Pre and Post Radiation Data

4-7

FSL23A0D, FSL23A0R

TO-205AF

3 LEAD JEDEC TO-205AF HERMETIC METAL CAN PACKAGE

ØD

INCHES

MIN

MILLIMETERS

ØD

1

SYMBOL

MAX

0.180

0.021

0.370

0.335

0.105

0.210

0.105

0.020

0.034

0.045

0.560

-

MIN

4.07

0.41

8.89

8.01

2.42

4.83

2.42

0.26

0.72

0.74

12.70

1.91

MAX

4.57

0.53

9.39

8.50

2.66

5.33

2.66

0.50

0.86

1.14

14.22

-

NOTES

P

A

0.160

0.016

0.350

0.315

0.095

0.190

0.095

0.010

0.028

0.029

0.500

0.075

-

2, 3

-

A

Øb

ØD

SEATING

PLANE

h

ØD

e

-

1

L

Øb

4

-

e

1

e

2

e

1

h

j

-

o

90

2

k

-

e

2

1

3

L

P

3

5

o

45

j

k

NOTES:

1. These dimensions are within allowable dimensions of Rev. E of

JEDEC TO-205AF outline dated 11-82.

2. Lead dimension (without solder).

3. Solder coating may vary along lead length, add typically 0.002

inches (0.05mm) for solder coating.

4. Position of lead to be measured 0.100 inches (2.54mm) from bottom

of seating plane.

5. This zone controlled for automatic handling. The variation in

actual diameter within this zone shall not exceed 0.010 inches

(0.254mm).

6. Lead no. 3 butt welded to stem base.

7. Controlling dimension: Inch.

8. Revision 3 dated 6-94.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site www.intersil.com

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EUROPE

ASIA

Intersil Corporation

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Mercure Center

100, Rue de la Fusee

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TEL: (32) 2.724.2111

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Melbourne, FL 32902

TEL: (321) 724-7000

FAX: (321) 724-7240

4-8


型号：	FSL23A0R1
厂家：	Intersil
描述：	6A, 200V, 0.350 Ohm, Radiation Hardened, SEGR Resistant, N-Channel Power MOSFETs 6A ， 200V ， 0.350欧姆，抗辐射，抗SEGR ，N沟道功率MOSFET 晶体晶体管开关脉冲
文件：	总8页 (文件大小：75K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

FSL23A0R1 [INTERSIL]

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