HA2-2510/883 [INTERSIL]
High Slew Rate Operational Amplifier; 高转换率运算放大器连接器
| 型号： | HA2-2510/883 |
| 厂家： | 
Intersil |
| 描述： | High Slew Rate Operational Amplifier |
| 文件： | 总7页 (文件大小：209K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HA-2510/883
®
Data Sheet
January 3, 2006
FN3697.4
High Slew Rate Operational Amplifier
Features
The HA-2510/883 is a high performance operational
amplifier which sets the standards for maximum slew rate
and wide bandwidth operation in moderately powered,
internally compensated, monolithic devices. In addition to
excellent dynamic characteristics, this dielectrically isolated
amplifier also offers low offset current and high input
impedance.
• This Circuit is Processed in Accordance to MIL-STD-883
and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . . .50V/µs (Min)
65V/µs (Typ)
• Wide Power Bandwidth . . . . . . . . . . . . . . . . 750kHz (Min)
• Low Offset Current. . . . . . . . . . . . . . . . . . . . . . 25nA (Min)
10nA (Typ)
The ±50V/µs minimum slew rate and fast settling time of
the HA-2510/883 are ideally suited for high speed D/A,
A/D, and pulse amplification designs. The HA-2510/883’s
superior bandwidth and 750kHz minimum full power
bandwidth are extremely useful in RF and video
• High Input Impedance . . . . . . . . . . . . . . . . . . 50MΩ (Min)
100MΩ (Typ)
• Wide Small Signal Bandwidth . . . . . . . . . . . .12MHz (Typ)
• Fast Settling Time (0.1% of 10V Step) . . . . . . 250ns (Typ)
• Low Quiescent Supply Current . . . . . . . . . . . . 6mA (Max)
• Internally Compensated For Unity Gain Stability
applications. To insure compliance with slew rate and
transient response specifications, all devices are 100%
tested for AC performance characteristics over full
temperature limits. To improve signal conditioning accuracy,
the HA-2510/883 provides a maximum offset current of 25nA
o
and a minimum input impedance of 50MΩ, both at 25 C, as
Applications
• Data Acquisition Systems
well as offset voltage adjust capability.
Ordering Information
• RF Amplifiers
TEMP.
PKG.
DWG.
#
• Video Amplifiers
• Signal Generators
• Pulse Amplification
PART
PART
RANGE
o
NUMBER
MARKING
( C)
PACKAGE
HA2-2510/883 HA2-2510/883 -55 to 125 8 Pin Can
T8.C
HA7-2510/883 HA7-2510/883 -55 to 125 8 Ld CERDIP F8.3A
Pinouts
HA-2510/883
(CERDIP)
TOP VIEW
HA-2510/883
(METAL CAN)
TOP VIEW
COMP
8
BAL
-IN
1
2
3
4
8
7
6
5
COMP
V+
BAL
1
3
7
5
V+
6
-
+
-
+IN
V-
OUT
BAL
-IN
2
OUT
+
BAL
+IN
4
V-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002, 2004, 2005, 2006. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
HA-2510/883
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . .40V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . V+ to V-
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .<2000V
Thermal Resistance (Typical, Note 1)
θ
θ
JA
JC
o
o
Metal Can Package . . . . . . . . . . . . . . . . . 160 C/W 75 C/W
CERDIP Package. . . . . . . . . . . . . . . . . . . 120 C/W 30 C/W
Package Power Dissipation Limit at 75 C for T ≤ 175 C
Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .625mW
o
o
o
o
J
CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .870mW
o
Package Power Dissipation Derating Factor Above 75 C
Operating Conditions
o
Metal Can Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.3mW/ C
CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/ C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .175 C
Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C
o
o
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
o
o
V
R
≤ 1/2 (V+ - V-)
INCM
≥ 2kΩ
o
o
L
o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379
for details.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
= ±15V, R
SOURCE
= 100Ω, R
LOAD
= 500kΩ, V
= 0V, Unless Otherwise Specified.
OUT
SUPPLY
GROUP A
o
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS
TEMP ( C)
25
MIN
-8
MAX
UNITS
mV
mV
nA
Input Offset
Voltage
V
V
V
V
V
= 0V
1
2, 3
1
8
10
200
400
200
400
25
50
-
IO
CM
CM
CM
CM
125, -55
25
-18
-200
-400
-200
-400
-25
-50
+10
+10
-
Input Bias Current
+I
= 0V, +R = 100kΩ, -R = 100Ω
S S
B
2, 3
1
125, -55
25
nA
-I
= 0V, +R = 100Ω, -R = 100kΩ
nA
B
S
S
2, 3
1
125, -55
25
nA
Input Offset
Current
I
= 0V, +R = 100kΩ, -R = 100kΩ
nA
IO
S
S
2, 3
1
125, -55
25
nA
Common Mode
Range
+CMR
-CMR
V+ = 5V, V- = -25V
V+ = 25V, V- = -5V
V
2, 3
1
125, -55
25
-
V
-10
-10
-
V
2, 3
4
125, -55
25
-
V
Large Signal
Voltage Gain
+A
VOL
V
V
= 0V and +10V, R = 2kΩ
10
kV/V
kV/V
kV/V
kV/V
dB
OUT
OUT
L
5, 6
4
125, -55
25
7.5
10
-
-A
VOL
= 0V and -10V, R = 2kΩ
-
L
5, 6
1
125, -55
25
7.5
80
-
Common Mode
Rejection Ratio
+CMRR
-CMRR
∆V
= +10V, V+ = +5V, V- = -25V, V
-
CM
= -10V
OUT
2, 3
1
125, -55
25
80
-
dB
∆V
= -10V, V+ = +25V, V- = -5V, V
OUT
=
80
-
dB
CM
+10V
2, 3
125, -55
80
-
dB
FN3697.4
2
January 3, 2006
HA-2510/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V
= ±15V, R
SOURCE
= 100Ω, R
LOAD
= 500kΩ, V
= 0V, Unless Otherwise Specified.
OUT
SUPPLY
GROUP A
o
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS
TEMP ( C)
25
MIN
10
10
-
MAX
UNITS
V
Output Voltage
Swing
+V
R
R
= 2kΩ
= 2kΩ
4
5, 6
4
-
OUT
OUT
OUT
OUT
L
125, -55
25
-
V
-V
-10
V
L
5, 6
4
125, -55
25
-
-10
V
Output Current
+I
V
V
V
= -10V
= +10V
= 0V,
10
7.5
-
-
mA
mA
mA
mA
mA
mA
mA
mA
dB
OUT
OUT
OUT
5, 6
4
125, -55
25
-
-I
-10
5, 6
1
125, -55
25
-
-7.5
Quiescent Power
Supply Current
+I
-
6
CC
CC
I
= 0mA
OUT
2, 3
1
125, -55
25
-
6.5
-I
V
OUT
= 0V,
-6
-6.5
80
80
80
80
-
-
-
-
-
-
-
-
-
-
OUT
= 0mA
I
2, 3
1
125, -55
25
Power Supply
Rejection Ratio
+PSRR
-PSRR
∆V
= 10V, V+ = +20V, V- = -15V,
SUP
V+ = +10V, V- = -15V
2, 3
1
125, -55
25
dB
∆V
= 10V, V+ = +15V, V- = -20V,
V+ = +15V, V- = -10V
dB
SUP
2, 3
1
125, -55
25
dB
Offset Voltage
Adjustment
+V Adj
IO
Note 2
V
-1
mV
mV
mV
mV
IO
IO
2, 3
1
125, -55
25
V
-1
-V Adj
IO
Note 2
V
V
+1
IO
IO
2, 3
125, -55
+1
NOTE:
2. Offset adjustment range is [V (Measured) ±1mV] minimum referred to output. This test is for functionality only to assure adjustment through 0V.
IO
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
= ±15V, R
SOURCE
= 50Ω, R
LOAD
= 2kΩ, C
LOAD
= 50pF, A
= +1V/V, Unless Otherwise Specified.
VCL
SUPPLY
GROUP A
o
PARAMETER
SYMBOL
+SR
CONDITIONS
SUBGROUPS
TEMP ( C)
MIN
50
45
50
45
-
MAX
UNITS
V/µs
V/µs
V/µs
V/µs
ns
Slew Rate
V
V
V
V
= -5V to +5V, 25% ≤ +SR ≤ 75%
7
8A, 8B
7
25
125, -55
25
-
-
OUT
OUT
OUT
OUT
-SR
= +5V to -5V, 75% ≥ -SR ≥ 25%
-
8A, 8B
7
125, -55
25
-
Rise and Fall Time
t
= 0 to +200mV, 10% ≤ t ≤ 90%
50
60
50
60
r
r
8A, 8B
7
125, -55
25
-
ns
t
= 0 to -200mV, 10% ≤ t ≤ 90%
-
ns
f
f
8A, 8B
125, -55
-
ns
FN3697.4
3
January 3, 2006
HA-2510/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V
= ±15V, R
SOURCE
= 50Ω, R
LOAD
= 2kΩ, C
LOAD
= 50pF, A
= +1V/V, Unless Otherwise Specified.
VCL
SUPPLY
GROUP A
o
PARAMETER
SYMBOL
+OS
CONDITIONS
= 0 to +200mV
SUBGROUPS
TEMP ( C)
MIN
MAX
40
UNITS
%
Overshoot
V
V
7
25
-
-
-
-
OUT
OUT
8A, 8B
7
125, -55
25
50
%
-OS
= 0 to -200mV
40
%
8A, 8B
125, -55
50
%
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Characterized at: V
= ±15V, R
= 2kΩ, C = 50pF, Unless Otherwise Specified.
LOAD
SUPPLY
LOAD
o
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMP ( C)
MIN
MAX
UNITS
Differential Input
Resistance
R
V
V
= 0V
CM
3
25
50
-
MΩ
IN
Full Power
Bandwidth
FPBW
CLSG
PC
= 10V
3, 4
3
25
750
-
-
kHz
V/V
mW
PEAK
Minimum Closed Loop
Stable Gain
R
= 2kΩ, C = 50pF
-55 to 125
-55 to 125
1
-
L
L
Quiescent Power
Consumption
V
= 0V, I
OUT
= 0mA
3, 5
195
OUT
NOTES:
3. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters
are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon
data from multiple production runs which reflect lot to lot and within lot variation.
4. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2πV
).
PEAK
5. Quiescent Power Consumption based upon Quiescent Supply Current test maximum. (No load on outputs.)
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-In)
Final Electrical Test Parameters
Group A Test Requirements
SUBGROUPS (SEE TABLES 1 AND 2)
1
1 (Note 6), 2, 3, 4, 5, 6, 7, 8A, 8B
1, 2, 3, 4, 5, 6, 7, 8A, 8B
1
Groups C and D Endpoints
NOTE:
6. PDA applies to Subgroup 1 only.
FN3697.4
4
January 3, 2006
HA-2510/883
Die Characteris tics
SUBSTRATE POTENTIAL (Powered Up):
Unbiased
TRANSISTOR COUNT:
40
PROCESS: Bipolar Dielectric Isolation
Metallization Mas k Layout
HA-2510/883
-IN
+IN
BAL
COMP
V-
V+
BAL
OUT
Burn-In Circuit
HA7-2510/883
1
2
3
4
8
7
V+
-
+
R
1
C
C
D
3
1
1
6
5
V-
D
C
2
2
R
C
C
D
= 1MΩ, ±5%, 1/4W (Min)
1
1
3
1
= C = 0.01µF/Socket (Min) or 0.1µF/Row (Min)
2
= 0.01µF/Socket (10%)
= D = 1N4002 or Equivalent/Board
2
|(V+) - (V-)| = 30V
FN3697.4
5
January 3, 2006
HA-2510/883
Metal Can Packages (Can)
REFERENCE PLANE
T8.C MIL-STD-1835 MACY1-X8 (A1)
8 LEAD METAL CAN PACKAGE
A
e1
L
L2
L1
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
0.185
0.019
0.021
0.024
0.375
0.335
0.160
MIN
4.19
0.41
0.41
0.41
8.51
7.75
2.79
MAX
4.70
0.48
0.53
0.61
9.40
8.51
4.06
NOTES
ØD2
A
Øb
Øb1
Øb2
ØD
ØD1
ØD2
e
0.165
0.016
0.016
0.016
0.335
0.305
0.110
-
A
A
1
k1
1
Øe
ØD ØD1
2
-
N
1
-
-
Øb1
Øb
β
α
C
L
-
k
F
0.200 BSC
0.100 BSC
5.08 BSC
2.54 BSC
-
BASE AND
Q
e1
F
-
SEATING PLANE
-
0.040
0.034
0.045
0.750
0.050
-
-
1.02
0.86
1.14
19.05
1.27
-
-
BASE METAL
LEAD FINISH
Øb2
k
0.027
0.027
0.500
-
0.69
0.69
12.70
-
-
k1
L
2
Øb1
1
L1
L2
Q
1
SECTION A-A
0.250
6.35
1
0.010
0.045
0.25
1.14
-
NOTES:
o
o
45 BSC
45 BSC
3
α
1. (All leads) Øb applies between L1 and L2. Øb1 applies between
L2 and 0.500 from the reference plane. Diameter is uncontrolled
in L1 and beyond 0.500 from the reference plane.
o
o
β
45 BSC
45 BSC
3
4
N
8
8
2. Measured from maximum diameter of the product.
Rev. 0 5/18/94
3. α is the basic spacing from the centerline of the tab to terminal 1
and β is the basic spacing of each lead or lead position (N -1
places) from α, looking at the bottom of the package.
4. N is the maximum number of terminal positions.
5. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
6. Controlling dimension: INCH.
FN3697.4
6
January 3, 2006
HA-2510/883
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
c1 LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
E
-A-
INCHES
MIN
-
MILLIMETERS
BASE
(c)
METAL
SYMBOL
MAX
0.200
0.026
0.023
0.065
0.045
0.018
0.015
0.405
0.310
MIN
-
MAX
5.08
0.66
0.58
1.65
1.14
0.46
0.38
10.29
7.87
NOTES
b1
M
(b)
A
b
-
M
0.014
0.014
0.045
0.023
0.008
0.008
-
0.36
0.36
1.14
0.58
0.20
0.20
-
2
-B-
b1
b2
b3
c
3
SECTION A-A
S
S
S
D
bbb
C A - B
D
-
4
BASE
Q
PLANE
2
A
-C-
SEATING
PLANE
c1
D
3
L
α
5
S1
b2
eA
A A
e
E
0.220
5.59
5
b
C A - B
eA/2
c
e
0.100 BSC
2.54 BSC
-
eA
eA/2
L
0.300 BSC
0.150 BSC
7.62 BSC
3.81 BSC
-
M
S
S
M
S
S
D
ccc
D
aaa
C A - B
-
NOTES:
0.125
0.200
0.060
-
3.18
5.08
1.52
-
-
1. Index area: A notch or a pin one identification mark shall be
located adjacent to pin one and shall be located within the
Q
0.015
0.005
0.38
6
shaded area shown. The manufacturer’s identification shall not
be used as a pin one identification mark.
S1
0.13
7
o
o
o
o
90
105
90
105
-
α
aaa
bbb
ccc
M
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
-
-
-
-
0.015
0.030
0.010
0.0015
-
-
-
-
0.38
0.76
0.25
0.038
-
-
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
2, 3
8
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
8
8
Rev. 0 4/94
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN3697.4
7
January 3, 2006
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