HA4600CBZ [INTERSIL]
480MHz, SOT-23, Video Buffer with Output Disable; 为480MHz ， SOT -23 ，视频缓冲器，具有输出禁止
| 型号： | HA4600CBZ |
| 厂家： | 
Intersil |
| 描述： | 480MHz, SOT-23, Video Buffer with Output Disable |
| 文件： | 总7页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HA4600
®
Data Sheet
December 22, 2005
FN3990.8
480MHz, SOT-23, Video Buffer with Output
Dis able
Features
• Micro Package Available . . . . . . . . . . . . . . . . . . . SOT-23
• Low Power Dissipation. . . . . . . . . . . . . . . . . . . . . 105mW
• Symmetrical Slew Rates . . . . . . . . . . . . . . . . . . 1700V/µs
• 0.1dB Gain Flatness. . . . . . . . . . . . . . . . . . . . . . . 250MHz
• Off Isolation (100MHz) . . . . . . . . . . . . . . . . . . . . . . . 85dB
• Differential Gain and Phase . . . . . . . 0.01%/0.01 Degrees
• High ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . >1800V
• TTL Compatible Enable Input
The HA4600 is a very wide bandwidth, unity gain buffer ideal
for professional video switching, HDTV, computer monitor
routing, and other high performance applications. The circuit
features very low power dissipation (105mW Enabled, 1mW
Disabled), excellent differential gain and phase, and very
high off isolation. When disabled, the output is switched to a
high impedance state, making the HA4600 ideal for routing
matrix equipment and video multiplexers.
The HA4600 also features fast switching and symmetric
slew rates. A typical application for the HA4600 is interfacing
Intersil’s wide range of video crosspoint switches.
• Improved Replacement for GB4600
• Pb-Free Plus Anneal Available (RoHS Compliant)
For applications requiring a tally output (enable indicator),
please refer to the HA4201 data sheet.
Applications
• Professional Video Switching and Routing
• Video Multiplexers
Pinouts
HA4600
(PDIP, SOIC)
TOP VIEW
• HDTV
• Computer Graphics
• RF Switching and Routing
• PCM Data Routing
EN
V-
1
2
3
4
8
7
6
5
GND
IN
Ordering Information
V+
NC
NC
TEMP.
RANGE
(°C)
PART
NUMBER
PART
MARKING
PKG.
OUT
PACKAGE
DWG. #
HA4600CP
HA4600CP
0 to 70 8 Ld PDIP
E8.3
E8.3
HA4600
(SOT-23)
TOP VIEW
HA4600CPZ
(Note)
HA4600CPZ 0 to 70 8 Ld PDIP*
(Pb-free)
HA4600CB
4600CB
0 to 70 8 Ld SOIC
M8.15
M8.15
HA4600CB96 4600CB
0 to 70 8 Ld SOIC Tape
and Reel
EN
V-
OUT
6
1
2
3
HA4600CBZ
(Note)
4600CBZ
0 to 70 8 Ld SOIC
(Pb-free)
M8.15
M8.15
5
4
V+
IN
GND
HA4600CBZ96 4600CBZ
(Note)
0 to 70 8 Ld SOIC Tape
and Reel (Pb-free)
HA4600CH96 46
0 to 70 6 Ld SOT-23 Tape P6.064
and Reel
HA4600CHZ96 46Z
(Note)
0 to 70 6 Ld SOT-23 Tape P6.064
and Reel (Pb-free)
Truth Table
EN
OUT
*Pb-free PDIPs can be used for through hole wave solder processing only.
They are not intended for use in Reflow solder processing applications.
0
High Z
Active
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2000, 2005. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
HA4600
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Digital Input Current (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . ±25mA
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
ESD Rating
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
SUPPLY
PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . 175°C
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC and SOT-23 - Lead Tips Only)
130
170
210
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . 1800V
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
2. If an input signal is applied before the supplies are powered up, the input current must be limited to this maximum value.
Electrical Specifications V
= ±5V, R = 10kΩ, V
= 2.0V, Unless Otherwise Specified
SUPPLY
L
EN
PARAMETER
TEST CONDITIONS
TEMP. (°C)
MIN
TYP
MAX
UNITS
DC SUPPLY CHARACTERISTICS
Supply Voltage
Full
25, 70
0
±4.5
±5.0
10.5
-
±5.5
13
V
Supply Current (V
= 0V)
V
V
V
V
= 2V
-
-
-
-
mA
mA
µA
µA
OUT
EN
EN
EN
EN
= 2V
14.5
115
125
= 0.8V
= 0.8V
25, 70
0
100
100
ANALOG DC CHARACTERISTICS
Output Voltage Swing without Clipping
V
= V ± V ± 20mV
IN IO
25, 70
0
±2.7
±2.4
15
-
±2.8
±2.5
20
-
-
V
V
OUT
Output Current
Full
Full
25
-
mA
µA
Input Bias Current
30
50
10
50
Output Offset Voltage
Output Offset Voltage Drift (Note 3)
SWITCHING CHARACTERISTICS
Turn-On Time
-10
-
-
mV
µV/°C
Full
25
25
25
-
-
160
320
-
-
ns
ns
Turn-Off Time
DIGITAL DC CHARACTERISTICS
Input Logic High Voltage
Input Logic Low Voltage
EN Input Current
Full
Full
Full
2
-
-
-
-
-
0.8
2
V
V
0V to 4V
-2
µA
AC CHARACTERISTICS
Insertion Loss
1V
Full
-
0.04
0.05
dB
P-P
FN3990.8
2
December 22, 2005
HA4600
Electrical Specifications V
PARAMETER
= ±5V, R = 10kΩ, V = 2.0V, Unless Otherwise Specified (Continued)
EN
SUPPLY
L
TEST CONDITIONS
= 82Ω, C = 10pF
TEMP. (°C)
25
MIN
TYP
480
380
370
250
175
170
400
1.0
MAX
UNITS
MHz
MHz
MHz
MHz
MHz
MHz
kΩ
-3dB Bandwidth
R
R
R
R
R
R
-
-
S
S
S
S
S
S
L
= 43Ω, C = 15pF
25
-
-
L
= 36Ω, C = 21pF
25
-
-
L
±0.1dB Flat Bandwidth
= 82Ω, C = 10pF
25
-
-
L
= 43Ω, C = 15pF
25
-
-
L
= 36Ω, C = 21pF
25
-
-
L
Input Resistance
Full
Full
Full
Full
25
200
-
Input Capacitance
-
-
-
-
-
-
-
pF
Enabled Output Resistance
Disabled Output Capacitance
Differential Gain (Note 3)
Differential Phase (Note 3)
Off Isolation
15
-
-
Ω
V
= 0.8V
2.0
pF
EN
4.43MHz
4.43MHz
0.01
0.01
85
0.02
0.02
-
%
25
Degrees
dB
1V
, 100MHz,
P-P
Full
V
= 0.8V, R = 10Ω
EN
L
Slew Rate (1.5V
, +SR/-SR)
P-P
R
R
R
= 82Ω, C = 10pF
25
25
-
-
-
-
-
1750/1770
1460/1360
1410/1360
0.01
-
V/µs
V/µs
V/µs
%
S
S
S
L
= 43Ω, C = 15pF
-
-
L
= 36Ω, C = 21pF
25
L
Total Harmonic Distortion (Note 3)
Disabled Output Resistance
NOTE:
Full
Full
0.1
-
12
MΩ
3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
Keep input and output traces as short as possible, because
trace inductance and capacitance can easily become the
performance limiting items.
AC Tes t Circuit
510Ω
400Ω
500Ω
HA4600
75Ω
R
S
-
V
+
OUT
V
IN
HFA1100
75Ω
C
10kΩ
X
NOTE: C = C + Test Fixture Capacitance.
L
X
PC Board Layout
The frequency response of this circuit depends greatly on the
care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid ground
plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
FN3990.8
3
December 22, 2005
HA4600
latch-up, the input currents during power up must not exceed
the values listed in the Absolute Maximum Ratings.
Application Information
General
Inters il’s Cros s point Family
The HA4600 is a unity gain buffer that is optimized for high
performance video applications. The output disable function
makes it ideal for the matrix element in small, high input-to-
output isolation switchers and routers. This buffer contains no
feedback or gain setting resistors, so the output is a true high
impedance load when the IC is disabled (EN = 0). The HA4600
also excels as an input buffer for routers with a large number of
outputs (i.e. each input must connect to a large number of
outputs) and delivers performance superior to most video
amplifiers at a fraction of the cost. As an input buffer, the
HA4600’s low input capacitance and high input resistance
provide excellent video terminations when used with an
external 75Ω resistor.
Intersil offers a variety of 1 x 1 and 4 x 1 crosspoint switches. In
addition to the HA4600, the 1 x 1 family includes the HA4201
which is an essentially similar device that includes a Tally
output (enable indicator). The 4 x 1 family is comprised of the
HA4314, HA4404, and HA4344. The HA4314 is a 14 lead basic
4 x 1 crosspoint. The HA4404 is a 16 lead device with Tally
outputs to indicate the selected channel. The HA4344 is a 16
lead crosspoint with synchronized control lines (A0, A1, CS).
With synchronization, the control information for the next
channel switch can be loaded into the crosspoint without
affecting the current state. On a subsequent clock edge the
stored control state effects the desired channel switch.
Frequency Res pons e
Most applications utilizing the HA4600 require a series
output resistor, R , to tune the response for the specific load
S
capacitance, C , driven. Bandwidth and slew rate degrade
L
as C increases (as shown in the Electrical Specification
L
table), so give careful consideration to component
placement to minimize trace length. As an example, -3dB
bandwidth decreases to 160MHz for C = 100pF, R = 0Ω.
L
S
In big matrix configurations where C is large, better
L
frequency response is obtained by cascading two levels of
crosspoints in the case of multiplexed outputs (see Figure
2), or distributing the load between two drivers if C is due to
L
bussing and subsequent stage input capacitance.
Control Signals
EN - The ENABLE input is a TTL/CMOS compatible, active
high input. When driven low this input forces the output to a
true high impedance state and reduces the power
dissipation by two orders of magnitude. The EN input has no
on-chip pull-up resistor, so it must be connected to a logic
high (recommend V+) if the enable function isn’t utilized.
Switcher/Router Applications
Figure 1 illustrates one possible implementation of a
wideband, low power, 4 x 4 switcher/router. A 4 x 4
switcher/router allows any of the four outputs to be driven by
any one of the four inputs (e.g. each of the four inputs may
connect to a different output, or an input may connect to
multiple outputs). This application utilizes the HA4600 for the
input buffer, the HA4404 (4 x 1 crosspoint switch) as the
switch matrix, and the HFA1112 (programmable gain buffer)
as the gain of two output driver. Figure 2 details a 16 x 1
switcher (basically a 16:1 MUX) which uses the HA4600 in a
cascaded stage configuration to minimize capacitive loading
at each output node, thus increasing system bandwidth.
Power Up Cons iderations
No signals should be applied to the analog or digital inputs
before the power supplies are activated. Latch-up may occur
if the inputs are driven at the time of power up. To prevent
FN3990.8
4
December 22, 2005
HA4600
INPUT BUFFERS
EN
SWITCH MATRIX
10kΩ
SOURCE0
75Ω
OUT
R
S
IN0
T0
IN0
T0
IN0
T0
IN0
T0
HA4600
CS
CS
CS
CS
SOURCE1
75Ω
HA4404
HA4404
HA4404
HA4404
OUT
OUT
OUT
OUT
SOURCE2
75Ω
R
R
R
R
S
S
S
S
IN3
T3
IN3
T3
IN3
T3
IN3
T3
EN
OUT
SOURCE3
75Ω
10kΩ
R
S
+
+
+
+
-
-
-
-
HA4600
OUTPUT BUFFERS
(HFA1112 OR HFA1115)
X2
X2
X2
X2
75Ω
75Ω
75Ω
75Ω
OUT0
OUT1
OUT2
OUT3
FIGURE 1. 4 x 4 SWITCHER/ROUTER APPLICATION
SWITCHING MATRIX
IN0
ISOLATION MUX
OUTPUT BUFFER
SOURCE0
75Ω
IN1
IN2
IN3
T0
SOURCE3
10kΩ
75Ω
T3
R
S
OUT
EN
R
S
OUT
T0
SOURCE4
SOURCE7
IN0
IN1
IN2
IN3
R
S
HA4600
75Ω
75Ω
T3
HFA1112 OR HFA1115
75Ω
-
OUT
+
HA4404
X2
SOURCE8
IN0
IN1
IN2
IN3
75Ω
75Ω
T0
T3
SOURCE11
10kΩ
R
S
EN
R
S
OUT
OUT
T0
SOURCE12
SOURCE15
IN0
IN1
IN2
IN3
HA4600
R
S
75Ω
75Ω
T3
HA4404
FIGURE 2. 16 x 1 SWITCHER APPLICATION
FN3990.8
December 22, 2005
5
HA4600
Typical Performance Curves
V
= ±5V, T = 25°C, R = 10kΩ, Unless Otherwise Specified
SUPPLY
A
L
1.25
1.20
1.15
1.10
1.0
0.75
0.5
1.05
1.0
0.25
0
0.95
0.90
0.85
-0.25
-0.5
0.80
0.75
-0.75
1
10
100
500
-1.0
TIME (5ns/DIV.)
FREQUENCY (MHz)
FIGURE 3. LARGE SIGNAL PULSE RESPONSE
FIGURE 4. INPUT CAPACITANCE vs FREQUENCY
12
0.4
0.3
0.2
0.1
0
9
6
R
= 36Ω
R
= 43Ω
S
S
R
C
= 82Ω
= 10pF
S
L
C
= 21pF
C
= 15pF
R
C
= 43Ω
= 15pF
L
L
S
L
3
0
-3
-0.1
-0.2
R
= 82Ω
R
= 36Ω
S
S
-6
-9
C
= 10pF
C
= 21pF
L
L
-0.3
-0.4
-12
10
500
100
1
1
10
FREQUENCY (MHz)
100
750
FREQUENCY (MHz)
FIGURE 6. GAIN FLATNESS
FIGURE 5. FREQUENCY RESPONSE
V
R
= 1V
P-P
IN
= 10Ω
-50
-60
L
PDIP, SOIC
-70
-80
SOT-23
-90
-100
-110
-120
-130
PDIP, SOIC
1
10
FREQUENCY (MHz)
100
500
FIGURE 7. OFF ISOLATION
FN3990.8
December 22, 2005
6
HA4600
Die Characteris tics
DIE DIMENSIONS:
SUBSTRATE POTENTIAL (Powered Up):
51 mils x 36 mils x 19 mils
V-
1290µm x 910µm x 483µm
PASSIVATION:
METALLIZATION:
Type: Nitride
Type: Metal 1: AICu (1%)/TiW
Thickness: Metal 1: 6kÅ ±0.8kÅ
Type: Metal 2: AICu (1%)
Thickness: 4kÅ ±0.5kÅ
TRANSISTOR COUNT:
53
Thickness: Metal 2: 16kÅ ±1.1kÅ
Metallization Mas k Layout
HA4600
EN
V-
GND
IN
V+
OUT
NC
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN3990.8
7
December 22, 2005
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