HA7-5127-5 [INTERSIL]
8.5MHz, Ultra-Low Noise Precision Operational Amplifier; 8.5MHz ，超低噪声精密运算放大器
| 型号： | HA7-5127-5 |
| 厂家： | 
Intersil |
| 描述： | 8.5MHz, Ultra-Low Noise Precision Operational Amplifier |
| 文件： | 总9页 (文件大小：573K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HA-5127, HA-5127A
Data Sheet
September 1998
File Number 2906.4
8.5MHz, Ultra-Low Noise
Features
Precision Operational Amplifier
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V/µs
• Unity Gain Bandwidth. . . . . . . . . . . . . . . . . . . . . . 8.5MHz
• Low Noise. . . . . . . . . . . . . . . . . . . . . . . . 3nV/√Hz at 1kHz
The HA-5127 monolithic operational amplifier features an
unparalleled combination of precision DC and wideband
high speed characteristics. Utilizing the Intersil D. I.
technology and advanced processing techniques, this
unique design unites low noise (3nV/√Hz) precision
instrumentation performance with high speed (10V/µs)
wideband capability.
• Low V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µV
OS
• High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126dB
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1800V/mV
This amplifier’s impressive list of features include low V
OS
Applications
(10µV), wide unity gain-bandwidth (8.5MHz), high open loop
gain (1800V/mV), and high CMRR (126dB). Additionally, this
flexible device operates over a wide supply range (±5V to
±15V) while consuming only 140mW of power.
• High Speed Signal Conditioners
• Wide Bandwidth Instrumentation Amplifiers
• Low Level Transducer Amplifiers
• Fast, Low Level Voltage Comparators
• Highest Quality Audio Preamplifiers
• Pulse/RF Amplifiers
Using the HA-5127 allows designers to minimize errors while
maximizing speed and bandwidth.
This device is ideally suited for low level transducer signal
amplifier circuits. Other applications which can utilize the
HA-5127’s qualities include instrumentation amplifiers, pulse
amplifiers, audio preamplifiers, and signal conditioning
circuits. This device can easily be used as a design
enhancement by directly replacing the 725, OP25, OP06,
OP07, OP27 and OP37. For the military grade product, refer
to the HA-5127/883 data sheet.
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE ( C)
PKG.
NO.
o
PACKAGE
HA7-5127-2
HA7-5127-5
HA7-5127A-5
-55 to 125 8 Ld CERDIP
F8.3A
0 to 75
0 to 75
0 to 75
8 Ld CERDIP
8 Ld CERDIP
8 Ld SOIC
F8.3A
F8.3A
M8.15
Pinout
HA-5127
(CERDIP, SOIC)
TOP VIEW
HA9P5127-5
(H51275)
1
2
3
4
8
7
6
5
BAL
-IN
+IN
V-
BAL
V+
-
+
OUT
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
HA-5127, HA-5127A
Absolute Maximum Ratings
Thermal Information
o
o
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 44V
Differential Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . 0.7V
Output Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection
Thermal Resistance (Typical, Note 2)
CERDIP Package. . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . .
θ
( C/W)
135
157
θ
( C/W)
JA
JC
50
N/A
o
Maximum Junction Temperature (Ceramic Package, Note 1) . . .175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
Operating Conditions
o
o
Temperature Range
HA-5127-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
HA5127/27A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 75 C
o
o
o
(SOIC - Lead Tips Only)
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
o
1. Maximum power dissipation, including output load must be designed to maintain the maximum junction temperature below 175 C for Hermetic
o
packages, and below 150 C for the plastic packages.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
3. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes.
Electrical Specifications
V
= ±15V, C < 50pF, R < 100Ω
SUPPLY L S
HA-5127A
TYP
HA-5127
TYP
TEMP.
( C)
o
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
TEST CONDITIONS
MIN
MAX
MIN
MAX
UNITS
25
Full
Full
25
-
10
30
25
60
-
30
70
100
300
1.8
±80
±150
75
µV
µV
-
-
o
Average Offset Voltage Drift
Bias Current
-
0.2
±10
±20
7
0.6
±40
±60
35
-
0.4
±15
±35
12
µV/ C
-
-
nA
nA
nA
nA
V
Full
25
-
-
Offset Current
-
-
Full
Full
25
-
15
50
-
30
135
-
Common Mode Range
±10.3
±11.5
6
-
±10.3
±11.5
4
Differential Input Resistance (Note 4)
Input Noise Voltage (Note 5)
1.5
-
0.8
-
MΩ
0.1Hz to 10Hz
f = 10Hz
25
-
-
-
-
-
-
-
0.08
3.5
3.1
3.0
1.7
1.0
0.4
0.18
8.0
4.5
3.8
4.0
2.3
0.6
-
-
-
-
-
-
-
0.09
3.8
3.3
3.2
1.7
1.0
0.4
0.25
8.0
4.5
3.8
-
µV
P-P
Input Noise Voltage Density
(Note 6)
25
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
pA/√Hz
f = 100Hz
f = 1000Hz
f = 10Hz
Input Noise Current Density
(Note 6)
25
f = 100Hz
f = 1000Hz
-
0.6
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
V
= ±10V, R = 2kΩ
25
Full
Full
25
1000
600
114
1
1800
1200
126
-
-
-
-
-
-
700
300
100
1
1500
800
120
-
-
-
-
-
-
V/mV
V/mV
dB
OUT
L
Common Mode Rejection Ratio
Minimum Stable Gain
V
= ±10V
CM
V/V
Unity-Gain-Bandwidth
25
5
8.5
5
8.5
MHz
OUTPUT CHARACTERISTICS
Output Voltage Swing
R
R
= 600Ω
25
Full
25
±10.0
±11.7
111
-
±11.5
±13.8
160
70
-
-
-
-
-
±10.0
±11.5
111
-
±11.5
±13.5
160
70
-
-
-
-
-
V
V
L
= 2kΩ
L
Full Power Bandwidth (Note 7)
Output Resistance
kHz
Ω
Open Loop
25
Output Current
25
16.5
25
16.5
25
mA
TRANSIENT RESPONSE (Note 8)
Rise Time
25
-
-
150
-
-
150
ns
2
HA-5127, HA-5127A
Electrical Specifications
V
= ±15V, C < 50pF, R < 100Ω (Continued)
SUPPLY
L
S
HA-5127A
HA-5127
TYP
10
TEMP.
( C)
o
PARAMETER
Slew Rate
TEST CONDITIONS
= 10V
MIN
TYP
10
MAX
MIN
MAX
UNITS
V/µs
µs
V
25
25
25
7
-
-
-
7
-
-
-
OUT
Settling Time (Note 9)
Overshoot
1.5
20
1.5
-
40
-
20
40
%
POWER SUPPLY CHARACTERISTICS
Supply Current
25
-
-
-
3.5
-
-
4.0
4
-
-
-
3.5
-
-
mA
mA
Full
Full
4.0
51
Power Supply Rejection Ratio
NOTES:
V
= ±4.5V to ±18V
2
16
µV/V
S
4. This parameter value is based upon design calculations.
5. Refer to Typical Performance Curves.
6. The limits for this parameter are guaranteed based on lab characterization, and reflect lot-to-lot variation.
Slew Rate
7. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = -------------------------- .
2πV
PEAK
8. Refer to Test Circuits section of the data sheet.
9. Settling time is specified to 0.1% of final value for a 10V output step and A = -1.
V
Test Circuits and Waveforms
IN
+
-
OUT
50pF
IN
+
-
1.8kΩ
200Ω
OUT
50pF
2kΩ
FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUITS
IN
IN
OUT
OUT
Vertical Scale: Input = 0.5V/Div., Output = 5V/Div.
Vertical Scale: 100mV/Div.
Horizontal Scale: 200ns/Div.
Horizontal Scale: 1µs/Div.
LARGE SIGNAL RESPONSE
SMALL SIGNAL RESPONSE
+15V
2N4416
TO
OSCILLOSCOPE
5kΩ
5kΩ
2kΩ
NOTES:
2kΩ
10. A = -1.
V
+15V
11. Feedback and summing resistors
should be 0.1% matched.
+
AUT
-
V
OUT
V
50pF
12. Clipping diodes are optional.
HP5082-2810 recommended.
IN
-15V
2kΩ
FIGURE 2. SETTLING TIME TEST CIRCUIT
3
Schematic Diagram
BALANCE
7
1
8
V+
R
1
R
Q
R
25
20
R
R
R
R
R
17
15
16
2
21
P32
Q
Q
P38
P37
Q
P35
Q
Q
P44
P43
Q
N45
Q
P55
C
C
5
D
8
Q
N19
Q
N46
4
Q
P56
Q
N47
Q
N13
Q
N29
D
R
1A
R
Q
Q
2A
N14
P17
Q
Q
N20
N15
C
1
Q
P16
R
R
3
7
33
R
Q
12
N51
Q
P26
Q
N52
D
9
C
6
Q
6
Q
N4
N3
OUT
D
54
D
53
Q
P36
Q
R
Q
P26
14
P27
D
R
34
R
18
9
R
13
Q
P36A
Q
Q
N18
N1A
Q
D
N1
41
Q
P21
Q
Q
Q
N2A
N7
Q
Q
R
N2
P30
19
R
24
Q
D
P40
22
Q
N12
D
31
Q
N5
C
N6
3
Q
R
Z
N42
4
58
Q
N42A
D
59
Q
N25
Q
N49
Q
Q
N50
N57
Q
Q
N24
N48
Q
N39
R
R
C
R
23
R
11
10
22
2
R
D
6
R
R
8
60
5
Q
N10
4
V-
SUBSTRATE
Q
N11
3
2
+INPUT
-INPUT
HA-5127, HA-5127A
Application Information
V+
R
T
10K
1
2
3
4
8
7
6
5
-
+
NOTE: Tested Offset Adjustment Range is |V
+ 1mV| minimum referred to output. Typical range is ±4mV with R = 10kΩ.
T
OS
FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT
C
S
+
-
R
2
R
1
R
1
-
R
C
3
+
R
R
3
2
3
Low resistances are preferred for low noise applications as a 1kΩ resistor has 4nV/√Hz of thermal noise. Total resistances of greater than 10kΩ on either
input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve stability.
FIGURE 4. SUGGESTED STABILITY CIRCUITS
o
Typical Performance Curves Unless Otherwise Specified: T = 25 C, V
= ±15V
A
SUPPLY
12
10
8
6
5
4
3
2
1
0
30
20
10
0
-10
6
-20
-30
-40
-50
-60
NOISE VOLTAGE
NOISE CURRENT
4
2
0
-60
-40
-20
0
20
40
60
o
80
100 120
1
10
100
1K
10K
100K
1M
TEMPERATURE ( C)
FREQUENCY (Hz)
FIGURE 5. TYPICAL OFFSET VOLTAGE DRIFT vs TEMPERATURE
FIGURE 6. NOISE CHARACTERISTICS
5
HA-5127, HA-5127A
o
Typical Performance Curves Unless Otherwise Specified: T = 25 C, V
= ±15V (Continued)
SUPPLY
A
140
120
100
80
0.14
0.12
0.1
0.08
0.06
0.04
0.02
0
60
40
20
0
10
100
1K
10K
100K
1M
10M
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
FREQUENCY (Hz)
FIGURE 7. NOISE vs SUPPLY VOLTAGE
FIGURE 8. CMRR vs FREQUENCY
9
8
7
6
5
4
3
6.0
5.0
4.0
3.0
2.0
1.0
0.0
o
T
= 45 C
A
5 TYPICAL UNITS
0
10
20
30
40
0.0
1.0
2.0
3.0
4.0
5.0
TIME AFTER POWER ON (MINUTES)
DAYS
FIGURE 9. OFFSET VOLTAGE DRIFT vs TIME
FIGURE 10. OFFSET VOLTAGE WARM UP DRIFT
40
30
20
10
140
120
100
80
GAIN
-PSRR
0
0
PHASE
+PSRR
-10
60
90
-20
-30
-40
40
20
180
0
10
100
1K
10K
100K
1M
10M
100M
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. PSRR vs FREQUENCY
FIGURE 12. CLOSED LOOP GAIN AND PHASE vs FREQUENCY
6
HA-5127, HA-5127A
o
Typical Performance Curves Unless Otherwise Specified: T = 25 C, V
= ±15V (Continued)
SUPPLY
A
17
16
15
14
13
12
11
10
9
1.05
1.04
1.03
1.02
1.01
1.0
R
C
= 2kΩ
L
L
= 50pF
A
VOL
V
OUT
0.99
0.98
0.97
0.96
0.95
8
7
6
5
4
0
2
4
6
8
10
-60
-40
-20
0
20
40
60
o
80
100 120
LOAD RESISTANCE (kΩ)
TEMPERATURE ( C)
FIGURE 13. A
VOL
AND V vs LOAD RESISTANCE
OUT
FIGURE 14. NORMALIZED SLEW RATE vs TEMPERATURE
28
R
C
= 2kΩ
V
= 0V
2.82
2.80
2.78
2.76
2.74
2.72
L
O
= 50pF
L
24
20
16
12
8
2.70
2.68
4
-55
25
TEMPERATURE ( C)
125
0
0.4
0.8
1.2
1.6
2.0
o
FREQUENCY (MHz)
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
FIGURE 16. MAX UNDISTORTED SINEWAVE OUTPUT vs
FREQUENCY
2.60
1.02
BANDWIDTH AT 0dB
1.01
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
A
OL
V
= 10V STEP
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
OUT
R
= 2kΩ, C = 50pF
L
L
BANDWIDTH
SLEW RATE
0
2
4
6
8
10
12
14
16
18
20
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 18. BANDWIDTH AND SLEW RATE vs SUPPLY
VOLTAGE
7
HA-5127, HA-5127A
o
Typical Performance Curves Unless Otherwise Specified: T = 25 C, V
= ±15V (Continued)
A
SUPPLY
140
120
100
20
15
10
5
R
= 2kΩ
A
R
C
= +1
= 2kΩ
= 50pF
L
V
L
L
80
GAIN
0
GAIN
60
40
0
0
PHASE
-45
-90
20
0
-45
-90
-135
-180
PHASE
10K
-135
-180
10
100
1K
100K
1M
10M 100M
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. OPEN LOOP GAIN AND PHASE
FIGURE 20. CLOSED LOOP GAIN AND PHASE
Horizontal Scale = 1s/Div.
Vertical Scale = 0.002µV/Div.
= 25,000V/V, E = 0.08µV
A
RTI
CL
N
P-P
FIGURE 21. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz)
8
HA-5127, HA-5127A
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
Type: Nitride (Si N ) over Silox (SiO , 5% Phos.)
104 mils x 65 mils x 19 mils
3
4
2
2650µm x 1650µm x 483µm
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
METALLIZATION:
TRANSISTOR COUNT:
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
63
SUBSTRATE POTENTIAL (Powered Up):
PROCESS:
V-
Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5127
BAL
BAL
-IN
V+
+IN
OUT
NC
V-
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
9
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