HCS125 [INTERSIL]
Radiation Hardened Quad Buffer, Three-State; 抗辐射四路缓冲，三态
| 型号： | HCS125 |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened Quad Buffer, Three-State |
| 文件： | 总9页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCS125MS
Radiation Hardened
Quad Buffer, Three-State
September 1995
Features
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
OE1
A1
1
2
3
4
5
6
7
14 VCC
13 OE4
12 A4
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
Y1
OE2
A2
11 Y4
10 OE3
Y2
9
8
A3
Y3
GND
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
1
2
3
4
5
6
7
14
13
12
11
10
9
VCC
OE4
A4
OE1
A1
The Intersil HCS125MS is a Radiation Hardened quad three-state
buffer, each having its own output enable input. A high level on the
enable input puts the output in a high impedance state.
Y1
Y4
OE2
A2
The HCS125MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
OE3
A3
Y2
Y3
GND
8
The HCS125MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Functional Diagram
Ordering Information
PART
NUMBER
TEMPERATURE SCREENING
RANGE LEVEL
An
Yn
P
n
PACKAGE
o
o
HCS125DMSR -55 C to +125 C Intersil Class
S Equivalent
14 Lead SBDIP
OEn
o
o
HCS125KMSR -55 C to +125 C Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
o
HCS125D/
Sample
+25 C
Sample
Sample
Die
14 Lead SBDIP
TRUTH TABLE
INPUTS
OUTPUT
o
HCS125K/
Sample
+25 C
14 Lead Ceramic
Flatpack
An
H
OEn
L
Yn
H
L
o
HCS125HMSR
+25 C
Die
L
L
X
H
Z
L = Low, H = High, X = Don’t Care, Z = High Impedance
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518831
File Number 3559.1
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
123
Specifications HCS125MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±35mA
Thermal Resistance
SBDIP Package. . . . . . . . . . . . . . . . . . . .
Ceramic Flatpack Package . . . . . . . . . . . 116 C/W
Maximum Package Power Dissipation at +125 C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W
If device power exceeds package dissipation capability, provide heat
θ
θ
JA
JC
o
o
74 C/W
24 C/W
o
o
30 C/W
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
o
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265 C
o
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 sinking or derate linearly at the following rate:
o
(All Voltage Reference to the VSS Terminal)
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/ C
o
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/ C
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Time at 4.5V VCC (tr, tf) . . . . . . . 100ns/V Max.
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
Input High Voltage. . . . . . . . . . . . . . . . . . . . . . . VCC to 70% of VCC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . .0V to 30% of VCC
o
o
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
LIMITS
(NOTE 1)
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
MIN
MAX
UNITS
µA
o
Supply Current
ICC
VCC = 5.5V,
VIN = VCC or GND
1
2, 3
1
+25 C
-
40
o
o
+125 C, -55 C
-
750
µA
o
Output Current
(Source)
IOH
IOL
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC -0.4V,
VIL = 0V, (Note 2)
+25 C
-7.2
-6.0
7.2
6.0
-
-
-
-
-
mA
mA
mA
mA
V
o
o
2, 3
1
+125 C, -55 C
o
Output Current
(Sink)
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V,
(Note 2)
+25 C
o
o
2, 3
1, 2, 3
+125 C, -55 C
o
o
o
Output Voltage High
VOH
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOH = -50µA
+25 C, +125 C, -55 C
VCC
-0.1
o
o
o
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = -50µA
1, 2, 3
1, 2, 3
1, 2, 3
+25 C, +125 C, -55 C
VCC
-0.1
-
V
V
V
o
o
o
Output Voltage Low
VOL
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOL = 50µA
+25 C, +125 C, -55 C
-
-
0.1
0.1
o
o
o
VCC = 4.5V, VIH = 3.15V,
+25 C, +125 C, -55 C
VIL = 1.35V, IOL = 50µA
o
Input Leakage
Current
IIN
IOZ
FN
VCC = 5.5V,
VIN = VCC or GND
1
2, 3
+25 C
-
-
-
-
-
±0.5
±5.0
±1.0
±50
-
µA
µA
µA
µA
V
o
o
+125 C, -55 C
o
Three-State Output
Leakage Current
VCC = 5.5V, Force Voltage
= 0V or VCC
1
+25 C
o
o
2, 3
+125 C, -55 C
o
o
o
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 3)
7, 8A, 8B
+25 C, +125 C, -55 C
NOTES:
1. All voltages reference to device GND.
2. Force/Measure functions may be interchanged.
3. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number 518831
124
Specifications HCS125MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
LIMITS
(NOTES 1, 2)
A SUB-
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
MIN
MAX
21
UNITS
ns
o
Propagation Delay
Input to Y
TPHL
TPLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
9
+25 C
2
2
2
2
2
2
o
o
10, 11
9
+125 C, -55 C
25
ns
o
Enable Delay
OE toY
TPZL
TPZH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
25
ns
o
o
10, 11
9
+125 C, -55 C
30
ns
o
Disable Delay
OE toY
TPLZ
TPHZ
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
25
ns
o
o
10, 11
+125 C, -55 C
30
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
60
UNITS
pF
o
Capacitance Power
Dissipation
CPD
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
1
1
1
1
1
1
1
1
+25 C
-
-
o
o
+125 C, -55 C
90
pF
o
Input Capacitance
Output Capacitance
CIN
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
+25 C
-
10
pF
o
o
+125 C, -55 C
-
10
pF
o
COUT
VCC = 5.0V, VIH = 5.0V,
VIL = 0V, f = 1MHz
+25 C
1
1
1
1
20
pF
o
o
+125 C, -55 C
20
pF
o
Output Transition
Time
TTHL
TTLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
15
ns
o
o
+125 C, -55 C
22
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
(NOTE 1)
PARAMETER
Supply Current
SYMBOL
ICC
CONDITIONS
TEMPERATURE
MIN
-
MAX
0.75
-
UNITS
mA
o
VCC = 5.5V, VIN = VCC or GND
+25 C
o
Output Current
(Source)
IOH
VCC = VIH = 4.5V,
VOUT = VCC -0.4V, VIL = 0
+25 C
-6.0
mA
o
Output Current (Sink)
IOL
VCC = VIH = 4.5V,
+25 C
6.0
-
mA
VOUT = 0.4V, VIL = 0
Spec Number 518831
125
Specifications HCS125MS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
200K RAD
LIMITS
(NOTE 1)
PARAMETER
SYMBOL
CONDITIONS
TEMPERATURE
MIN
MAX
UNITS
o
Output Voltage High
VOH
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOH = -50µA
+25 C
VCC
-0.1
-
V
o
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = -50µA
+25 C
VCC
-0.1
-
V
V
V
o
Output Voltage Low
VOL
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOL = 50µA
+25 C
-
-
0.1
0.1
o
VCC = 4.5V, VIH = 3.15V,
+25 C
VIL = 1.35V, IOL = 50µA
o
Input Leakage Current
IIN
VCC = 5.5V, VIN = VCC or GND
+25 C
-
-
±5
µA
µA
o
Three-State Output
Leakage Current
IOZ
VCC = 5.5V, Force Voltage
= 0V or VCC
+25 C
±50
o
Noise Immunity
Functional Test
FN
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 2)
+25 C
-
-
V
o
Propagation Delay
Input to Y
TPHL
TPLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
2
2
2
25
30
30
ns
ns
ns
o
Enable Delay
OE to Y
TPZL
TPZH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
o
Disable Delay
OE to Y
TPLZ
TPHZ
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
+25 C
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
o
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 C)
GROUP B
PARAMETER
SUBGROUP
DELTA LIMIT
+12µA
ICC
5
5
5
IOL/IOH
IOZ
−15% of 0 Hour
±200nA
Spec Number 518831
126
Specifications HCS125MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
Sample/5005
Sample/5005
GROUP A SUBGROUPS
READ AND RECORD
ICC, IOL/H, IOZL/H
ICC, IOL/H, IOZL/H
ICC, IOL/H, IOZL/H
1, 7, 9
1, 7, 9
Interim Test I (Postburn-In)
Interim Test II (Postburn-In)
PDA
1, 7, 9
1, 7, 9, Deltas
1, 7, 9
Interim Test III (Postburn-In)
PDA
ICC, IOL/H, IOZL/H
1, 7, 9, Deltas
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
Final Test
Group A (Note 1)
Group B
Subgroup B-5
Subgroup B-6
Subgroups 1, 2, 3, 9, 10, 11
Group D
NOTE:
1, 7, 9
1. Alternate group A testing in accordance with Method 5005 of Mil-Std-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
METHOD
PRE RAD
POST RAD
PRE RAD
1, 9
POST RAD
5005
1, 7, 9
Table 4
Table 4 (Note 1)
1. Except FN test which will be performed 100% go/no-go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
STATIC I BURN-IN (Note 1)
3, 6, 8, 11
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
1, 2, 4, 5, 7, 9, 10,
12, 13
-
14
-
-
STATIC II BURN-IN (Note 1)
3, 6, 8, 11
7
7
-
1, 2, 4, 5, 9,
10, 12, 13, 14
-
-
-
DYNAMIC BURN-IN (Note 2)
-
3, 6, 8, 11
14
1, 2, 4, 5, 9,
10, 12, 13
NOTES:
1. Each pin except VCC and GND will have a series resistor of 10K ± 5%.
2. Each pin except VCC and GND will have a series resistor of 1K ± 5%.
TABLE 9. IRRADIATION TEST CONNECTIONS
GROUND VCC = 5V ± 0.5V
1, 2, 4, 5, 9, 10, 12, 13, 14
OPEN
3, 6, 8, 11
7
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group E,
Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518831
127
HCS125MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% PIND, Method 2020, Condition A
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number 518831
128
HCS125MS
Propagation Delay Load Circuit
Propagation Delay Timing Diagram
VIH
TEST
POINT
DUT
INPUT
VS
VSS
TPLH
CL
CL = 50pF
RL = 500Ω
RL
TPHL
VOH
VOL
VS
OUTPUT
Transition Timing Diagram
TTLH
VOH
TTHL
80%
80%
20%
20%
OUTPUT
VOL
VOLTAGE LEVELS
PARAMETER
VCC
HCS
4.50
4.50
2.25
0
UNITS
V
V
V
V
V
VIH
VS
VIL
GND
0
Three-State High Timing Diagrams
Three-State High Load Circuit
VIH
TEST
DUT
POINT
INPUT
VS
VSS
TPZH
CL
CL = 50pF
RL
TPHZ
RL = 500Ω
VOH
VOZ
VT
VW
OUTPUT
THREE-STATE HIGH VOLTAGE LEVELS
PARAMETER
VCC
HCS
4.50
4.50
2.25
2.25
3.60
0
UNITS
V
V
V
V
V
V
VIH
VS
VT
VW
GND
Spec Number 518831
129
HCS125MS
Three-State Low Load Circuit
Three-State Low Timing Diagrams
VCC
VIH
INPUT
VS
VSS
RL
CL
TPZL
TPLZ
VOZ
VOL
TEST
POINT
DUT
VT
VW
OUTPUT
CL = 50pF
THREE-STATE LOW VOLTAGE LEVELS
RL = 500Ω
PARAMETER
VCC
HCS
4.50
4.50
2.25
2.25
0.90
0
UNITS
V
V
V
V
V
V
VIH
VS
VT
VW
GND
Spec Number 518831
130
HCS125MS
Die Characteristics
DIE DIMENSIONS:
92 x 91(mils)
2.34 x 2.31 (mm)
METALLIZATION:
Type: AlSi
Thickness: 11kÅ ±1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ±2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105 A/cm2
BOND PAD SIZE:
4 x 4 (mils)
100 x 100 (µm)
Metallization Mask Layout
HCS125MS
(12) A4
Y1 (3)
OE2 (4)
(11) Y4
A2 (5)
(10) OE3
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 518831
131
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