HCTS85DMSR [INTERSIL]
Radiation Hardened 4-Bit Magnitude Comparator; 抗辐射4位幅度比较
| 型号： | HCTS85DMSR |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened 4-Bit Magnitude Comparator |
| 文件： | 总10页 (文件大小：217K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCTS85MS
Radiation Hardened
4-Bit Magnitude Comparator
September 1995
Features
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
B3
(A<B)IN
1
2
3
4
5
6
7
8
16 VCC
15 A3
14 B2
13 A2
12 A1
11 B1
10 A0
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
(A>B)OUT
GND
• Fanout (Over Temperature Range)
-Standard Outputs: 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
9
B0
• LSTTL Input Compatibility
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
Description
The Intersil HCTS85MS is a Radiation Hardened 4-bit high
speed magnitude comparator. This device compares two
binary, BCD, or other monotonic codes and presents the
three possible magnitude results at the outputs (A>B, A<B,
and A=B). The 4-bit input words are weighted (A0 to A3 and
B0 to B3), where A3 and B3 are the most significant bits.
The HCTS85MS is expandable without external gating, both
serial and parallel operation.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B3
(A<B)IN
VCC
A3
B2
A2
A1
B1
A0
B0
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
(A>B)OUT
GND
The HCTS85MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
The HCTS85MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCTS85DMSR
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
o
o
-55 C to +125 C
Intersil Class S Equivalent
16 Lead SBDIP
o
o
HCTS85KMSR
-55 C to +125 C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
16 Lead SBDIP
o
HCTS85D/Sample
HCTS85K/Sample
HCTS85HMSR
+25 C
Sample
Sample
Die
o
+25 C
16 Lead Ceramic Flatpack
Die
o
+25 C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518624
File Number 3059.1
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
HCTS85MS
Functional Block Diagram
B3
1
A2
B2
B3
A3
B3
A3
15
A3
B3
A3
B2
A1
B1
7
(A<B)
OUT
14
13
B2
A2
B2
A2
A2
B1
11
12
B1
A1
B1
6
A1
A1
(A=B)
OUT
4
(A>B)
IN
B0
A0
B0
B0
9
B0
A0
B0
A0
10
A0
A0
3
2
(A=B)
IN
5
(A>B)
OUT
(A<B)
IN
A1
B1
A3
B3
A2
B2
TRUTH TABLE
CASCADING INPUTS
COMPARING INPUTS
OUTPUTS
A3, B3 A2, B2 A1, B1 A0, B0
A>B
A<B
X
A=B
A>B
H
L
A<B
L
A=B
L
A3>B3
A3<B3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
L
X
X
X
X
X
X
X
X
L
X
H
L
L
A3=B3 A2>B2
A3=B3 A2<B2
X
H
L
L
X
H
L
L
A3=B3 A2=B2 A1>B1
A3=B3 A2=B2 A1<B1
X
H
L
L
Single Device
OR
Series Cascading
X
H
L
L
A3=B3 A2=B2 A1=B1 A0>B0
A3=B3 A2=B2 A1=B1 A0<B0
A3=B3 A2=B2 A1=B1 A0=B0
A3=B3 A2=B2 A1=B1 A0=B0
A3=B3 A2=B2 A1=B1 A0=B0
A3=B3 A2=B2 A1=B1 A0=B0
A3=B3 A2=B2 A1=B1 A0=B0
A3=B3 A2=B2 A1=B1 A0=B0
X
H
L
L
X
H
L
L
L
H
L
L
H
L
L
H
L
L
L
H
H
L
L
H
H
L
X
H
L
X
L
L
H
L
L
L
Parallel Cascading
L
H
H
L
NOTE: L = Logic Level Low, H = Logic Level High, x = Immaterial
Spec Number 518624
2
Specifications HCTS85MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Thermal Resistance
θ
θ
JA
JC
o
o
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
SBDIP Package. . . . . . . . . . . . . . . . . . . .
Ceramic Flatpack Package . . . . . . . . . . . 114 C/W
Maximum Package Power Dissipation at +125 C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
73 C/W
24 C/W
o
o
29 C/W
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
o
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265 C
o
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
o
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/ C
o
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/ C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC
o
o
Operating Temperature Range (T ) . . . . . . . . . . . . -55 C to +125 C
A
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . 500ns Max.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
LIMITS
(NOTE 1)
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
MIN
MAX
UNITS
µA
o
Quiescent Current
ICC
VCC = 5.5V,
VIN = VCC or GND
1
2, 3
1
+25 C
-
40
o
o
+125 C, -55 C
-
750
µA
o
Output Current
(Sink)
IOL
IOH
VOL
VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
+25 C
4.8
4.0
-4.8
-4.0
-
-
mA
mA
mA
mA
V
o
o
2, 3
1
+125 C, -55 C
-
-
o
Output Current
(Source)
VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
+25 C
o
o
2, 3
1, 2, 3
+125 C, -55 C
-
o
o
o
Output Voltage Low
VCC = 4.5V, VIH = 2.25V,
+25 C, +125 C, -55 C
0.1
IOL = 50µA, VIL = 0.8V
o
o
o
VCC = 5.5V, VIH = 2.75V,
IOL = 50µA, VIL = 0.8V
1, 2, 3
1, 2, 3
1, 2, 3
+25 C, +125 C, -55 C
-
0.1
V
V
V
o
o
o
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V
+25 C, +125 C, -55 C
VCC
-0.1
-
-
o
o
o
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V
+25 C, +125 C, -55 C
VCC
-0.1
o
Input Leakage
Current
IIN
FN
VCC = 5.5V, VIN = VCC or
GND
1
+25 C
-
-
-
±0.5
±5.0
-
µA
µA
-
o
o
2, 3
+125 C, -55 C
o
o
o
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
+25 C, +125 C, -55 C
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number 518624
3
Specifications HCTS85MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
GROUPS
LIMITS
MIN
(NOTES 1, 2)
PARAMETER
SYMBOL
CONDITIONS
TEMPERATURE
MAX
36
43
57
66
45
51
42
50
29
35
34
39
28
37
35
40
UNITS
ns
o
An to (A>B)OUT
TPHL,
TPLH
VCC = 4.5V
9
10, 11
9
+25 C
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
o
o
+125 C, -55 C
ns
o
Bn to (A>B)OUT
TPHL,
TPLH
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
An, Bn to (A<B)OUT
An, Bn to (A=B)OUT
An, Bn to (A>B)OUT
TPHL,
TPLH
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
TPHL,
TPLH
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
TPHL,
TPLH
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
(A>B)IN to
(A>B)OUT
TPHL,
TPLH
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
(A=B)IN to
(A=B)OUT
TPHL,
TPLH
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
(A<B)IN to
(A<B)OUT
TPHL,
TPLH
+25 C
ns
o
o
10, 11
+125 C, -55 C
ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
39
UNITS
pF
o
Capacitance Power
Dissipation
CPD
VCC = 5.0V, f = 1MHz
1
1
1
1
1
1
+25 C
-
-
-
-
-
-
o
o
+125 C, -55 C
92
pF
o
Input Capacitance
CIN
VCC = 5.0V, f = 1MHz
VCC = 4.5V
+25 C
10
pF
o
o
+125 C, -55 C
10
pF
o
Output Transition
Time
TTHL,
TTLH
+25 C
15
ns
o
o
+125 C, -55 C
22
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number 518624
4
Specifications HCTS85MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
(NOTES 1, 2)
PARAMETER
Quiescent Current
Output Current (Sink)
SYMBOL
ICC
CONDITIONS
TEMPERATURE
MIN
MAX
0.750
-
UNITS
mA
o
VCC = 5.5V, VIN = VCC or GND
+25 C
-
o
IOL
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
+25 C
4.0
mA
o
Output Current
(Source)
IOH
VOL
VOH
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
+25 C
-4.0
-
-
0.1
-
mA
V
o
Output Voltage Low
Output Voltage High
Input Leakage Current
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA
+25 C
o
VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA
+25 C
VCC
-0.1
V
o
IIN
FN
VCC = 5.5V, VIN = VCC or GND
+25 C
-
-
±5
µA
o
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
+25 C
-
-
o
An to (A>B)OUT
Bn to (A>B)OUT
TPHL,
TPLH
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
+25 C
2
2
2
2
2
2
2
43
66
51
50
35
40
37
ns
ns
ns
ns
ns
ns
ns
o
TPHL,
TPLH
+25 C
o
An, Bn to (A<B)OUT
An, Bn to (A=B)OUT
(A<B)IN to (A<B)OUT
(A>B)IN to (A>B)OUT
(A=B)IN to (A=B)OUT
NOTES:
TPHL,
TPLH
+25 C
o
TPHL,
TPLH
+25 C
o
TPHL,
TPLH
+25 C
o
TPHL,
TPLH
+25 C
o
TPHL,
TPLH
+25 C
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
o
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25 C)
GROUP B
PARAMETER
SUBGROUP
DELTA LIMIT
12µA
ICC
5
5
IOL/IOH
-15% of 0 Hour
Spec Number 518624
5
Specifications HCTS85MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
GROUP A SUBGROUPS
READ AND RECORD
ICC, IOL/H
1, 7, 9
1, 7, 9
Interim Test I (Postburn-In)
Interim Test II (Postburn-In)
PDA
ICC, IOL/H
ICC, IOL/H
1, 7, 9
1, 7, 9, Deltas
Interim Test III (Postburn-In)
PDA
1, 7, 9
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Group A (Note 1)
Group B
Subgroup B-5
Subgroups 1, 2, 3, 9, 10, 11,
(Note 2)
Subgroup B-6
Sample/5005
Sample/5005
1, 7, 9
1, 7, 9
Group D
NOTES:
1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
2. Table 5 parameters only.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
CONFORMANCE
GROUPS
Group E Subgroup 2
NOTE:
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
5, 6, 7 1 - 4, 8 - 15
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
5, 6, 7
DYNAMIC BURN-IN TEST CONDITIONS (Note 2)
1, 8, 10, 11, 13
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
16
50kHz
25kHz
-
-
-
-
-
-
8
1 - 4, 9 - 16
2, 3, 4, 16
-
5, 6, 7
12, 15
9, 14
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in.
2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
5, 6, 7,
8
1 - 4, 9 - 16
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518624
6
HCTS85MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% PIND, Method 2020, Condition A
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number 518624
7
HCTS85MS
AC Load Circuit
AC Timing Diagrams
DUT
TEST
POINT
VIH
INPUT
VS
CL
RL
VIL
TPLH
TPHL
VOH
VOL
VOH
VOL
CL = 50pF
VS
OUTPUT
RL = 500Ω
TTLH
TTHL
80%
80%
20%
20%
OUTPUT
AC VOLTAGE LEVELS
PARAMETER
VCC
HCTS
4.50
3.00
1.30
0
UNITS
V
V
V
V
V
VIH
VS
VIL
GND
0
Spec Number 518624
8
HCTS85MS
Die Characteristics
DIE DIMENSIONS:
100 x 100 mils
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
Metallization Mask Layout
HCTS85MS
(A<B)IN
(2)
B3
(1)
VCC
(16)
A3
(15)
(A=B)IN(3)
(A>B)IN(4)
(14) B2
(13) A2
(A<B)OUT(5)
(12) A1
(A=B)OUT(6)
(11) B1
(7)
(A>B)OUT
(8)
GND
(9)
B0
(10)
A0
Spec Number 518624
9
HCTS85MS
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Spec Number
10
相关型号：
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