HFA3-0001-5

更新时间:2024-09-18 02:04:59
品牌:INTERSIL
描述:Ultra High Slew RateOperational Amplifier

HFA3-0001-5 概述

Ultra High Slew RateOperational Amplifier 超高摆RateOperational放大器

HFA3-0001-5 数据手册

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HFA-0001  
®
September 1998  
File Number 2916.3  
Ultra High Slew RateOperational Amplifier  
Features  
• Unity Gain Bandwidth. . . . . . . . . . . . . . . . . . . . . . 350MHz  
• Full Power Bandwidth . . . . . . . . . . . . . . . . . . . . . . 53MHz  
• High Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . 1000V/µs  
• High Output Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50mA  
• Monolithic Construction  
The HFA-0001 is an all bipolar op amp featuring high slew  
rate (1000V/µs), and high unity gain bandwidth (350MHz).  
These features combined with fast settling time (25ns) make  
this product very useful in high speed data acquisition  
systems as well as RF, video, and pulse amplifier designs.  
Other outstanding characteristics include low bias currents  
(15µA), low offset current (18µA), and low offset voltage  
(6mV).  
Applications  
The HFA-0001 offers high performance at low cost. It can  
replace hybrids and RF transistor amplifiers, simplifying  
designs while providing increased reliability due to  
• RF/IF Processors  
• Video Amplifiers  
monolithic construction. To enhance the ease of design, the  
HFA-0001 has a 50Ω ±20% resistor connected from the  
output of the op amp to a separate pin. This can be used  
when driving 50strip line, microstrip, or coax cable.  
• High Speed Cable Drivers  
• Pulse Amplifiers  
• High Speed Communications  
• Fast Data Acquisition Systems  
Part Number Information  
PART  
NUMBER  
TEMPERATURE  
RANGE  
PACKAGE  
o
o
HFA1-0001-5  
HFA1-0001-9  
HFA3-0001-5  
HFA3-0001-9  
HFA9P0001-5  
0 C to +75 C 14 Lead Ceramic Sidebraze DIP  
o
o
-40 C to +85 C 14 Lead Ceramic Sidebraze DIP  
o
o
0 C to +75 C 8 Lead Plastic DIP  
o
o
-40 C to +85 C 8 Lead Plastic DIP  
o
o
0 C to +75 C 16 Lead Widebody SOIC  
Pinouts  
HFA-0001  
(PDIP)  
TOP VIEW  
HFA-0001  
(CDIP)  
TOP VIEW  
HFA-0001  
(300 MIL SOIC)  
TOP VIEW  
16 NC  
15 NC  
NC  
-IN  
+IN  
V-  
1
2
3
4
8
7
6
5
R
NC  
NC  
NC  
-IN  
+IN  
V-  
1
2
3
4
5
6
7
8
NC  
NC  
NC  
-IN  
+IN  
V-  
1
2
3
4
5
6
7
14 NC  
13 NC  
SENSE  
V+  
+
14 R  
SENSE  
OUT  
NC  
12  
R
SENSE  
13 V+  
11 V+  
+
12 OUT  
11 NC  
10 NC  
+
10 OUT  
9
8
NC  
NC  
NC  
NC  
NC  
9
NC  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1
HFA-0001  
Absolute Maximum Ratings (Note 1)  
Operating Conditions  
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . .12V  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V  
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±4V  
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA  
Operating Temperature Range  
HFA-0001-9 . . . . . . . . . . . . . . . . . . . . . . . . . .-40 C T +85 C  
HFA-0001-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C T +75 C  
Storage Temperature Range . . . . . . . . . . . . . .-65 C T +150 C  
o
o
A
A
o
o
o
o
A
o
Junction Temperature (Note 9) . . . . . . . . . . . . . . . . . . . . . . .+175 C  
o
o
Junction Temperature (Plastic Package). . . . . . . . . . . . . . . .+150 C  
Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . .+300 C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
Electrical Specifications V+ = +5V, V- = -5V, Unless Otherwise Specified  
HFA-0001-9  
TYP  
HFA-0001-5  
TYP  
PARAMETER  
INPUT CHARACTERISTICS  
TEMP  
MIN  
MAX  
MIN  
MAX  
UNITS  
o
Offset Voltage  
+25 C  
-
-
6
4.5  
12.5  
50  
15  
20  
45  
-
-
-
6
4.5  
12.5  
50  
30  
mV  
mV  
mV  
High  
Low  
High  
Low  
30  
-
-
35  
o
Average Offset Voltage Drift  
Bias Current  
-
-
-
µV/ C  
o
-
100  
15  
-
-
100  
15  
-
µV/ C  
o
+25 C  
-
50  
50  
25  
50  
-
-
100  
µA  
µA  
Full  
-
20  
-
20  
100  
o
Offset Current  
+25 C  
-
18  
-
18  
50  
50  
-
µA  
Full  
-
22  
-
22  
µA  
o
Common Mode Range  
Differential Input Resistance  
Input Capacitance  
+25 C  
±3  
-
-
±3  
-
-
V
o
+25 C  
10  
-
10  
-
kΩ  
o
+25 C  
-
2
-
-
2
-
pF  
o
Input Noise Voltage  
0.1Hz to 10Hz  
10Hz to 1MHz  
+25 C  
-
3.5  
6.7  
640  
170  
6
-
-
3.5  
6.7  
640  
170  
6
-
µVrms  
µVrms  
nV/Hz  
nV/Hz  
nV/Hz  
nA/Hz  
nA/Hz  
nA/Hz  
o
+25 C  
-
-
-
-
o
Input Noise Voltage  
Input Noise Current  
f
f
f
f
f
f
= 10Hz  
+25 C  
-
-
-
-
O
O
O
O
O
O
o
= 100Hz  
= 100kHz  
= 10Hz  
+25 C  
-
-
-
-
o
+25 C  
-
-
-
-
o
+25 C  
-
2.35  
0.57  
0.16  
-
-
2.35  
0.57  
0.16  
-
o
= 100Hz  
= 1000Hz  
+25 C  
-
-
-
-
o
+25 C  
-
-
-
-
TRANSFER CHARACTERISTICS  
Large Signal Voltage Gain (Note 2)  
o
+25 C  
150  
150  
150  
45  
40  
45  
-
200  
170  
220  
47  
-
-
-
-
-
-
-
-
150  
100  
150  
42  
40  
42  
-
200  
170  
220  
47  
-
-
-
-
-
-
-
-
V/V  
V/V  
V/V  
dB  
High  
Low  
o
Common Mode Rejection Ratio (Note 3)  
+25 C  
High  
Low  
45  
45  
dB  
48  
48  
dB  
o
Unity Gain Bandwidth  
+25 C  
350  
-
350  
-
MHz  
V/V  
Minimum Stable Gain  
Full  
1
1
OUTPUT CHARACTERISTICS  
o
Output Voltage Swing  
R
= 100Ω  
+25 C  
-
±3.5  
-
-
±3.5  
-
V
L
2
HFA-0001  
Electrical Specifications V+ = +5V, V- = -5V, Unless Otherwise Specified (Continued)  
HFA-0001-9  
HFA-0001-5  
PARAMETER  
TEMP  
MIN  
±3.5  
±3.0  
±3.5  
-
TYP  
±3.7  
±3.6  
±3.7  
53  
MAX  
MIN  
±3.5  
±3.0  
±3.5  
-
TYP  
±3.7  
±3.6  
±3.7  
53  
MAX  
UNITS  
V
o
R
= 1kΩ  
+25 C  
-
-
-
-
-
-
-
-
-
-
-
-
L
High  
Low  
V
V
o
Full Power Bandwidth (Note 5)  
Output Resistance, Open Loop  
Output Current  
+25 C  
MHz  
o
+25 C  
-
3
-
3
Full  
±30  
±50  
±30  
±50  
mA  
TRANSIENT RESPONSE  
Rise Time (Note 4, 6)  
o
+25 C  
-
-
-
-
-
480  
1000  
875  
25  
-
-
-
-
-
-
-
-
-
-
480  
1000  
875  
25  
-
-
-
-
-
ps  
V/µs  
V/µs  
ns  
o
Slew Rate (Note 4, 7)  
R
R
= 1kΩ  
+25 C  
L
L
o
= 100Ω  
+25 C  
o
Settling Time (3V Step)  
Overshoot (Note 4, 6)  
0.1%  
+25 C  
o
+25 C  
36  
36  
%
POWER SUPPLY CHARACTERISTICS  
Supply Current  
Full  
-
65  
42  
41  
42  
75  
-
-
65  
42  
41  
42  
75  
-
mA  
dB  
dB  
dB  
o
Power Supply Rejection Ratio (Note 8)  
+25 C  
40  
35  
40  
37  
35  
37  
High  
Low  
-
-
-
-
NOTES:  
1. Absolute Maximum Ratings are limiting values applied individually beyond which the serviceability of the circuit may be impaired. Functional  
operation under any of these conditions is not necessarily implied.  
2. V  
= 0 to ±2V, R = 1k.  
= ±2V.  
OUT  
3. V  
L
CM  
4. R = 100.  
L
SlewRate  
5. Full Power Bandwidth is calculated by equation: FPBW = ----------------------------, V  
= 3.0V .  
PEAK  
2πV  
PEAK  
6. V  
7. V  
= ±200mV, A = +1.  
V
= ±3V, A = +1.  
OUT  
OUT  
V
8. V = ±4V to ±6V.  
S
9. See Thermal Constants in ‘Applications Information’ text. Maximum power dissipation, including output load, must be designed to maintain the  
o
o
junction temperature below +175 C for hermetic packages, and below +150 C for plastic packages.  
Schematic Diagram  
Die Characteristics  
Thermal Constants ( C/W)  
o
θ
θ
JC  
V+  
JA  
HFA1-0001-5/-9  
HFA3-0001-5  
HFA9P-0001-5/-9  
75  
98  
96  
13  
36  
27  
R
SENSE  
V
-IN  
+IN  
OUT  
V-  
3
HFA-0001  
Test Circuits  
V
+
V
+
IN  
IN  
V
V
OUT  
OUT  
50Ω  
50Ω  
20pF  
1kΩ  
100Ω  
50Ω  
50Ω  
FIGURE 1. LARGE SIGNAL RESPONSE TEST CIRCUIT  
FIGURE 2. SMALL SIGNAL RESPONSE TEST CIRCUIT  
LARGE SIGNAL RESPONSE  
= 0V to 3V  
SMALL SIGNAL RESPONSE  
= 0mV to 200mV  
V
V
OUT  
OUT  
Vertical Scale: 1V/Div.  
Vertical Scale: 100mV/Div.  
HorizontalScale: 2ns/Div.  
Horizontal Scale: 2ns/Div.  
V
IN  
V
IN  
V
OUT  
V
OUT  
NOTE: Initial Step In Output Is Due To Fixture Feedthrough  
PROPAGATION DELAY  
Vertical Scale: 500mV/Div.  
Horizontal Scale: 2ns/Div.  
A
= +1, R = 100, V = 0V to 3V  
V
L
OUT  
V
SETTLE  
1kΩ  
1kΩ  
100Ω  
V
100Ω  
IN  
V
OUT  
+
FIGURE 3. SETTLING TIME SCHEMATIC  
NOTE: Test Fixture Delay of 450ps is Included  
4
HFA-0001  
o
Typical Performance Curves V = ±5V, T = +25 C, Unless Otherwise Specified  
S
A
50  
40  
30  
20  
10  
0
V
V
IN  
OUT  
50Ω  
100Ω  
GAIN  
20  
10  
50Ω  
0
-10  
-20  
GAIN  
180  
135  
90  
45  
0
180  
135  
90  
PHASE  
PHASE  
45  
R
= 100Ω  
L
A
= +1, R = 100, R = 50Ω  
L F  
V
0
1M  
10M  
100M  
1G  
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
FREQUENCY (Hz)  
FIGURE 4. OPEN LOOP GAIN AND PHASE vs FREQUENCY  
FIGURE 5. CLOSED LOOP GAIN vs FREQUENCY  
V
V
IN  
OUT  
20  
30  
20  
10  
0
50Ω  
100Ω  
10  
0
100Ω  
V
IN  
50Ω  
V
OUT  
100Ω  
900Ω  
100Ω  
-10  
-20  
-10  
180  
135  
90  
45  
0
180  
135  
90  
45  
0
A
= +10  
V
L
R
= 100Ω  
1M  
100K  
1M  
10M  
100M  
1G  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 6. CLOSED LOOP GAIN vs FREQUENCY  
FIGURE 7. CLOSED LOOP GAIN vs FREQUENCY  
80  
70  
700  
A
V
= +1, R = 100Ω  
V
L
= 0mV to 200mV  
OUT  
600  
500  
400  
300  
200  
100  
60  
50  
40  
30  
20  
10  
0
100K  
1M  
10M  
100M  
1G  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
FREQUENCY (Hz)  
TEMPERATURE ( C)  
FIGURE 8. RISE TIME vs TEMPERATURE  
FIGURE 9. CMRR vs FREQUENCY  
5
HFA-0001  
o
Typical Performance Curves V = ±5V, T = +25 C, Unless Otherwise Specified (Continued)  
S
A
80  
70  
60  
50  
40  
30  
20  
10  
0
25  
20  
15  
10  
5
-PSRR  
0
+PSRR  
-5  
-10  
-15  
-20  
-60  
-40  
-20  
0
20  
40  
60  
o
80 100  
120  
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
TEMPERATURE ( C)  
FIGURE 10. PSRR vs FREQUENCY  
FIGURE 11. OFFSET VOLTAGE vs TEMPERATURE  
(3 REPRESENTATIVE UNITS)  
20  
40  
15  
10  
5
30  
20  
10  
0
0
-5  
-10  
-15  
-20  
-10  
-20  
-25  
-60  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
TEMPERATURE ( C)  
TEMPERATURE ( C)  
FIGURE 12. BIAS CURRENT vs TEMPERATURE  
(3 REPRESENTATIVE UNITS)  
FIGURE 13. OFFSET CURRENT vs TEMPERATURE  
(3 REPRESENTATIVE UNITS)  
4.6  
300  
280  
260  
240  
220  
200  
180  
160  
140  
120  
100  
80  
4.4  
4.2  
4.0  
3.8  
3.6  
3.4  
3.2  
3.0  
2.8  
2.6  
2.4  
2.2  
2.0  
-A  
VOL  
-V  
OUT  
+A  
VOL  
+V  
OUT  
60  
40  
R
= 1kΩ  
L
R
= 1k, V  
= 0V to ±2V  
20  
L
OUT  
0
-60  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
-40  
-20  
0
20  
40  
60  
80  
100 120  
o
TEMPERATURE ( C)  
TEMPERATURE ( C)  
FIGURE 15. OUTPUT VOLTAGE SWING vs TEMPERATURE  
FIGURE 14. OPEN LOOP GAIN vs TEMPERATURE  
6
HFA-0001  
o
Typical Performance Curves V = ±5V, T = +25 C, Unless Otherwise Specified (Continued)  
S
A
60  
58  
56  
54  
52  
50  
48  
46  
44  
42  
40  
38  
36  
34  
1200  
1100  
1000  
900  
A
V
= +1, R = 100Ω  
L
V
= ±3V  
OUT  
-SLEW RATE  
+SLEW RATE  
-CMRR  
+CMRR  
800  
700  
600  
500  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
-60  
-40  
-20  
0
20  
40  
60  
80 100  
120  
o
TEMPERATURE ( C)  
TEMPERATURE ( C)  
FIGURE 16. SLEW RATE vs TEMPERATURE  
FIGURE 17. CMRR vs TEMPERATURE  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
70  
60  
50  
40  
30  
20  
10  
0
V = ±4V TO ±6V  
S
-PSRR  
+PSRR  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
0
1
2
3
4
5
SUPPLY VOLTAGE (±V)  
TEMPERATURE ( C)  
FIGURE 18. PSRR vs TEMPERATURE  
FIGURE 19. SUPPLY CURRENT vs SUPPLY VOLTAGE  
70  
68  
66  
64  
62  
60  
58  
56  
54  
52  
50  
48  
5.0  
A
= +1, R = 100Ω  
L
V
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
THD < 1%  
0.5  
0
46  
44  
-60  
-40  
-20  
0
20  
40  
60  
o
80  
100 120  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
TEMPERATURE ( C)  
FIGURE 20. SUPPLY CURRENT vs TEMPERATURE  
FIGURE 21. MAXIMUM OUTPUT VOLTAGE SWINGvs FREQUENCY  
7
HFA-0001  
o
Typical Performance Curves V = ±5V, T = +25 C, Unless Otherwise Specified (Continued)  
S
A
240  
220  
200  
180  
160  
140  
120  
100  
80  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
= ±2V  
OUT  
A
= +1, f = 50kHz  
O
V
THD < 1%  
-A  
VOL  
VOL  
+A  
60  
40  
10  
100  
1K  
10K  
10  
100  
1K  
10K  
LOAD RESISTANCE ()  
LOAD RESISTANCE ()  
FIGURE 22. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE  
FIGURE 23. OPEN LOOP GAIN vs LOAD RESISTANCE  
600  
500  
600  
500  
8
7
6
8
7
6
400  
300  
200  
400  
300  
200  
5
4
3
2
5
4
3
2
NOISE CURRENT  
NOISE VOLTAGE  
NOISE CURRENT  
100  
100  
NOISE VOLTAGE  
1
0
1
0
0
100  
0
1
10  
100  
1K  
10K  
100K  
1K  
10K  
100K  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 24. INPUT NOISE vs FREQUENCY  
FIGURE 25. INPUT NOISE vs FREQUENCY  
FIGURE 26. INPUT VOLTAGE NOISE 0.1Hz to 10Hz  
= 50, Noise Voltage = 1.605µVrms (RTI)  
FIGURE 27. INPUT NOISE VOLTAGE 10Hz to 1MHz  
= 50, Noise Voltage = 5.36µVrms (RTI)  
A
A
V
V
Noise Voltage = 10.12µV  
Noise Voltage = 29.88µV  
P-P  
P-P  
8
HFA-0001  
This 50resistor can be used as the series resistor instead  
of an external resistor.  
Applications Information  
Offset Adjustment  
V
IN  
When applications require the offset voltage to be as low as  
possible, the figure below shows two possible schemes for  
adjusting offset voltage.  
50COAX CABLE  
V
OUT  
50Ω  
+
50Ω  
For a voltage follower application, use the circuit in Figure 29  
R
F
without R and with R shorted. R should be 1Mto 10M.  
2
I
1
The adjustment resistors will cause only a very small gain error.  
FIGURE 30.  
R
F
PC board traces can be made to look like a 50or 75Ω  
transmission line, called microstrip. Microstrip is a PC board  
trace with a ground plane directly beneath, on the opposite  
side of the board, as shown in Figure 31.  
+5V  
R
I
V
IN  
-
+
V
OUT  
50kK  
R
1
R
100  
2
100kΩ  
SIGNAL  
TRACE  
-5V  
w
t
R
2
Adjustment Range ≅ ±V -------  
R
1
h
E
R
FIGURE 28. INVERTING GAIN  
DIELECTRIC  
(PC BOARD)  
GROUND  
PLANE  
FIGURE 31.  
V
+
-
IN  
R
+V  
V
OUT  
When manufacturing pc boards, the trace width can be  
calculated based on a number of variables. The following  
equation is reasonably accurate for calculating the proper  
trace width for a 50transmission line.  
R
1
100kΩ  
I
50kΩ  
R
F
R
2
100Ω  
-V  
87  
5.98h  
0.8w + t  
Z
= ------------------------------ ln ------------------- Ω  
O
E
+ 1.41  
R
R
R
2
F
Adjustment Range ≅ ±V -------  
Gain 1 + -------------------  
R
1
R + R  
I
2
Power supply decoupling is essential for high frequency op  
amps. A 0.01µF high quality ceramic capacitor at each  
supply pin in parallel with a 1µF tantalum capacitor will  
provide excellent decoupling as shown in Figure 32.  
FIGURE 29. NON-INVERTING GAIN  
PC Board Layout Guidelines  
When designing with the HFA-0001, good high frequency  
(RF) techniques should be used when making a PC board. A  
massive ground plane should be used to maintain a low  
impedance ground. Proper shielding and use of short  
interconnection leads are also very important.  
V+  
1.0µF  
0.01µF  
To achieve maximum high frequency performance, the use  
of low impedance transmission lines with impedance  
matching is recommended: 50lines are common in  
communications and 75lines in video systems. Impedance  
matching is important to minimize reflected energy therefore  
minimizing transmitted signal distortion. This is  
+
0.01µF  
1.0µF  
accomplished by using a series matching resistor (50or  
75), matched transmission line (50or 75), and a  
matched terminating resistor, as shown in Figure 30. Note  
that there will be a 6dB loss from input to output.The HFA-  
0001 has an integral 50Ω ±20% resistor connected to the op  
amps output with the other end of the resistor pinned out.  
V-  
FIGURE 32. POWER SUPPLY DECOUPLING  
9
HFA-0001  
Thermal Management  
V+  
C
The HFA-0001 can sink and source a large amount of  
current making it very useful in many applications. Care  
must be taken not to exceed the power handling capability of  
the part to insure proper performance and maintain high  
reliability. The following graph shows the maximum power  
handling capability of the HFA-0001 without exceeding the  
R
+
C
C
o
maximum allowable junction temperature of +175 C. The  
curves also show the improved power handling capability  
when heatsinks are used based on AVVID heatsink #5801B  
for the 8 lead Plastic DIP and IERC heatsink #PEP50AB for  
the 14 lead Sidebraze DIP. These curves are based on  
natural convection. Forced air will greatly improve the power  
dissipation capabilities of a heatsink.  
R
C
V-  
3.0  
FIGURE 33. IMPROVED DECOUPLING/CURRENT LIMITING  
2.8  
B
Chip capacitors produce the best results due to ease of  
placement next to the op amp and they have negligible lead  
inductance. If leaded capacitors are used, the leads should  
be kept as short as possible to minimize lead inductance.  
Figures 32 and 33 illustrate two different decoupling  
schemes. Figure 33 improves the PSRR because the  
resistor and capacitors create low pass filters. Note that the  
supply current will create a voltage drop across the resistor.  
2.6  
2.4  
A
2.2  
2.0  
1.8  
D
1.6  
1.4  
C
1.2  
1.0  
0.8  
A: 8 LEAD PLASTIC DIP WITH HEATSINK  
B: 14 LEAD SIDEBRAZE DIP WITH HEATSINK  
C: 8 LEAD PLASTIC DIP ONLY  
D: 14 LEAD SIDEBRAZE DIP ONLY  
0.6  
Saturation Recovery  
0.4  
When an op amp is over driven output devices can saturate  
and sometimes take a long time to recover. By clamping the  
input to safe levels, output saturation can be avoided. If  
output saturation cannot be avoided, the recovery time from  
25% over-drive is 20ns and 30ns from 50% over-drive.  
0.2  
0
20  
40  
60  
80  
100  
o
120  
AMBIENT TEMPERATURE ( C)  
FIGURE 34.  
10  

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