HPLR3103 [INTERSIL]
52A, 30V, 0.019 Ohm, N-Channel Logic Level, Power MOSFETs; 52A ， 30V ， 0.019 Ohm的N沟道逻辑电平，功率MOSFET
| 型号： | HPLR3103 |
| 厂家： | 
Intersil |
| 描述： | 52A, 30V, 0.019 Ohm, N-Channel Logic Level, Power MOSFETs |
| 文件： | 总6页 (文件大小：75K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HPLR3103, HPLU3103
Data Sheet
July 1999
File Number 4501.2
52A, 30V, 0.019 Ohm, N-Channel Logic
Level, Power MOSFETs
Features
• Logic Level Gate Drive
• 52A†, 30V
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
converters, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
• Low On-Resistance, r
= 0.019Ω
DS(ON)
• UIS Rating Curve
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount
Components to PC Boards”
† Calculated continuous current based on maximum allowable junction
temperature. Package limited to 20A continuous, see Figure 9.
Symbol
Ordering Information
D
PART NUMBER
PACKAGE
TO-251AA
TO-252AA
BRAND
HP3103
HP3103
HPLU3103
G
HPLR3103
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the TO-252AA variant in tape and reel, e.g., HPLR3103T.
S
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN
DRAIN
DRAIN
(FLANGE)
(FLANGE)
GATE
GATE
SOURCE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-3
HPLR3103, HPLU3103
o
Absolute Maximum Ratings
T = 25 C, Unless Othewise Specified
C
HPLR3103, HPLU3103
UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
30
30
V
V
DSS
Drain to Gate Voltage (R
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
±16V
52
V
A
GS
D
Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
390
A
DM
Single Pulse Avalanche Energy (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
240
89
0.71
-55 to 150
mj
W
AS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
o
o
Derate Above 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
W/ C
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T
C
J
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
o
300
260
C
C
L
o
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T = 25 C to 125 C.
J
o
Electrical Specifications
T
= 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
= 250µA, V = 0V
MIN
TYP
MAX UNITS
Drain to Source Breakdown Voltage
Gate to Source Threshold Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
30
1
-
-
-
-
V
V
D
GS
= V , I = 250µA
V
V
V
V
V
-
GS(TH)
GS
DS
DS
GS
DS D
I
= 30V, V
= 24V, V
= ±16V
= 0V
-
25
250
100
-
µA
µA
nA
V
DSS
GS
GS
o
= 0V, T = 125 C
-
-
-
C
Gate to Source Leakage Current
I
-
GSS
o
Breakdown Voltage Temperature
Coefficient
∆V
Reference to 25 C, I = 1mA
-
0.037
(BR)DSS
/∆T
D
J
Drain to Source On Resistance
(Note 3)
r
I
I
= 28A, V
= 23A, V
= 10V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.019
Ω
Ω
DS(ON)
D
GS
GS
= 4.5V
0.024
D
Turn-On Delay Time
Rise Time
t
V
R
= 15V, I
34A, R = 0.441Ω, V = 4.5V,
GS
9
-
-
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
nH
d(ON)
DD
D
L
=3.4Ω, I
= 3mA
GS
g(REF)
t
210
20
54
-
r
Turn-Off Delay Time (Note 3)
Fall Time
t
-
d(OFF)
t
-
f
Total Gate Charge
Q
V
= 24V
34A,
50
14
28
-
g
DD
I
D
Gate to Source Charge
Gate to Drain “Miller” Charge
Input Capacitance
Q
Q
-
gs
V
= 4.5V
GS
(Figure 6)
= 25V, V = 0V,
GS
-
gd
C
V
1600
640
320
7.5
ISS
DS
f = 1MHz (Figure 5)
Output Capacitance
Reverse Transfer Capacitance
Internal Source Inductance
C
C
-
OSS
RSS
-
L
Measured From the
ModifiedMOSFET
-
S
SourceLead, 6mm(0.25in) Symbol Showing
From Package to Center of the Internal Devic-
Die
es Inductances
D
Internal Drain Inductance
L
Measured From the Drain-
Lead, 6mm (0.25in) From
Package to Center of Die
-
4.5
-
nH
D
L
D
G
L
S
S
6-4
HPLR3103, HPLU3103
o
Electrical Specifications
T
= 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX UNITS
o
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
R
R
-
-
-
-
-
-
1.4
110
50
C/W
C/W
C/W
θJC
o
o
θJA
(PCB Mount Steady State)
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Continuous Source to Drain Current
I
MOSFET
Symbol Showing
The Integral
Reverse P-N
Junction Diode
-
-
52 (Note
1)
A
SD
D
S
Pulsed Source to Drain Current (Note 2)
I
-
-
220
A
SDM
G
Source to Drain Diode Voltage (Note 3)
Reverse Recovery Time (Note 3)
Reverse Recovered Charge (Note 3)
NOTES:
V
I
I
I
= 28A
-
-
-
-
1.3
120
310
V
SD
SD
SD
SD
t
= 34A, dI /dt = 100A/µs
SD
81
ns
nC
rr
Q
= 34A, dI /dt = 100A/µs
SD
210
RR
2. Repetitive rating; pulse width limited by maximum junction temperature (See Figure 11).
3. Pulse width ≤ 300µs; duty cycle ≤ 2%.
o
4. V
= 15V, starting T = 25 C, L = 300µH, R = 25Ω, peak I = 34A, (Figure 10).
DD
J
G
AS
Typical Performance Curves
1000
1000
V
IN DECENDING ORDER
GS
V
IN DECENDING ORDER
GS
15V
12V
10V
8.0V
15V
12V
10V
8.0V
6.0V
4.0V
3.0V
2.5V
100 6.0V
4.0V
100
10
1
3.0V
2.5V
10
20µs PULSE WIDTH
o
T
= 25 C
C
20µs PULSE WIDTH
o
T
= 150 C
C
1
0.1
0.1
1.0
10
100
1
10
100
V
, DRAIN TO SOURCE VOLTAGE (V)
V , DRAIN TO SOURCE VOLTAGE (V)
DS
DS
FIGURE 1. OUTPUT CHARACTERISTICS
FIGURE 2. OUTPUT CHARACTERISTICS
6-5
HPLR3103, HPLU3103
Typical Performance Curves (Continued)
2.5
1000
100
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V
= 15V
DS
20µs PULSE WIDTH
I
= 46A, V = 10V
D
GS
2.0
1.5
1.0
0.5
0
o
T
= 25 C
J
o
T
= 150 C
J
1
5
2
3
4
6
7
8
9
-80
-40
0
40
80
120
160
200
o
V
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE ( C)
GS
J
FIGURE 3. TRANSFER CHARACTERISTICS
FIGURE 4. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
20
16
12
8
3200
2800
2400
2000
1600
1200
800
I
= 34A
V
= 0V, f = 1MHz
D
GS
ISS
C
C
C
= C
+ C
GS
GD
V
= 24V
DS
= C
≈ C + C
RSS
OSS
GD
DS
V
= 15V
DS
GS
C
ISS
C
C
OSS
4
400
RSS
0
0
0
10
Q
20
30
40
1
10
, DRAIN TO SOURCE VOLTAGE (V)
100
V
, TOTAL GATE CHARGE (nC)
G
DS
FIGURE 5. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 6. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
1000
1000
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
I
= 46A, V = 10V
D
GS
10µs
100
100µs
100
o
= 175 C
T
J
OPERATION IN THIS
1ms
AREA MAY BE
10
o
T
= 25 C
J
LIMITED BY r
DS(ON)
10ms
V
MAX = 30V
DSS
10
10
1
0.4
1.2
2.0
2.4
2.8
1.6
0.8
1
100
V
, SOURCE TO DRAIN VOLTAGE (V)
SD
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
FIGURE 7. SOURCE TO DRAIN DIODE FORWARD VOLTAGE
FIGURE 8. FORWARD BIAS SAFE OPERATING AREA
6-6
HPLR3103, HPLU3103
Typical Performance Curves (Continued)
1000
60
45
30
If R = 0
= (L)(I )/(1.3*RATED I
t
AV
V
AS
DSS
- V
)
AS
DD
If R ≠ 0
t
= (L/R)ln[(I *R)/(1.3*RATED BV
AS
- V ) +1]
DD
AV
DSS
E
POINT
AS
100
10
1
o
STARTING T = 25 C
J
o
STARTING T = 150 C
J
15
0
25
50
75
100
125
150
0.001
0.01
0.1
, TIME IN AVALANCHE (ms)
AV
1
10
100
o
T , CASE TEMPERATURE ( C)
t
C
FIGURE 9. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
1
0.1
0.05
0.02
0.01
P
DM
0.1
t
1
t
2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t /t
1
2
PEAK T = P
DM
x Z
x R
+ T
JC C
J
JC
θ
θ
0.01
10
-5
-4
-3
10
-2
10
-1
10
0
1
10
10
10
t, RECTANGULAR PULSE DURATION (s)
FIGURE 11. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
V
DS
BV
DSS
L
t
P
V
DS
I
VARY t TO OBTAIN
P
AS
+
-
V
DD
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
AS
0V
0
0.01Ω
t
AV
FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 13. UNCLAMPED ENERGY WAVEFORMS
6-7
HPLR3103, HPLU3103
Test Circuits and Waveforms (Continued)
V
DD
V
DS
R
L
Q
g(TOT)
V
GS
Q
gd
Q
gs
V
GS
+
-
V
DD
V
DS
DUT
0
0
I
G(REF)
I
G(REF)
FIGURE 14. GATE CHARGE TEST CIRCUIT
FIGURE 15. GATE CHARGE WAVEFORMS
V
t
t
DS
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
90%
90%
+
V
GS
V
DD
10%
10%
0
0
-
DUT
90%
50%
R
GS
V
GS
50%
PULSE WIDTH
10%
V
GS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
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6-8
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