ICL7665 [INTERSIL]
CMOS Micropower Over/Under Voltage Detector; CMOS微功耗过压/欠压检测器
| 型号： | ICL7665 |
| 厂家： | 
Intersil |
| 描述： | CMOS Micropower Over/Under Voltage Detector |
| 文件： | 总11页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL7665S
Data Sheet
April 1999
File Number 3182.4
CMOS Micropower Over/Under Voltage
Detector
Features
• Guaranteed 10µA Maximum Quiescent Current Over
Temperature
The ICL7665S Super CMOS Micropower Over/Under
Voltage Detector contains two low power, individually
programmable Voltage detectors on a single CMOS chip.
Requiring typically 3µA for operation, the device is intended
for battery-operated systems and instruments which require
high or low voltage warnings, settable trip points, or fault
monitoring and correction. The trip points and hysteresis of
the two voltage detectors are individually programmed via
external resistors. An internal bandgap-type reference
provides an accurate threshold voltage while operating from
any supply in the 1.6V to 16V range.
• Guaranteed Wider Operating Voltage Range Over Entire
Operating Temperature Range
• 2% Threshold Accuracy (ICL7665SA)
• Dual Comparator with Precision Internal Reference
o
• 100ppm/ C Temperature Coefficient of Threshold Voltage
• 100% Tested at 2V
• Output Current Sinking Ability . . . . . . . . . . . . Up to 20mA
• Individually Programmable Upper and Lower Trip Voltages
and Hysteresis Levels
The ICL7665S, Super Programmable Over/Under Voltage
Detector is a direct replacement for the industry standard
ICL7665B offering wider operating voltage and temperature
ranges, improved threshold accuracy (ICL7665SA), and
temperature coefficient, and guaranteed maximum supply
current. All improvements are highlighted in the electrical
characteristics section. All critical parameters are
guaranteed over the entire commercial and industrial
temperature ranges.
Applications
• Pocket Pagers
• Portable Instrumentation
• Charging Systems
• Memory Power Back-Up
• Battery Operated Systems
• Portable Computers
• Level Detectors
Ordering Information
TEMP. RANGE
o
PART NUMBER
ICL7665SCBA
ICL7665SCPA
ICL7665SACBA
ICL7665SACPA
ICL7665SIBA
( C)
PACKAGE
8 Ld SOIC (N)
8 Ld PDIP
PKG. NO.
M8.15
E8.3
Pinout
0 to 70
ICL7665S
(SOIC, PDIP)
TOP VIEW
0 to 70
0 to 70
8 Ld SOIC (N)
8 Ld PDIP
M8.15
E8.3
0 to 70
1
2
3
4
8
7
6
5
OUT 1
HYST 1
SET 1
GND
V+
-40 to 85
-40 to 85
-40 to 85
-40 to 85
8 Ld SOIC (N)
8 Ld PDIP
M8.15
E8.3
OUT 2
SET 2
HYST 2
ICL7665SIPA
ICL7665SAIBA
ICL7665SAIPA
8 Ld SOIC (N)
8 Ld PDIP
M8.15
E8.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
3-62
ICL7665S
Absolute Maximum Ratings
Thermal Information
o
o
Supply Voltage (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +18V
Output Voltages OUT1 and OUT2 . . . . . . . . . . . . . . . . .-0.3V to 18V
(with respect to GND) (Note 2)
Output Voltages HYST1 and HYST2 . . . . . . . . . . . . . .-0.3V to +18V
(with respect to V+) (Note 2)
Thermal Resistance (Typical, Note 1)
θ
( C/W)
θ
( C/W)
JA
JC
PDIP Package . . . . . . . . . . . . . . . . . . .
Plastic SOIC Package . . . . . . . . . . . . .
150
180
N/A
N/A
o
Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . .150 C
Maximum Junction Temperature (CERDIP). . . . . . . . . . . . . . .175 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 C
o
o
o
Input Voltages SET1 and SET2 . . . . . (GND -0.3V) to (V+ V- +0.3V)
(Note 2)
o
Maximum Sink Output OUT1 and OUT2 . . . . . . . . . . . . . . . . . 25mA
Maximum Source Output Current
(SOIC - Lead Tips Only)
HYST1 and HYST2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25mA
Operating Conditions
Temperature Range
ICL7665SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 70 C
ICL7665SI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
o
o
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
2. Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to voltages greater than (V+
+0.3V) or less than (GND - 0.3V) may cause destructive device latchup. For these reasons, it is recommended that no inputs from external
sources not operating from the same power supply be applied to the device before its supply is established, and that in multiple supply systems,
the supply to the ICL7665S be turned on first. If this is not possible, current into inputs and/or outputs must be limited to ±0.5mA and voltages
must not exceed those defined above.
o
Electrical Specifications The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, T = 25 C,
A
Test Circuit Figure 7. Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
1.6
1.8
1.8
1.8
1.8
TYP
MAX
16
UNITS
o
Operating Supply Voltage
V+
ICL7665S
T = 25 C
A
-
-
-
-
-
V
V
V
V
V
o
o
0 C ≤ T ≤ 70 C
16
A
o
o
-25 C ≤ T ≤ 85 C
16
A
o
o
ICL7665SA
0 C ≤ T ≤ 70 C
16
A
o
o
-25 C ≤ T ≤ 85 C
16
A
Supply Current
I+
GND ≤ V
, V
≤ V+, All Outputs Open Circuit
V+ = 2V
SET1 SET2
o
o
0 C ≤ T ≤ 70 C
-
2.5
2.6
10
10
µA
µA
µA
µA
µA
µA
V
A
V+ = 9V
-
V+ = 15V
-
2.9
10
o
o
-40 C ≤ T ≤ 85 C
V+ = 2V
-
2.5
10
A
V+ = 9V
-
2.6
10
V+ = 15V
-
1.20
1.20
1.275
1.275
-
2.9
10
Input Trip Voltage
V
V
V
V
ICL7665S
1.30
1.30
1.30
1.30
200
100
0.03
1.40
1.40
1.325
1.325
-
SET1
SET2
SET1
SET2
V
ICL7665SA
V
V
Temperature Coefficient of
∆V
ICL7665S
ppm
ppm
%/V
SET
V
SET
∆T
ICL7665SA
-
-
Supply Voltage Sensitivity of
, V
∆V
R
, R
, R
, R
= 1MΩ,
-
-
SET
OUT1 OUT2 HYST1 2HYST2
V
2V ≤ V+ ≤ 10V
SET1 SET2
∆V
S
3-63
ICL7665S
o
Electrical Specifications The specifications below are applicable to both the ICL7665S and ICL7665SA. V+ = 5V, T = 25 C,
A
Test Circuit Figure 7. Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
10
MAX
200
-100
2000
-500
0.5
UNITS
nA
nA
nA
nA
V
Output Leakage Currents of
OUT and HYST
I
V
= 0V or V
≥ 2V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
OLK
SET
SET
o
I
-10
HLK
OLK
I
V+ = 15V, T = 70 C
-
A
I
-
HLK
Output Saturation Voltages
Output Saturation Voltages
Output Saturation Voltages
Output Saturation Voltages
V
V
I
= 2V,
= 2mA
V+ = 2V
V+ = 5V
V+ = 15V
V+ = 2V
V+ = 5V
V+ = 15V
V+ = 2V
V+ = 5V
V+ = 15V
V+ = 2V, I
V+ = 5V, I
0.2
OUT1
SET1
OUT1
0.1
0.3
V
0.06
-0.15
-0.05
-0.02
0.2
0.2
V
V
V
= 2V,
= -0.5mA
-0.30
-0.15
-0.10
0.5
V
HYST1
SET1
I
HYST1
V
V
V
V
= 0V,
= 2mA
V
OUT2
SET2
OUT2
I
0.15
0.11
-0.25
-0.43
-0.35
0.01
1.0
0.3
V
0.25
-0.8
-1.0
-0.8
10
V
V
V
= 2V
= -0.2mA
= -0.5mA
V
HYST2
SET2
HYST2
HYST2
V
V+ = 15V, I
= -0.5mA
V
HYST2
V
Input Leakage Current
I
GND ≤ V
≤ V+
= 4.7kΩ,
nA
mV
mV
SET
SET
SET
∆ Input for Complete Output
∆V
R
R
ICL7665S
-
SET
OUT
Change
= 20kΩ,
HYST
ICL7665SA
0.1
-
V
LO = 1% V+,
OUT
V
HI = 99% V+
OUT
Difference in Trip Voltages
V
-
R , R
OUT HYST
= 1mW
-
±5
±50
mV
SET1
V
SET2
Output/Hysteresis
Difference
R
, R
= 1mW ICL7665S
ICL7665SA
-
-
±1
-
-
mV
mV
OUT HYST
±0.1
NOTES:
o
o
3. Derate above 25 C ambient temperature at 4mW/ C
4. All significant improvements over the industry standard ICL7665 are highlighted.
AC Electrical Specifications
PARAMETER
OUTPUT DELAY TIMES
Input Going HI
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
t
t
t
t
t
t
t
t
V
R
R
Switched between 1.0V to 1.6V
SET
-
-
-
-
-
-
-
-
85
90
55
55
75
80
60
60
-
-
-
-
-
-
-
-
µs
µs
µs
µs
µs
µs
µs
µs
SO1D
SH1D
SO2D
SH2D
SO1D
SH1D
SO2D
SH2D
= 4.7kΩ, C = 12pF
OUT
L
= 20kΩ, C = 12pF
HYST
L
Input Going LO
V
R
R
Switched between 1.6V to 1.0V
SET
= 4.7kΩ, C = 12pF
OUT
L
= 20kΩ, C = 12pF
HYST
L
3-64
ICL7665S
AC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
0.6
0.8
7.5
0.7
0.6
0.7
4.0
1.8
MAX
UNITS
µs
Output Rise Times
t
t
t
t
t
t
t
t
V
R
R
Switched between 1.0V to 1.6V
SET
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
O1R
O2R
H1R
H2R
O1F
O2F
H1F
H2F
= 4.7kΩ, C = 12pF
OUT
L
µs
= 20kΩ, C = 12pF
HYST
L
µs
µs
Output Fall Times
V
R
R
Switched between 1.0V to 1.6V
µs
SET
= 4.7kΩ, C = 12pF
OUT
L
µs
= 20kΩ, C = 12pF
HYST
L
µs
µs
Functional Block Diagram
V+
HYST2
SET1
-
+
HYST1
REF
+
-
OUT2
SET2
OUT1
GND
CONDITIONS (Note 5)
V
V
V
V
> 1.3V, OUT1 Switch ON, HYST1 Switch ON
< 1.3V, OUT1 Switch OFF, HYST1 Switch OFF
> 1.3V, OUT2 Switch OFF, HYST2 Switch ON
< 1.3V, OUT2 Switch ON, HYST2 Switch OFF
SET1
SET1
SET2
SET2
NOTE:
5. See Electrical Specifications for exact thresholds.
3-65
ICL7665S
Typical Performance Curves
2.0
2.0
1.5
1.0
0.5
0
V+ = 2V
V+ = 2V
1.5
V+ = 5V
1.0
V+ = 9V
V+ = 5V
V+ = 9V
0.5
0
V+ = 15V
V+ = 15V
0
5
10
OUT2 (mA)
15
20
0
5
10
15
20
I
OUT1 (mA)
I
OUT
OUT
FIGURE 1. OUT1 SATURATION VOLTAGE AS A FUNCTION
OF OUTPUT CURRENT
FIGURE 2. OUT2 SATURATION VOLTAGE AS A FUNCTION
OF OUTPUT CURRENT
-20
-16
-12
-8
-4
0
-5.0
-4.0
-3.0
-2.0
-1.0
0
0
0
o
o
T
= 25 C
T
= 25 C
A
A
-1.0
-2.0
-0.4
-0.8
V+ = 15V
V+ = 15V
V+ = 9V
-3.0
-4.0
-5.0
-1.2
-1.6
-2.0
V+ = 9V
V+ = 2V
HYST2 OUTPUT CURRENT (mA)
V+ = 5V
V+ = 2V
V+ = 5V
HYST1 OUTPUT CURRENT (mA)
FIGURE 3. HYST1 OUTPUT SATURATION VOLTAGE vs
HYST1 OUTPUT CURRENT
FIGURE 4. HYST2 OUTPUT SATURATION VOLTAGE vs
HYST2 OUTPUT CURRENT
5.0
5.0
0V ≤ V
, V
≤ V+
0V ≤ V ≤ V+
, V
SET1 SET2
SET1 SET2
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
o
T
= -20 C
A
V+ = 15V
V+ = 9V
o
T
= 25 C
A
V+ = 2V
o
T
= 70 C
A
-25
0
+20
+40
+60
0
2
4
6
8
10
12
14
16
o
AMBIENT TEMPERATURE ( C)
SUPPLY VOLTAGE (V+)
FIGURE 5. SUPPLY CURRENT AS A FUNCTION OF AMBIENT
TEMPERATURE
FIGURE 6. SUPPLY CURRENT AS A FUNCTION OF SUPPLY
VOLTAGE
3-66
ICL7665S
in battery applications. In line operated systems, the rate-of-
rise of the supply is limited by other considerations, and is
normally not a problem.
Detailed Description
As shown in the Functional Diagram, the ICL7665S consists
of two comparators which compare input voltages on the
SET1 and SET2 terminals to an internal 1.3V bandgap
reference. The outputs from the two comparators drive open-
drain N-channel transistors for OUT1 and OUT2, and open-
drain P-channel transistors for HYST1 and HYST2 outputs.
Each section, the Under Voltage Detector and the Over
Voltage Detector, is independent of the other, although both
use the internal 1.3V reference. The offset voltages of the
If the SET voltages must be applied before the supply
voltage V+, the input current should be limited to less than
0.5mA by appropriate external resistors, usually required for
voltage setting anyway. A similar precaution should be taken
with the outputs if it is likely that they will be driven by other
circuits to levels outside the supplies at any time.
two comparators will normally be unequal so V
will
SET1
V
V
,
1.6V
1.0V
SET1
SET2
generally not quite equal V
SET2
.
INPUT
OUT1
t
t
The input impedance of the SET1 and SET2 pins are
extremely high, and for most practical applications can be
ignored. The four outputs are open-drain MOS transistors,
and when ON behave as low resistance switches to their
respective supply rails. This minimizes errors in setting up
the hysteresis, and maximizes the output flexibility. The
operating currents of the bandgap reference and the
comparators are around 100nA each.
O1R
SO1D
t
V+
(5V)
O1F
t
SO1D
GND
t
t
SH1D
H1F
V+
(5V)
t
H1R
HYST1
OUT2
GND
t
SH1D
t
t
t
SO2D
O2F
SO2D
t
V+
(5V)
GND
t
O2R
V+
t
SH2
D
t
SH2D
t
4.7kΩ
OUT1
V+
(5V)
H2F
H2R
HYST2
GND
HYST1
OUT2
4.7
kΩ
1 OUT1
V+
8
7
6
5
FIGURE 8. SWITCHING WAVEFORMS
2 HYST1OUT2
3 SET1 SET2
4 GND HYST2
INPUT
Simple Threshold Detector
HYST2
Figure 9 shows the simplest connection of the ICL7665S for
threshold detection. From the graph 9B, it can be seen that
at low input voltage OUT1 is OFF, or high, while OUT2 is
ON, or low. As the input rises (e.g., at power-on) toward
20
kΩ
20
kΩ
12
pF
12
pF
12
pF
12
pF
V
(usually the eventual operating voltage), OUT2 goes
NOM
high on reaching V
1.6V
1.0V
. If the voltage rises above V
as
TR2 NOM
much as V
, OUT1 goes low. The equation giving V
are from Figure 9A:
TR1
SET1
FIGURE 7. TEST CIRCUITS
and V
SET2
=
R
R
V
; V =
SET2
11
(R + R
12
(R + R )
22
SET1
Precautions
V
V
)
IN
IN
11
21
12
Junction isolated CMOS devices like the ICL7665S have an
inherent SCR or 4-layer PNPN structure distributed
Since the voltage to trip each comparator is nominally 1.3V,
the value V for each trip point can be found from
IN
throughout the die. Under certain circumstances, this can be
triggered into a potentially destructive high current mode.
This latchup can be triggered by forward-biasing an input or
output with respect to the power supply, or by applying
excessive supply voltages. In very low current analog
circuits, such as the ICL7665S, this SCR can also be
triggered by applying the input power supply extremely
rapidly (“instantaneously”), e.g., through a low impedance
battery and an ON/OFF switch with short lead lengths. The
rate-of-rise of the supply voltage can exceed 100V/µs in
such a circuit. A low impedance capacitor (e.g., 0.05µF disc
ceramic) between the V+ and GND pins of the ICL7665S
can be used to reduce the rate-of-rise of the supply voltage
(R + R
11
)
(R + R
11
)
V
V
=
21
22
21
22
TR1
SET1
= 1.3
for detector 1
R
R
11
11
and
V
(R + R
12
)
(R + R
12
)
=
TR2
= 1.3
for detector 2
V
R
R
SET2
12
12
3-67
ICL7665S
V
IN
OUT
ON
R
R
P1
P2
V+
OUT1
SET1
OUT2
SET2
R
R
R
R
21
11
22
V
V
V V
L1 U1
L2
U2
12
OFF
V
IN
V
NOM
DETECTOR 2
DETECTOR 1
FIGURE 9A. CIRCUIT CONFIGURATION
FIGURE 10B. TRANSFER CHARACTERISTICS
FIGURE 10. THRESHOLD DETECTOR WITH HYSTERESIS
V
OUT
OFF
Either detector may be used alone, as well as both together,
in any of the circuits shown here.
When V is very close to one of the trip voltage, normal
IN
variations and noise may cause it to wander back and forth
across this level, leading to erratic output ON and OFF
conditions. The addition of hysteresis, making the trip points
slightly different for rising and falling inputs, will avoid this
condition.
ON
V
V
V
NOM
TR2
TR1
DETECTOR 2
DETECTOR 1
Threshold Detector with Hysteresis
Figure 10A shows how to set up such hysteresis, while
Figure 10B shows how the hysteresis around each trip point
produces switching action at different points depending on
FIGURE 9B. TRANSFER CHARACTERISTICS
FIGURE 9. SIMPLE THRESHOLD DETECTOR
V
IN
whether V is rising or falling (the arrows indicated direction
IN
of change. The HYST outputs are basically switches which
short out R or R when V is above the respective trip
31 32 IN
R
R
32
point. Thus if the input voltage rises from a low value, the trip
31
V+
point will be controlled by R , R , and R , until the trip
1N 2N 3N
HYST1
HYST2
point is reached. As this value is passed, the detector
changes state, R is shorted out, and the trip point
R
R
21
22
3N
SET1
OUT1
SET2
OUT2
becomes controlled by only R and R , a lower value.
1N 2N
The input will then have to fall to this new point to restore the
initial comparator state, but as soon as this occurs, the trip
point will be raised again.
OVERVOLTAGE
R
OVERVOLTAGE
12
R
11
An alternative circuit for obtaining hysteresis is shown in
Figure 11. In this configuration, the HYST pins put the extra
resistor in parallel with the upper setting resistor. The values
of the resistors differ, but the action is essentially the same.
The governing equations are given in Table 1. These ignore
the effects of the resistance of the HYST outputs, but these
can normally be neglected if the resistor values are above
about 100kΩ.
FIGURE 10A. CIRCUIT CONFIGURATION
(R + R
12
)
(R + R
12
)
22
V
V
=
22
TR2
SET2
= 1.3
for detector 2
R
R
12
12
3-68
ICL7665S
Applications
V
IN
Single Supply Fault Monitor
Figure 12 shows an over/under voltage fault monitor for a
single supply. The over voltage trip point is centered around
5.5V and the under voltage trip point is centered around
4.5V. Both have some hysteresis to prevent erratic output
ON and OFF conditions. The two outputs are connected in a
wired OR configuration with a pullup resistor to generate a
power OK signal.
R
R
P
P
V+
R
R
R
R
OUT1
OUT2
21
11
22
12
R
R
32
31
HYST1
SET1
HYST2
SET2
+5V SUPPLY
FIGURE 11. AN ALTERNATIVE HYSTERESIS CIRCUIT
R
21
324KΩ
V+
249KΩ
R
22
HYST1 HYST2
TABLE 1. SET-POINT EQUATIONS
NO HYSTERESIS
7.5MΩ
5%
13MΩ
5%
R
R
32
31
V
V
SET2
SET1
R
+ R
11
21
Over-Voltage V
=
x V
x V
TRIP
SET1
SET2
100KΩ
100KΩ
R
11
OUT1
OUT2
OPEN VOLTAGE
DETECTOR
R
+ R
12
22
V
V
= 4.55V
= 4.45V
Over-Voltage V
=
U
L
TRIP
OPEN VOLTAGE
DETECTOR
V+
R
12
HYSTERESIS PER FIGURE 10A
+ R + R31
V
V
= 5.55V
= 5.45V
1MΩ
U
L
POWER
OK
R
11
21
V
=
x V
U1
SET1
R
11
TRIP
+ R
FIGURE 12. FAULT MONITOR FOR A SINGLE SUPPLY
Over-Voltage V
R
11
21
Multiple Supply Fault Monitor
The ICL7665S can simultaneously monitor several supplies
when connected as shown in Figure 13. The resistors are
V
=
x V
SET1
L1
R
11
R
+ R + R
22
12
32
V
=
x V
SET2
U2
chosen such that the sum of the currents through R
,
21A
R
12
R
, and R is equal to the current through R when the
21B 31 11
Under-Voltage V
TRIP
two input voltage are at the desired low voltage detection
R
+ R
12
22
point. The current through R at this point is equal to
11
1.3V/R . The voltage at the V
V
=
x V
SET2
L2
input depends on the
11
SET
R
12
voltage of both supplies being monitored. The trip voltage of
one supply while the other supply is at the nominal voltage
will be different that the trip voltage when both supplies are
below their nominal voltages.
HYSTERESIS PER FIGURE 11
R
+ R
21
11
V
=
x V
SET1
U1
R
11
The other side of the ICL7665S can be used to detect the
absence of negative supplies. The trip points for OUT1
depend on both the negative supply voltages and the actual
voltage of the +5V supply.
Over-Voltage V
TRIP
R
R
21 31
R
R
+
11
R
R
+
V
=
21
x V
SET1
L1
31
11
R
+ R
22
12
V
=
x V
SET2
U2
R
12
Over-Voltage V
TRIP
R
R
22 32
R
R
+
12
12
V
=
x V
SET2
L2
R
+ R
32
22
3-69
ICL7665S
V
is greater than 1.3V, OUT1 is low, but when V
SET1
SET1
drops below 1.3V, OUT1 goes high shutting off the
ICL7663S. OUT2 is used for low battery warning. When
is greater than 1.3V, OUT2 is high and the low battery
+5V
274kΩ
R
V+
21A
HYST1 HYST2
V
+5V
SET2
warning is on. When V
100kΩ
22
MΩ
R
drops below 1.3V, OUT2 is low
21
SET2
and the low battery warning goes off. The trip voltage for low
battery warning can be set higher than the trip voltage for
shutdown to give advance low battery warning before the
battery is disconnected.
V
V
SET2
SET1
49.9kΩ
301
kΩ
787
kΩ
+5V
R
11
OUT1
OUT2
+15V
1.02MΩ
1
MΩ
R
-5V
-15V
21B
Power Fail Warning and Powerup/Powerdown
Reset
POWER
OK
Figure 15 shows a power fail warning circuit with
powerup/powerdown reset. When the unregulated DC input
is above the trip point, OUT1 is low. When the DC input
drops below the trip point, OUT1 shuts OFF and the power
fail warning goes high. The voltage on the input of the 7805
FIGURE 13. MULTIPLE SUPPLY FAULT MONITOR
Combination Low Battery Warning and Low
Battery Disconnect
will continue to provide 5V out at 1A until V is less than
IN
When using rechargeable batteries in a system, it is
7.3V, this circuit will provide a certain amount of warning
before the 5V output begins to drop.
important to keep the batteries from being overdischarged.
The circuit shown in Figure 14 provides a low battery
warning and also disconnects the low battery from the rest of
the system to prevent damage to the battery. OUT1 is used
to shutdown the ICL7663S when the battery voltage drops to
the value where the load should be disconnected. As long as
The ICL7665S OUT2 is used to prevent a microprocessor
from writing spurious data to a CMOS battery backup
memory by causing OUT2 to go low when the 7805 5V
output drops below the ICL7665S trip point.
+5V
100Ω
1A
R
R
32
31
V+
1MΩ
HYST1
HYST2
SET2
V+
OUT1
OUT2
SENSE
+
-
R
R
21
22
ICL7665S
GND
ICL7663S
SET1
OUT1
V+
SHUTDOWN
V
SET
GND
R
R
12
11
OUT2
1MΩ
LOW BATTERY SHUTDOWN
LOW BATTERY WARNING
FIGURE 14. LOW BATTERY WARNING AND LOW BATTERY DISCONNECT
3-70
ICL7665S
7805
5V REGULATOR
UNREGULATED
DC INPUT
4700µF
470µF
BACKUP
BATTERY
V+
HYST1
HYST2
22MΩ
1MΩ
5.86kΩ
ICL7665S
V
V
SET1
SET2
715kΩ
2.2MΩ
OUT1
OUT2
130kΩ
RESET OR
WRITE
1MΩ
ENABLE
1MΩ
POWER
FAIL
WARNING
FIGURE 15. POWER FAIL WARNING AND POWERUP/POWERDOWN RESET
Simple High/Low Temperature Alarm
AC Power Fail and Brownout Detector
Figure 16 illustrates a simple high/low temperature alarm
which uses the ICL7665S with an NPN transistor. The
Figure 17 shows a circuit that detects AC undervoltage by
monitoring the secondary side of the transformer. The
voltage at the top of R is determined by the V of the
capacitor, C , is charged through R when OUT1 is OFF.
1
BE
1 1
transistor and the position of R ’s wiper arm. This voltage
With a normal 100 VAC input to the transformer, OUT1 will
1
has a negative temperature coefficient. R is adjusted so
discharge C once every cycle, approximately every 16.7ms.
1
1
that V
equals 1.3V when the NPN transistor’s
When the AC input voltage is reduced, OUT1 will stay OFF,
SET2
temperature reaches the temperature selected for the high
temperature alarm. When this occurs, OUT2 goes low. R is
so that C does not discharge. When the voltage on C
1
1
reaches 1.3V, OUT2 turns OFF and the power fail warning
2
adjusted so that V
equals 1.3V when the NPN
goes high. The time constant, R C , is chosen such that it
SET1
1
1
transistor’s temperature reaches the temperature selected
for the low temperature alarm. When the temperature drops
below this limit, OUT1 goes low.
takes longer than 16.7ms to charge C 1.3V.
1
3-71
ICL7665S
+
-
5V
470kΩ
LOW TEMPERATURE
LIMIT ADJUST
V+
R
3
TEMPERATURE
SENSOR
(GENERAL PURPOSE
HYST1
HYST2
NPN TRANSISTOR)
R
4
22MΩ
22kΩ
R
6
ICL7665S
27kΩ
R
2
V
V
SET1
SET2
1MΩ
R
5
OUT1
OUT2
R
1.5MΩ
7
10KΩ
HIGH
R
1
V+
ALARM SIGNAL
FOR DRIVING
LEDS, BELLS,
ETC.
TEMPERATURE
LIMIT ADJUST
1MΩ
FIGURE 16. SIMPLE HIGH/LOW TEMPERATURE ALARM
7805
5V REGULATOR
5V, 1A
4700µF
20V
CENTERED
TAPPED
TRANS.
110VAC
60Hz
+5V
HYST2
ICL7665S
HYST1
601kΩ
R
1
1MΩ
V
V
SET2
SET1
100kΩ
POWER FAIL
WARNING
1MΩ
OUT1
OUT2
C
1
1MΩ
FIGURE 17. AC POWER FAIL AND BROWNOUT DETECTOR
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
3-72
相关型号：
ICL7665ACSA+
Power Supply Support Circuit, Fixed, 2 Channel, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8
MAXIM
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