ICL8083 [INTERSIL]
Precision Waveform Generator/Voltage Controlled Oscillator;
| 型号： | ICL8083 |
| 厂家： | 
Intersil |
| 描述： | Precision Waveform Generator/Voltage Controlled Oscillator |
| 文件： | 总10页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ICL8038
Data Sheet
September 1998
File Number 2864.3
Precision Waveform Generator/Voltage
Controlled Oscillator
Features
o
• Low Frequency Drift with Temperature. . . . . . .250ppm/ C
• Low Distortion. . . . . . . . . . . . . . . . 1% (Sine Wave Output)
• High Linearity . . . . . . . . . . .0.1% (Triangle Wave Output)
• Wide Frequency Range . . . . . . . . . . . 0.001Hz to 300kHz
• Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . . 2% to 98%
• High Level Outputs. . . . . . . . . . . . . . . . . . . . . . TTL to 28V
The ICL8038 waveform generator is a monolithic integrated
circuit capable of producing high accuracy sine, square,
triangular, sawtooth and pulse waveforms with a minimum of
external components. The frequency (or repetition rate) can
be selected externally from 0.001Hz to more than 300kHz
using either resistors or capacitors, and frequency
modulation and sweeping can be accomplished with an
external voltage. The ICL8038 is fabricated with advanced
monolithic technology, using Schottky barrier diodes and thin
film resistors, and the output is stable over a wide range of
temperature and supply variations. These devices may be
interfaced with phase locked loop circuitry to reduce
• Simultaneous Sine, Square, and Triangle Wave
Outputs
• Easy to Use - Just a Handful of External Components
Required
o
temperature drift to less than 250ppm/ C.
Ordering Information
o
PART NUMBER
STABILITY
TEMP. RANGE ( C)
PACKAGE
14 Ld PDIP
PKG. NO.
E14.3
o
ICL8038CCPD
250ppm/ C (Typ)
0 to 70
o
ICL8038CCJD
ICL8038BCJD
ICL8038ACJD
250ppm/ C (Typ)
0 to 70
14 Ld CERDIP
14 Ld CERDIP
14 Ld CERDIP
F14.3
F14.3
F14.3
o
180ppm/ C (Typ)
0 to 70
o
120ppm/ C (Typ)
0 to 70
Pinout
Functional Diagram
ICL8038
(PDIP, CERDIP)
TOP VIEW
V+
6
CURRENT
SOURCE
COMPARATOR
#1
#1
I
SINE WAVE
10
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
NC
ADJUST
2I
SINE
WAVE OUT
COMPARATOR
#2
C
TRIANGLE
OUT
SINE WAVE
ADJUST
V- OR GND
DUTY CYCLE
FREQUENCY
ADJUST
TIMING
CAPACITOR
CURRENT
SOURCE
#2
FLIP-FLOP
SQUARE
WAVE OUT
V+
V- OR GND
11
FM SWEEP
INPUT
8
FM BIAS
SINE
CONVERTER
BUFFER
BUFFER
9
3
2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
ICL8038
Absolute Maximum Ratings
Thermal Information
o
o
Supply Voltage (V- to V+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+
Input Current (Pins 4 and 5). . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA
Thermal Resistance (Typical, Note 1)
CERDIP Package. . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . .
θ
( C/W)
θ
( C/W)
JA
JC
75
115
20
N/A
o
Maximum Junction Temperature (Ceramic Package) . . . . . . . .175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
o
o
Operating Conditions
o
Temperature Range
ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . . 0 C to 70 C
o
o
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
o
Electrical Specifications
V
= ±10V or +20V, T = 25 C, R = 10kΩ, Test Circuit Unless Otherwise Specified
SUPPLY
A
L
ICL8038CC
ICL8038BC
ICL8038AC
TEST
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
Supply Voltage Operating Range
V
SUPPLY
V+
Single Supply
Dual Supplies
+10
-
-
+30 +10
-
-
+30 +10
-
-
+30
±15
20
V
V
V+, V-
±5
±15
±5
±15
±5
Supply Current
I
V
= ±10V
12
20
-
12
20
-
12
mA
SUPPLY
SUPPLY
(Note 2)
FREQUENCY CHARACTERISTICS (All Waveforms)
Max. Frequency of Oscillation
Sweep Frequency of FM Input
Sweep FM Range
f
100
-
-
-
-
-
-
100
-
-
-
-
-
-
100
-
-
-
-
-
kHz
kHz
MAX
f
-
-
-
-
10
-
-
-
-
10
-
-
-
-
10
SWEEP
(Note 3)
10:1 Ratio
35:1
0.5
250
35:1
0.2
180
35:1
0.2
120
FM Linearity
%
o
o
o
Frequency Drift with
Temperature (Note 5)
∆f/∆T
∆f/∆V
0 C to 70 C
ppm/ C
Frequency Drift with Supply Voltage
Over Supply
-
0.05
-
-
0.05
-
0.05
-
%/V
Voltage Range
OUTPUT CHARACTERISTICS
Square Wave
Leakage Current
I
V
= 30V
-
-
-
1
0.5
-
-
-
-
1
0.4
-
-
-
-
0.2
180
40
-
1
0.4
-
µA
V
OLK
9
Saturation Voltage
Rise Time
V
I
= 2mA
= 4.7kΩ
= 4.7kΩ
0.2
180
40
0.2
180
40
-
SAT
SINK
t
R
-
-
-
ns
ns
%
R
L
L
Fall Time
t
R
-
-
-
-
-
-
F
Typical Duty Cycle Adjust
(Note 6)
∆D
2
98
2
98
2
98
Triangle/Sawtooth/Ramp
Amplitude
-
V
R
= 100kΩ
0.30 0.33
-
0.30 0.33
-
0.30 0.33
-
xV
SUPPLY
TRIAN-
GLE
TRI
Linearity
-
-
0.1
-
-
-
-
0.05
200
-
-
-
-
0.05
200
-
-
%
Output Impedance
Z
I
= 5mA
200
Ω
OUT
OUT
2
ICL8038
o
Electrical Specifications
V
= ±10V or +20V, T = 25 C, R = 10kΩ, Test Circuit Unless Otherwise Specified (Continued)
SUPPLY
A
L
ICL8038CC
ICL8038BC
ICL8038AC
TEST
CONDITIONS
PARAMETER
SYMBOL
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNITS
Sine Wave
Amplitude
V
R
R
= 100kΩ
0.2 0.22
-
0.2 0.22
-
0.2 0.22
-
xV
SINE
SINE
SUPPLY
%
THD
THD
= 1MΩ
-
2.0
5
-
1.5
3
-
1.0
1.5
S
(Note 4)
THD Adjusted
NOTES:
THD
Use Figure 4
-
1.5
-
-
1.0
-
-
0.8
-
%
2. R and R currents not included.
A
B
3. V
= 20V; R and R = 10kΩ, f 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B.
A B
SUPPLY
4. 82kΩ connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use R and R .)
A
B
5. Figure 1, pins 7 and 8 connected, V
= ±10V. See Typical Curves for T.C. vs V
.
SUPPLY
SUPPLY
6. Not tested, typical value for design purposes only.
Test Conditions
PARAMETER
R
R
R
C
SW
1
MEASURE
A
B
L
Supply Current
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
3.3nF
3.3nF
3.3nF
3.3nF
Closed
Open
Current Into Pin 6
Frequency at Pin 9
Frequency at Pin 3
Frequency at Pin 9
Sweep FM Range (Note 7)
Frequency Drift with Temperature
Frequency Drift with Supply Voltage (Note 8)
Closed
Closed
Output Amplitude (Note 10)
Sine
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
3.3nF
3.3nF
3.3nF
3.3nF
3.3nF
Closed
Closed
Closed
Closed
Closed
Pk-Pk Output at Pin 2
Pk-Pk Output at Pin 3
Current into Pin 9
Triangle
Leakage Current (Off) (Note 9)
Saturation Voltage (On) (Note 9)
Rise and Fall Times (Note 11)
Output (Low) at Pin 9
Waveform at Pin 9
4.7kΩ
Duty Cycle Adjust (Note 11)
Max
50kΩ
~25kΩ
10kΩ
10kΩ
~1.6kΩ
50kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
3.3nF
3.3nF
3.3nF
3.3nF
Closed
Closed
Closed
Closed
Waveform at Pin 9
Waveform at Pin 9
Waveform at Pin 3
Waveform at Pin 2
Min
Triangle Waveform Linearity
Total Harmonic Distortion
NOTES:
7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (f ) and then connecting pin 8 to pin 6 (f ). Otherwise apply Sweep
HI
LO
2
Voltage at pin 8 ( / V
+2V) ≤ V
≤ V
SUPPLY
where V
is the total supply voltage. In Figure 5B, pin 8 should vary between
3
SUPPLY
5.3V and 10V with respect to ground.
8. 10V ≤ V+ ≤ 30V, or ±5V ≤ V ≤ ±15V.
SWEEP
SUPPLY
SUPPLY
9. Oscillation can be halted by forcing pin 10 to +5V or -5V.
10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V.
11. Not tested; for design purposes only.
3
ICL8038
Test Circuit
+10V
R
10K
R
10K
R
B
10K
L
A
4
5
6
7
8
9
3
SW
N.C.
1
ICL8038
11
R
R
TRI
10
12
2
SINE
C
3300pF
82K
-10V
FIGURE 1. TEST CIRCUIT
Detailed Schematic
6
CURRENT SOURCES
V+
R
4K
41
R
5.2K
R
B
R
A
EXT
32
EXT
R
11K
1
Q
8
1
5
Q
4
14
Q
Q
48
1
2
7
R
5K
8
Q
R
200
Q
3
33
47
R
39K
2
R
19
Q
6
Q
Q
Q
Q
Q
4
5
9
46
800
COMPARATOR
Q
R
34
375
45
R
20
Q
7
8
Q
10
44
Q
18
2.7K
Q
15
R
R
Q
35
46
40K
43
R
21
Q
330
17
Q
16
C
EXT
R
Q
42
9
10K
Q
5K
R
R
7B
7A
Q
41
10
R
33K
R
33K
R
33K
R
26
33K
R
30K
27
45
25
3
10K
15K
Q
11
Q
12
R
36
Q
Q
21
30
Q
20
1600
Q
13
Q
Q
22
31
Q
19
R
100
R
5
R
R
R
R
R
4
6
31
28
29
30
R
5K
Q
Q
Q
100 100
10
33K
33K
33K
33K
32
33
34
Q
22
49
R
Q
50
10K
R
R
R
37
R
13
16
1.8K
Q
51
43
27K
330
620
R
23
Q
Q
24
52
2.7K
R
27K
R
38
375
14
9
Q
Q
53
37
Q
Q
39
35
R
24
R
270
11
Q
Q
54
36
Q
Q
40
38
R
3
39
R
800
R
Q
Q
44
1K
Q
41
27K
28
55
Q
26
Q
23
27
200
12
R
R
R
470
Q
17
4.7K
12
15
56
2.7K
R
40
R
R
C
42
27K
EXT
82K
BUFFER AMPLIFIER
11
2
5.6K
Q
Q
29
25
R
18
4.7K
SINE CONVERTER
FLIP-FLOP
net-current I and the voltage across it drops linearly with time.
When it has reached the level of comparator #2 (set at 1/3 of
the supply voltage), the flip-flop is triggered into its original
state and the cycle starts again.
Application Information (See Functional Diagram)
An external capacitor C is charged and discharged by two
current sources. Current source #2 is switched on and off by a
flip-flop, while current source #1 is on continuously. Assuming
that the flip-flop is in a state such that current source #2 is off,
and the capacitor is charged with a current I, the voltage
across the capacitor rises linearly with time. When this voltage
reaches the level of comparator #1 (set at 2/3 of the supply
voltage), the flip-flop is triggered, changes states, and
releases current source #2. This current source normally
carries a current 2I, thus the capacitor is discharged with a
Four waveforms are readily obtainable from this basic
generator circuit. With the current sources set at I and 2I
respectively, the charge and discharge times are equal. Thus
a triangle waveform is created across the capacitor and the
flip-flop produces a square wave. Both waveforms are fed to
buffer stages and are available at pins 3 and 9.
4
ICL8038
The levels of the current sources can, however, be selected
C × 1/3 × V
× R
R × C
A
0.66
C × V
I
SUPPLY
A
over a wide range with two external resistors. Therefore, with
the two currents set at values different from I and 2I, an
asymmetrical sawtooth appears at Terminal 3 and pulses
with a duty cycle from less than 1% to greater than 99% are
available at Terminal 9.
t
= -------------- = ------------------------------------------------------------------ = ------------------
1
0.22 × V
SUPPLY
The falling portion of the triangle and sine wave and the 0
state of the square wave is:
R
R C
C × 1/3V
C × V
SUPPLY
A B
t
= ------------ = ----------------------------------------------------------------------------------- = -------------------------------------
2
1 V V
0.66(2R – R
)
SUPPLY
SUPPLY
A
B
------------------------
------------------------
2(0.22)
– 0.22
R
R
The sine wave is created by feeding the triangle wave into a
nonlinear network (sine converter). This network provides a
decreasing shunt impedance as the potential of the triangle
moves toward the two extremes.
B
A
Thus a 50% duty cycle is achieved when R = R .
A
B
If the duty cycle is to be varied over a small range about 50%
only, the connection shown in Figure 3B is slightly more
convenient. A 1kΩ potentiometer may not allow the duty cycle
to be adjusted through 50% on all devices. If a 50% duty cycle
is required, a 2kΩ or 5kΩ potentiometer should be used.
Waveform Timing
The symmetry of all waveforms can be adjusted with the
external timing resistors. Two possible ways to accomplish
this are shown in Figure 3. Best results are obtained by
keeping the timing resistors R and R separate (A). R
With two separate timing resistors, the frequency is given by:
1
1
A
B
A
f = --------------- = ------------------------------------------------------
t
+ t
R C
A
0.66
R
controls the rising portion of the triangle and sine wave and
the 1 state of the square wave.
1
2
B
------------
1 + -------------------------
2R – R
A
B
1
The magnitude of the triangle waveform is set at /
3
or, if R = R = R
A
B
V
; therefore the rising portion of the triangle is,
0.33
-----------
RC
SUPPLY
f =
(for Figure 3A)
FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50%
FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS
V+
V+
1kΩ
R
L
R
L
R
R
R
R
B
A
B
A
4
5
6
7
8
9
3
4
5
6
7
9
3
ICL8038
11
8
ICL8038
11
2
10
12
10
12
2
C
82K
C
100K
V- OR GND
V- OR GND
FIGURE 3A.
FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS
5
ICL8038
Neither time nor frequency are dependent on supply voltage,
R and R are shown in the Detailed Schematic.
1 2
even though none of the voltages are regulated inside the
integrated circuit. This is due to the fact that both currents
and thresholds are direct, linear functions of the supply
voltage and thus their effects cancel.
A similar calculation holds for R .
B
The capacitor value should be chosen at the upper end of its
possible range.
Reducing Distortion
Waveform Out Level Control and Power Supplies
To minimize sine wave distortion the 82kΩ resistor between
pins 11 and 12 is best made variable. With this arrangement
distortion of less than 1% is achievable. To reduce this even
further, two potentiometers can be connected as shown in
Figure 4; this configuration allows a typical reduction of sine
wave distortion close to 0.5%.
The waveform generator can be operated either from a
single power supply (10V to 30V) or a dual power supply
(±5V to ±15V). With a single power supply the average levels
of the triangle and sine wave are at exactly one-half of the
supply voltage, while the square wave alternates between
V+ and ground. A split power supply has the advantage that
all waveforms move symmetrically about ground.
V+
The square wave output is not committed. A load resistor
can be connected to a different power supply, as long as the
applied voltage remains within the breakdown capability of
the waveform generator (30V). In this way, the square wave
output can be made TTL compatible (load resistor
connected to +5V) while the waveform generator itself is
powered from a much higher voltage.
1kΩ
R
L
R
R
B
A
4
5
6
1
7
9
3
8
ICL8038
Frequency Modulation and Sweeping
2
10
11
12
The frequency of the waveform generator is a direct function
of the DC voltage at Terminal 8 (measured from V+). By
altering this voltage, frequency modulation is performed. For
small deviations (e.g. ±10%) the modulating signal can be
applied directly to pin 8, merely providing DC decoupling
with a capacitor as shown in Figure 5A. An external resistor
between pins 7 and 8 is not necessary, but it can be used to
increase input impedance from about 8kΩ (pins 7 and 8
connected together), to about (R + 8kΩ).
100kΩ
10kΩ
10kΩ
C
100kΩ
V- OR GND
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE
DISTORTION
Selecting R , R and C
A
B
For larger FM deviations or for frequency sweeping, the
modulating signal is applied between the positive supply
voltage and pin 8 (Figure 5B). In this way the entire bias for
the current sources is created by the modulating signal, and
a very large (e.g. 1000:1) sweep range is created (f = 0 at
For any given output frequency, there is a wide range of RC
combinations that will work, however certain constraints are
placed upon the magnitude of the charging current for
optimum performance. At the low end, currents of less than
1µA are undesirable because circuit leakages will contribute
significant errors at high temperatures. At higher currents
(I > 5mA), transistor betas and saturation voltages will
contribute increasingly larger errors. Optimum performance
will, therefore, be obtained with charging currents of 10µA to
1mA. If pins 7 and 8 are shorted together, the magnitude of
V
= 0). Care must be taken, however, to regulate the
SWEEP
supply voltage; in this configuration the charge current is no
longer a function of the supply voltage (yet the trigger
thresholds still are) and thus the frequency becomes
dependent on the supply voltage. The potential on Pin 8 may
1
be swept down from V+ by ( / V
- 2V).
SUPPLY
3
the charging current due to R can be calculated from:
A
R
× (V+ – V-)
1
1
0.22(V+ – V-)
---------------------------------------- -------
I =
×
= -----------------------------------
(R + R )
R
R
1
2
A
A
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
6
ICL8038
With a dual supply voltage the external capacitor on Pin 10 can
V+
be shorted to ground to halt the ICL8038 oscillation. Figure 7
shows a FET switch, diode ANDed with an input strobe signal
to allow the output to always start on the same slope.
R
L
R
R
A
B
4
5
6
7
8
9
3
V+
R
ICL8038
11
R
R
B
15K
A
4
5
7
8
9
FM
2
10
12
C
81K
ICL8038
1N914
V- OR GND
2
FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION
11
10
1N914
C
2N4392
-15V
STROBE
V+
100K
OFF
R
L
SWEEP
VOLTAGE
R
R
A
B
+15V (+10V)
-15V (-10V)
ON
4
5
6
9
3
FIGURE 7. STROBE TONE BURST GENERATOR
8
ICL8038
11
To obtain a 1000:1 Sweep Range on the ICL8038 the
voltage across external resistors R and R must decrease
A
B
to nearly zero. This requires that the highest voltage on
control Pin 8 exceed the voltage at the top of R and R by a
2
10
12
A
B
few hundred mV. The Circuit of Figure 8 achieves this by
using a diode to lower the effective supply voltage on the
ICL8038. The large resistor on pin 5 helps reduce duty cycle
variations with sweep.
C
81K
V- OR GND
FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP
FIGURE 5.
The linearity of input sweep voltage versus output frequency
can be significantly improved by using an op amp as shown
in Figure 10.
Typical Applications
The sine wave output has a relatively high output impedance
(1kΩ Typ). The circuit of Figure 6 provides buffering, gain
and amplitude adjustment. A simple op amp follower could
also be used.
+10V
1N457
DUTY CYCLE
15K
0.1µF
1K
4.7K
V+
4.7K
R
R
B
A
AMPLITUDE
100K
5
4
6
9
3
2
4
5
6
7
8
2
+
741
-
10K
FREQ.
8
ICL8038
11
ICL8038
20K
10
12
4.7K
10
11
DISTORTION
100K
0.0047µF
20K
≈15M
C
-10V
V-
FIGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY
FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS
7
ICL8038
V +
2
DUTY
CYCLE
R
1
FREQUENCY
ADJUST
TRIANGLE
OUT
FM BIAS
V +
1
6
4
5
7
9
3
2
1
SINE WAVE
OUT
SQUARE
WAVE
OUT
ICL8038
11
VCO
IN
PHASE
DETECTOR
DEMODULATED
FM
SINE WAVE
ADJ.
INPUT
AMPLIFIER
8
10
12
R
2
TIMING
CAP.
SINE WAVE
ADJ.
LOW PASS
FILTER
V-/GND
FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP
HIGH FREQUENCY
SYMMETRY
10kΩ
100kΩ
500Ω
4.7kΩ
1N753A
4.7kΩ
(6.2V)
1MΩ
1kΩ
100kΩ
1,000pF
LOW FREQUENCY
SYMMETRY
4
5
6
9
+15V
SINE WAVE
OUTPUT
-
741
+
1kΩ
ICL8038
FUNCTION GENERATOR
+15V
8
3
-
-V
741
+
IN
P
4
+
2
10
11
12
50µF
15V
10kΩ
OFFSET
100kΩ
SINE WAVE
3,900pF
DISTORTION
-15V
FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR
Use in Phase Locked Loops
Its high frequency stability makes the ICL8038 an ideal
building block for a phase locked loop as shown in Figure 9.
In this application the remaining functional blocks, the phase
detector and the amplifier, can be formed by a number of
available ICs (e.g., MC4344, NE562).
Second, the DC output level of the amplifier must be made
compatible to the DC level required at the FM input of the
waveform generator (pin 8, 0.8V+). The simplest solution here
is to provide a voltage divider to V+ (R , R as shown) if the
1
2
amplifier has a lower output level, or to ground if its level is
higher. The divider can be made part of the low-pass filter.
In order to match these building blocks to each other, two
steps must be taken. First, two different supply voltages are
used and the square wave output is returned to the supply of
the phase detector. This assures that the VCO input voltage
will not exceed the capabilities of the phase detector. If a
smaller VCO signal is required, a simple resistive voltage
divider is connected between pin 9 of the waveform
This application not only provides for a free-running
frequency with very low temperature drift, but is also has the
unique feature of producing a large reconstituted sinewave
signal with a frequency identical to that at the input.
For further information, see Intersil Application Note AN013,
“Everything You Always Wanted to Know About the ICL8038”.
generator and the VCO input of the phase detector.
8
ICL8038
FM Linearity. The percentage deviation from the best fit
straight line on the control voltage versus output frequency
curve.
Definition of Terms
Supply Voltage (V
). The total supply voltage from
SUPPLY
V+ to V-.
Output Amplitude. The peak-to-peak signal amplitude
appearing at the outputs.
Supply Current. The supply current required from the
power supply to operate the device, excluding load currents
and the currents through R and R .
A
B
Saturation Voltage. The output voltage at the collector of
Q
when this transistor is turned on. It is measured for a
23
Frequency Range. The frequency range at the square wave
output through which circuit operation is guaranteed.
sink current of 2mA.
Rise and Fall Times. The time required for the square wave
output to change from 10% to 90%, or 90% to 10%, of its
final value.
Sweep FM Range. The ratio of maximum frequency to
minimum frequency which can be obtained by applying a
sweep voltage to pin 8. For correct operation, the sweep
voltage should be within the range:
Triangle Waveform Linearity. The percentage deviation
from the best fit straight line on the rising and falling triangle
waveform.
2
( / V
+ 2V) < V
< V
SWEEP SUPPLY
3
SUPPLY
Total Harmonic Distortion. The total harmonic distortion at
the sine wave output.
Typical Performance Curves
20
1.03
1.02
1.01
1.00
0.99
0.98
o
-55 C
15
10
5
o
125 C
o
25 C
5
10
15
20
25
30
5
10
15
20
25
30
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE
200
150
100
50
1.03
1.02
RISE TIME
o
10
125 C
1.01
1.00
0.99
0.98
o
25 C
20
30
30
o
-55 C
o
125 C
20
10
o
25 C
FALL TIME
o
-55 C
0
-50 -25
0
25
75
125
0
2
4
6
8
10
o
LOAD RESISTANCE (kΩ)
TEMPERATURE ( C)
FIGURE 13. FREQUENCY vs TEMPERATURE
FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs
LOAD RESISTANCE
9
ICL8038
Typical Performance Curves (Continued)
1.0
0.9
0.8
2
o
LOAD CURRENT
125 C
-
TO V
o
25 C
1.5
o
-55 C
o
125 C
1.0
0.5
0
o
25 C
o
-55 C
LOAD CURRENT TO V+
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
LOAD CURRENT (mA)
LOAD CURRENT (mA)
FIGURE 15. SQUARE WAVE SATURATION VOLTAGE vs LOAD
CURRENT
FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD
CURRENT
1.2
1.1
1.0
0.9
0.8
0.7
0.6
10.0
1.0
0.1
0.01
10
100
1K
10K
100K
1M
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs
FREQUENCY
FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
1.1
1.0
0.9
12
10
8
6
4
ADJUSTED
UNADJUSTED
2
0
10
100
1K
10K
100K
1M
10
100
10K
FREQUENCY (Hz)
100K
1M
1K
FREQUENCY (Hz)
FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY
FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY
10
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