ISL21090BFB825Z-TK [INTERSIL]
Ultra Low Noise, Precision Voltage Reference Output Current Capability 20mA; 超低噪声，高精度电压基准输出电流能力20毫安
| 型号： | ISL21090BFB825Z-TK |
| 厂家： | 
Intersil |
| 描述： | Ultra Low Noise, Precision Voltage Reference Output Current Capability 20mA |
| 文件： | 总10页 (文件大小：761K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ultra Low Noise, Precision Voltage Reference
ISL21090
Features
The ISL21090 is a ultra low noise, high DC accuracy precision
voltage reference with wide input voltage range from 4.7V to
36V. The ISL21090 uses the new Intersil Advanced Bipolar
technology to achieve sub 2µVP-P 0.1Hz noise with an initial
voltage accuracy of 0.02%.
• Reference Output Voltage Option
- 2.5V (Released)
- 1.25V, 3.3V, 4.096V, 5V, 7V and 10V (Coming Soon)
• Initial Accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±0.02%
• Output Voltage Noise . . . . . . . . . . . 1.9µVP-P Typ (0.1Hz to 10Hz)
(2.5V Option)
The ISL21090 offers a 2.5V output voltage option with
7ppm/°C temperature coefficient and also provides excellent
line and load regulation. The device is offered in an 8 Ld SOIC
package.
• Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 930µA (Typ)
• Tempco . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7ppm/°C Max
(3ppm/°C Coming Soon)
The ISL21090 is ideal for high-end instrumentation, data
acquisition and processing applications requiring high DC
precision where low noise performance is critical.
• Output Current Capability . . . . . . . . . . . . . . . . . . . . . . . . 20mA
• Line Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8ppm/V
• Load Regulation. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5ppm/mA
• Operating Temperature Range. . . . . . . . . . .-40°C to +125°C
Applications
• High-End Instrumentation
• Precision Voltage Sources for Data Acquisition System,
Industrial Control, Communication Infrastructure
• Process Control and Instrumentations
1
2
8
7
DNC
VIN
DNC
DNC
VIN
VREF
2.5010
10µF
0.1µF
3
4
6
5
TYPICAL TEMPERATURE
COEFFICIENT CURVE FOR 10 UNITS
COMP
GND
VOUT
TRIM
2.5005
0.1µF
2.5000
2.4995
2.4990
2.4985
2.4980
VDD
SCLK
CSb
VREF
DACOUTx
SERIAL CLOCK
CHIP SELECT
OUTxS
OUTxF
GND
SERIAL DATA I/O
SDIO
-55 -35 -15
5
25
45
65
85
105 125 145
TEMPERATURE (°C)
DAC
FIGURE 2. VOUT vs TEMPERATURE
FIGURE 1. ISL21090 TYPICAL APPLICATION DIAGRAM
June 8, 2011
FN6993.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL21090
Pin Configuration
ISL21090
(8 LD SOIC)
TOP VIEW
1
2
8
7
DNC
VIN
DNC
DNC
3
4
6
5
COMP
GND
VOUT
TRIM
Pin Descriptions
PIN NUMBER
PIN NAME
DNC
DESCRIPTION
1
2
3
4
5
6
7
8
Do Not Connect
VIN
Input Voltage Connection
COMP
GND
Compensation and Noise Reduction Capacitor
Ground Connection
TRIM
VOUT
DNC
Voltage Reference Trim input
Voltage Reference Output
Do Not Connect
DNC
Do Not Connect
FN6993.0
June 8, 2011
2
ISL21090
Ordering Information
PACKAGE
TAPE & REEL
(Pb-Free)
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
VOUT OPTION
(V)
GRADE
(%)
TEMPCO
(ppm/°C)
TEMP RANGE
(°C)
PKG. DWG. #
M8.15E
ISL21090BFB825Z-TK
21090 BFZ25
2.5
0.02
7
-40 to +125
8 Ld SOIC
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL21090. For more information on MSL please see Tech Brief TB363.
FN6993.0
June 8, 2011
3
ISL21090
Absolute Maximum Ratings
Thermal Information
Max Voltage
Thermal Resistance (Typical)
8 Ld SOIC Package (Notes 4, 5) . . . . . . . . .
Continuous Power Dissipation (TA = +125°C) . . . . . . . . . . . . . . . . .217mW
Maximum Junction Temperature (TJMAX). . . . . . . . . . . . . . . . . . . . . .+150°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile (Note 6). . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
θ
JA (°C/W)
115
θ
JC (°C/W)
58
V
V
IN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +40V
OUT to GND (10s). . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to VOUT + 0.5V
Voltage on any Pin to Ground . . . . . . . . . . . . . . . . . . . -0.5V to +VOUT + 0.5V
Voltage on DNC pins. . . . . . . . . . . . . . . No connections permitted to these pins
Input Voltage Slew Rate (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1V/µs
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Recommended Operating Conditions
Temperature Range (Industrial) . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
6. Post-reflow drift for the ISL21090 devices can exceed 100µV to 1.0mV based on experimental results with devices on FR4 double sided boards. The
engineer must take this into account when considering the reference voltage after assembly.
Electrical Specifications VIN = 5V (2.5V option), IOUT = 0, unless otherwise specified. Boldface limits apply over the operating
temperature range,-40°C to +125°C.
MIN
MAX
PARAMETER
VOUT
DESCRIPTION
Output Voltage
CONDITIONS
(Note 7)
TYP
2.5
(Note 7)
UNIT
VIN = 5V
V
%
VOA
VOUT Accuracy @ TA = +25°C
All VOUT options
-0.02
4.7
+0.02
7
TC VOUT
Output Voltage Temperature
Coefficient
ISL21090 B grade
ppm/°C
VIN
Input Voltage Range (Note 9)
Supply Current
VOUT = 2.5V
36
1.28
18
V
IIN
0.930
8
mA
ΔVOUT /ΔVIN
ΔVOUT/ΔIOUT
Line Regulation
VIN = 4.7V to 36V, VOUT = 2.5V
Sourcing: 0mA ≤ IOUT ≤ 20mA
Sinking: -10mA ≤ IOUT ≤ 0mA
VOUT = 2.5V @ 10mA
ppm/V
ppm/mA
ppm/mA
V
Load Regulation
2.5
2.5
1.1
17
17
VD
Dropout Voltage
(Note 8)
1.7
ISC+
ISC-
tR
Short Circuit Current
Short Circuit Current
Turn-on Settling Time
TA = +25°C, VOUT tied to GND
TA = +25°C, VOUT tied to VIN
90% of final value, CL = 1.0µF,
55
-61
mA
mA
µs
150
CC = open
Ripple Rejection
f = 120Hz
90
1.9
1.6
50
dB
eN
VN
Output Voltage Noise
Broadband Voltage Noise
Noise Density
0.1Hz ≤ f ≤ 10Hz, VOUT = 2.5V
10Hz ≤ f ≤ 1kHz, VOUT = 2.5V
f = 1kHz, VOUT = 2.5V
TA = +25°C
µVP-P
µVRMS
nV/√Hz
ppm
ΔVOUT/Δt
Long Term Stability
20
NOTES:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
8. VIN-VOUT measured at the point where VOUT drops 1mV from the nominal measured value.
9. Coming soon: VIN (MIN) = 3.7V
FN6993.0
June 8, 2011
4
ISL21090
Typical Performance Curves (ISL21090-2.5)
1300
1200
1100
1000
900
1000
980
960
940
920
900
880
UNIT 3
+125°C
+25°C
UNIT 1
800
UNIT 2
700
-40°C
600
4
9
14
19
24
(V)
29
34
39
4
9
14
19
24
29
34
39
V
V
(V)
IN
IN
FIGURE 3. IIN vs VIN, THREE UNITS
FIGURE 4. IIN vs VIN, THREE TEMPERATURES
2.500390
2.500290
2.500190
2.500090
2.499990
2.499890
2.499790
2.499690
2.500200
2.500000
2.499800
2.499600
2.499400
2.499200
2.499000
2.498800
UNIT 1
+25°C
+125°C
-40°C
UNIT 2
UNIT 3
3
6
9
12 15 18 21 24 27 30 33 36 39
(V)
4
9
14
19
24
(V)
29
34
39
V
V
IN
IN
FIGURE 5. LINE REGULATION, THREE UNITS
FIGURE 6. LINE REGULATION, THREE TEMPERATURES
30
30
20
20
10
10
CL = 100nF
CL = 1nF
0
0
-10
-20
-30
-10
-20
-30
0
10
20
30
40
50
60
70
80
90
100
0
10
20
30
40
50
60
70
80
90
100
TIME (µs)
TIME (µs)
FIGURE 7. LINE TRANSIENT WITH 1nF LOAD (ΔVIN = ±500mV)
FIGURE 8. LINE TRANSIENT WITH 100nF LOAD (ΔVIN = ±500mV)
FN6993.0
June 8, 2011
5
ISL21090
Typical Performance Curves (ISL21090-2.5)(Continued)
6
30
20
4
+25°C
10
CL = NO LOAD
2
0
0
-40°C
-10
-20
-30
-40
-2
-4
-6
CL = 100nF
CL = 1µF
100
+125°C
15
-25
-20
-15
-10
-5
0
5
10
20
0
20
40
60
80
120
(SOURCING)
I
(mA)
(SINKING)
TIME (µs)
LOAD
FIGURE 9. LOAD REGULATION, THREE TEMPERATURES
FIGURE 10. LOAD TRANSIENT (ΔVIN = ±1mA)
6
6
5
5
4
4
VIN
VIN
3
3
2
2
CL = 1µF
CL = 0.1µF
1
1
0
0
-1
-1
0
50
100
150
200
250
300
350
400
0
50
100
150
200
250
300
350
400
TIME (µs)
TIME (µs)
FIGURE 11. TURN-ON TIME WITH 0.1µF
FIGURE 12. TURN-ON TIME WITH 1µF
1000.0
100.0
10.0
1.0
0
CL = NO LOAD
-20
-40
CL = 100nF
CL = 10nF
-60
CL = 1nF
CL = 10nF
-80
0.1
-100
-120
-140
0.01
0.001
CL = 100nF
1M
CL = NO LOAD
CL = 1nF
100
10
100
1k
10k
100k
1M
10M
10
1k
10k
100k
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. ZOUT vs FREQUENCY
FIGURE 14. RIPPLE REJECTION AT DIFFERENT CAPACITIVE
LOADS
FN6993.0
June 8, 2011
6
ISL21090
Typical Performance Curves (ISL21090-2.5)(Continued)
2.5010
2.5005
2.5000
2.4995
2.4990
2.4985
2.4980
90
80
70
60
50
40
30
TYPICAL TEMPERATURE
COEFFICIENT CURVE FOR 10 UNITS
-40°C
+25°C
+125°C
-55 -35 -15
5
25
45
65
85
105 125 145
3
8
13
18
23
28
33
38
TEMPERATURE (°C)
V
(V)
IN
FIGURE 15. VOUT vs TEMPERATURE, 10 UNITS
FIGURE 16. SHORT-CIRCUIT TO VIN
X = 10s/DIV
Y = 1µV/DIV
-30
-35
-40
-45
-50
-55
-60
-65
+125°C
+25°C
-40°C
3
8
13
18
23
28
33
38
V
(V)
IN
FIGURE 17. SHORT-CIRCUIT TO GND
FIGURE 18. VOUT vs NOISE, 0.1Hz to 10Hz
FN6993.0
June 8, 2011
7
ISL21090
filter with a corner frequency at 1kHz. Load capacitance up to
10µF can be added but will result in only marginal improvements
in output noise and transient response.
Device Operation
Bandgap Precision References
The ISL21090 uses a bandgap architecture and special trimming
circuitry to produce a temperature compensated, precision voltage
reference with high input voltage capability and moderate output
current drive.
Turn-On Time
Normal turn-on time is typically 150µs, as shown in Figure 12.
The circuit designer must take this into account when looking at
power-up delays or sequencing.
Applications Information
Temperature Coefficient
Board Mounting Considerations
The limits stated for temperature coefficient (Tempco) are governed
by the method of measurement. The overwhelming standard for
specifying the temperature drift of a reference is to measure the
reference voltage at two temperatures, take the total variation,
(VHIGH – VLOW), and divide by the temperature extremes of
measurement (THIGH – TLOW). The result is divided by the nominal
reference voltage (at T = +25°C) and multiplied by 106 to yield
ppm/°C. This is the “Box” method for specifying temperature
coefficient.
For applications requiring the highest accuracy, board mounting
location should be reviewed. The device uses a plastic SOIC
package, which subjects the die to mild stresses when the
printed circuit (PC) board is heated and cooled, which slightly
changes the shape. Because of these die stresses, placing the
device in areas subject to slight twisting can cause degradation
of reference voltage accuracy. It is normally best to place the
device near the edge of a board, or on the shortest side, because
the axis of bending is most limited in that location. Mounting the
device in a cutout also minimizes flex. Obviously, mounting the
device on flexprint or extremely thin PC material will likewise
cause loss of reference accuracy.
Output Voltage Adjustment
The output voltage can be adjusted above and below the
factory-calibrated value via the trim terminal. The trim terminal is
the negative feedback divider point of the output op amp. The
positive input of the amplifier is about 1.216V, and in feedback,
so will be the trim voltage. The trim terminal has a 5000Ω
resistor to ground internally, and in the case of the 2.5V output
version, there is a feedback resistor of approximately 5000Ω
from VOUT to trim.
Board Assembly Considerations
Some PC board assembly precautions are necessary. Normal
output voltage shifts of 100µV to 500µV can be expected with
Pb-free reflow profiles or wave solder on multi-layer FR4 PC
boards. Precautions should be taken to avoid excessive heat or
extended exposure to high reflow or wave solder temperatures.
The suggested method to adjust the output is to connect a very
high value external resistor directly to the trim terminal and
connect the other end to the wiper of a potentiometer that has a
much lower total resistance and whose outer terminals connect
to VOUT and ground. If a 1MΩ resistor is connected to trim, the
output adjust range will be ±6.3mV. It is important to minimize
the capacitance on the trim terminal to preserve output amplifier
stability. It is also best to connect the series resistor directly to
the trim terminal, to minimize that capacitance and also to
minimize noise injection. Small trim adjustments will not disturb
the factory-set temperature coefficient of the reference, but
trimming near the extreme values can.
Noise Performance and Reduction
The output noise voltage in a 0.1Hz to 10Hz bandwidth is typically
1.9µVP-P (VOUT = 2.5V). The noise measurement is made with a
bandpass filter. The filter is made of a 1-pole high-pass filter, with a
corner frequency at 0.1Hz, and a 2-pole low-pass filter, with a
corner frequency (3dB) at 9.9Hz, to create a filter with a 9.9Hz
bandwidth. Noise in the 10Hz to 1kHz bandwidth is approximately
1.6µVRMS (VOUT = 2.5V), with 0.1µF capacitance on the output.
This noise measurement is made with a 2 decade bandpass filter.
The filter is made of a 1-pole high-pass filter with a corner
frequency at 10Hz of the center frequency, and 1-pole low-pass
FN6993.0
June 8, 2011
8
ISL21090
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
FN6993.0
CHANGE
June 8, 2011
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL21090
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6993.0
June 8, 2011
9
ISL21090
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.175 ± 0.075
SIDE VIEW “A
0.10 C
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
The pin #1 identifier may be either a mold or mark feature.
Reference to JEDEC MS-012.
5.
6.
TYPICAL RECOMMENDED LAND PATTERN
FN6993.0
June 8, 2011
10
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