ISL28276IAZ [INTERSIL]
Dual Precision Micropower Single Supply Rail-to-Rail Input and Output Precision Op-Amps; 双精密微功耗单电源轨至轨输入和输出精密运算放大器
| 型号： | ISL28276IAZ |
| 厂家： | 
Intersil |
| 描述： | Dual Precision Micropower Single Supply Rail-to-Rail Input and Output Precision Op-Amps |
| 文件： | 总12页 (文件大小：531K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL28276
®
Data Sheet
June 23, 2006
FN6301.0
Dual Precision Micropower Single Supply
Rail-to-Rail Input and Output Precision
Op-Amps
Features
• 120µA supply current for both channels
• 100µV max offset voltage
The ISL28276 is a dual channel micropower precision
operational amplifier optimized for single supply operation at
5V and can operate down to 2.4V. For equivalent
• 500pA input bias current
• 400kHz gain-bandwidth product
• 115dB PSRR and CMRR
performance in a single channel op-amp reference EL8176.
The ISL28276 features an Input Range Enhancement Circuit
(IREC) which enables the ISL28276 to maintain CMRR
performance for input voltages greater than the positive
supply. The input signal is capable of swinging 0.5V above a
5.0V supply (0.25V for a 2.4V supply) and to within 10mV
from ground. The output operation is rail to rail.
• Single supply operation down to 2.4V
• Input is capable of swinging above V+ and within 10mV of
Ground
• Rail-to-rail output
• Output sources 31mA load current
• Pb-free plus anneal available (RoHS compliant)
The ISL28276 draws minimal supply current while meeting
excellent DC-accuracy, AC-performance, noise and output
drive specifications. Offset current, voltage and current
noise, slew rate, and gain-bandwidth product are all two to
ten times better than other micropower op-amps with
equivalent supply current ratings.
Applications
• Battery- or solar-powered systems
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
The ISL28276 can be operated from one lithium cell or two
Ni-Cd batteries. The input range includes both positive and
negative rail.
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
Ordering Information
PART
TAPE&
REEL
PKG.
DWG. #
PART NUMBER MARKING
PACKAGE
Pinouts
ISL28276
(16 LD QSOP)
TOP VIEW
ISL28276IAZ
(See Note)
28276IAZ
-
16 Ld QSOP MDP0040
(Pb-free)
ISL28276IAZ-T7 28276IAZ
(See Note)
7”
16 Ld QSOP MDP0040
(Pb-free)
NC
NC
1
2
3
4
5
6
7
8
16 NC
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
15 V+
OUT_A
IN-_A
IN+_A
EN_A
V-
14 OUT_B
13 IN-_B
12 IN+_B
11 EN_B
10 NC
NC
9 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL28276
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.5V, 1V/µs
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V - 0.5V to V + 0.5V
-
+
ESD tolerance, Human Body Model . . . . . . . . . . . . . . . . . . . . . .3kV
ESD tolerance, Machine Model . . . . . . . . . . . . . . . . . . . . . . . . .300V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Opreating Junction
Electrical Specifications
V
= 5V, 0V, V
= 0.1V, V = 1.4V, T = 25°C unless otherwise specified.
O A
+
CM
Boldface limits apply over the operating temperature range, -40°C to +125°C
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
V
Input Offset Voltage
-100
20
100
µV
OS
-150
150
∆V
Long Term Input Offset Voltage Stability
Input Offset Drift vs Temperature
Input Offset Current
1.2
0.3
µV/Mo
µV/°C
nA
OS
------------------
∆Time
∆V
OS
---------------
∆T
I
0.25
0.5
1.3
2.0
OS
B
I
Input Bias Current
-2
2
nA
-2.5
2.5
e
Input Noise Voltage Peak-to-Peak
Input Noise Voltage Density
Input Noise Current Density
Input Voltage Range
f = 0.1Hz to 10Hz
1
µV
PP
N
f
f
= 1kHz
= 1kHz
25
0.1
nV/√Hz
pA/√Hz
V
O
O
i
N
CMIR
Guaranteed by CMRR test
= 0V to 5V
0
5
CMRR
Common-Mode Rejection Ratio
V
90
80
115
115
550
dB
CM
PSRR
Power Supply Rejection Ratio
Large Signal Voltage Gain
V
= 2.4V to 5V
90
80
dB
+
O
O
A
V
V
= 0.5V to 4.5V, R = 100kΩ
350
350
V/mV
VOL
L
= 0.5V to 4.5V, R = 1kΩ
25
3
V/mV
mV
L
V
Maximum Output Voltage Swing
Output low, R = 100kΩ
6
OUT
L
30
Output low, R = 1kΩ
130
4.996
4.880
0.17
0.13
400
175
225
mV
V
L
Output high, R = 100kΩ
4.990
4.97
L
Output high, R = 1kΩ
4.800
4.750
V
L
SR+
SR-
Positive Slew Rate
0.13
0.10
0.20
0.25
V/µs
V/µs
kHz
Negative Slew Rate
Gain Bandwidth Product
0.10
0.09
0.17
0.19
GBW
FN6301.0
June 23, 2006
2
ISL28276
Electrical Specifications
V
= 5V, 0V, V
= 0.1V, V = 1.4V, T = 25°C unless otherwise specified.
+
CM
O
A
Boldface limits apply over the operating temperature range, -40°C to +125°C (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
All channels enabled.
MIN
TYP
MAX
UNIT
I
I
I
I
Supply Current, Enabled
120
156
µA
S,ON
175
Supply Current, Disabled
All channels disabled.
4
7
9
µA
mA
mA
S,OFF
+
Short Circuit Sourcing Capability
Short Circuit Sinking Capability
R
R
= 10Ω
= 10Ω
29
23
31
26
SC
SC
L
L
-
24
19
V
V
V
Minimum Supply Voltage
Enable Pin High Level
Enable Pin Low Level
Enable Pin Input Current
2.4
0.8
V
V
S
2
INH
INL
V
I
V
V
= 5V
= 0V
0.7
0
1.3
1.5
µA
ENH
EN
EN
I
Enable Pin Input Current
-0.1
+0.1
µA
ENL
Typical Performance Curves
8
45
40
35
30
25
20
15
10
5
4
V
= ±1.0V
S
V
= ±1.25V
S
0
-4
-8
V
= ±2.5V
S
A
R
C
= 100
= 10kΩ
= 2.7pF
V
L
L
F
F
G
V
= ±2.5V
S
A
= 1
V = ±1.25V
S
V
R
C
R
R
= 10kΩ
= 2.7pF
= 100Ω
= OPEN
L
L
F
G
R /R = 99.02
R
R
V
= ±1.0V
G
S
= 221kΩ
= 2.23kΩ
0
100
100
1k
10k
100k
1M
10M
1k
10k
FREQUENCY (Hz)
100k
1M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
200
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
0
V
= V /2
CM
= -1
DD
A
150
100
50
V
-20
V
, µV
OS
-40
-60
V
= 5V
DD
0
V
= 2.5V
-50
DD
-100
-150
-200
-80
-100
0
1
2
3
4
5
0
1
2
3
4
5
OUTPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE
FIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
FN6301.0
June 23, 2006
3
ISL28276
Typical Performance Curves (Continued)
200
150
100
50
120
80
80
100
80
60
40
20
0
40
PHASE
40
0
0
0
-40
-80
-120
GAIN
10k
-50
-100
-150
-40
-80
-20
10
100
1k
100k
1M
1
10
100
1k
10k 100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 6. A
vs FREQUENCY @ 1kΩ LOAD
FIGURE 5. A
vs FREQUENCY @ 100kΩ LOAD
VOL
VOL
90
80
70
60
50
40
30
120
110
100
90
V
= 5VDC
S
V
= 1Vp-p
SOURCE
PSRR +
R
= 100k
Ω
L
A
= +1
V
80
70
60
PSRR -
= 5VDC
50
40
30
V
V
S
= 1Vp-p
SOURCE
20
10
R
= 100k
= +1
Ω
L
A
V
0
10
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. CMRR vs FREQUENCY
FIGURE 7. PSRR vs FREQUENCY
2.56
V
V
IN
IN
2.54
2.52
2.50
2.48
2.46
2.44
2.42
V
= 5VDC
= 0.1Vp-p
S
V
OUT
= 500Ω
V
OUT
R
L
A
= -2
V
V
= 5VDC
S
V
= 0.1Vp-p
OUT
= 500W
V
OUT
R
L
A
= +1
V
0
100
200
300
400
500
0
2
4
6
8
10 12 14 16 18 20
FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE
FN6301.0
June 23, 2006
4
ISL28276
Typical Performance Curves (Continued)
1k
100
10
10.00
1.00
0.10
0.01
1
10
100
1k
10k
100k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 12. VOLTAGE NOISE vs FREQUENCY
FIGURE 11. CURRENT NOISE vs FREQUENCY
6
5
4
3
2
1
0
V+ = 5V
V
IN
100K
VS +
100K
-
DUT
+
1K
VS -
Function
Generator
33140A
V
OUT
1µV
P-P
0
50
100
150
200
TIME (1s/DIV)
TIME (mS)
FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
FIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY
10k
1k
155
135
115
95
I +
B
100
10
1
I
I -
B
OS
75
55
35
0
1
2
3
4
5
2
2.5
3
3.5
4
4.5
5
5.5
COMMON-MODE INPUT VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 15. INPUT BIAS + OFFSET CURRENTS vs
COMMON-MODE INPUT VOLTAGE
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
FN6301.0
June 23, 2006
5
ISL28276
Typical Performance Curves (Continued)
120
150
140
130
120
110
100
90
n = 6
n = 7
110
100
90
80
70
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT vs TEMPERATURE V = ±1.2V
FIGURE 18. SUPPLY CURRENT vs TEMPERATURE V = ±2.5V
S
S
ENABLED. R = INF
L
ENABLED. R = INF
L
1400
1200
1000
800
600
400
200
0
1200
1000
800
600
400
200
0
n = 7
n = 7
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 19. I BIAS(+) vs TEMPERATURE V = ±2.5V
S
FIGURE 20. I BIAS(+) vs TEMPERATURE V = ±1.2V
S
1700
1400
n = 7
n = 7
1500
1300
1100
900
1200
1000
800
600
400
200
0
700
500
300
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 21. I BIAS(-) vs TEMPERATURE V = ±2.5V
S
FIGURE 22. I BIAS(-) vs TEMPERATURE V = ±1.2V
S
FN6301.0
June 23, 2006
6
ISL28276
Typical Performance Curves (Continued)
1200
1300
1100
900
n = 7
n = 7
1000
800
600
400
200
0
700
500
300
100
-100
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 24. INPUT OFFSET CURRENT vs TEMPERATURE
= ±1.2V
FIGURE 23. INPUT OFFSET CURRENT vs TEMPERATURE
= ±2.5V
V
V
S
S
200
150
100
50
200
150
100
50
n = 5
n = 6
0
0
-50
-50
-100
-150
-100
-150
-200
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 26. INPUT OFFSET VOLTAGE vs TEMPERATURE
= ±1.2V
FIGURE25. INPUTOFFSETVOLTAGEvsTEMPERATURE
= ±2.5V
V
V
S
S
114
112
110
108
106
104
102
130
120
110
100
90
n = 6
n = 7
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 27. CMRR vs TEMPERATURE V
= +2.5V TO -2.5V
FIGURE 28. PSRR vs TEMPERATURE V = ±1.2V TO ±2.5V
S
CM
FN6301.0
June 23, 2006
7
ISL28276
Typical Performance Curves (Continued)
2.40
n = 5
-2.32
-2.33
-2.34
-2.35
-2.36
-2.37
-2.38
-2.39
-2.4
n = 5
2.39
2.38
2.37
2.36
2.35
2.34
-40 -20
0
20
40
60
80
100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. POSITIVE V
vs TEMPERATURE R = 1k
FIGURE 30. NEGATIVE V
vs TEMPERATURE R = 1k
OUT
L
OUT
L
V
= ±2.5V
V = ±2.5V
S
S
-2.4956
-2.4958
-2.496
2.4992
2.499
n = 7
n = 7
2.4988
2.4986
2.4984
2.4982
2.498
-2.4962
-2.4964
-2.4966
-2.4968
-2.497
2.4978
2.4976
2.4974
-2.4972
-40 -20
0
20
40
60
80
100 120
-40 -20
0
20
40
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 31. POSITIVE V
vs TEMPERATURE R = 100k
FIGURE 32. NEGATIVE V
vs TEMPERATURE R = 100k
OUT L
OUT
L
V
= ±2.5V
V
= ±2.5V
S
S
0.9
0.8
0.7
0.6
0.5
14
12
10
8
n = 7
n = 5
6
4
2
0
-2
-4
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. I (EN) vs TEMPERATURE V = ±2.5V
IL
FIGURE 34. I (EN) vs TEMPERATURE V = ±2.5V
IH
S
S
FN6301.0
June 23, 2006
8
ISL28276
Typical Performance Curves (Continued)
0.16
0.15
0.14
0.13
0.12
0.11
0.1
0.18
n = 7
n = 5
0.16
0.14
0.12
0.1
0.08
-40 -20
0
20
40
60
80 100 120
-40 -20
0
20
40
60
80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 35. + SLEW RATE vs TEMPERATURE V = ±2.5V
FIGURE 36. - SLEW RATE vs TEMPERATURE V = ±2.5V
S
S
INPUT = ±0.75V A = 2
V
INPUT = ±0.75V A = 2
V
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
1
1.2
1
893mW
0.8
0.6
0.4
0.2
0
633mW
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 38. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN6301.0
June 23, 2006
9
ISL28276
Pin Descriptions
ISL28276
(16 LD QSOP) PIN NAME
EQUIVALENT
CIRCUIT
DESCRIPTION
1
2
3
4
5
6
NC
NC
No internal connection
No internal connection
Amplifier A output
OUT_A
IN-_A
IN+_A
EN_A
Circuit 3
Circuit 1
Circuit 1
Circuit 2
Amplifier A inverting input
Amplifier A non-inverting input
Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects
the enabled state.
7
8
V-
NC
Circuit 4
Negative power supply
No internal connection
No internal connection
No internal connection
9
NC
10
11
NC
EN_B
Circuit 2
Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0”
selects the enabled state.
12
13
14
15
16
IN+_B
IN-_B
OUT_B
V+
Circuit 1
Circuit 1
Circuit 3
Circuit 4
Amplifier B non-inverting input
Amplifier B inverting input
Amplifier B output
Positive power supply
No internal connection
NC
V+
V+
V+
V+
CAPACITIVELY
COUPLED
ESD CLAMP
LOGIC
PIN
OUT
V-
IN-
IN+
V-
V-
V-
CIRCUIT 1
CIRCUIT 2
CIRCUIT 3
CIRCUIT 4
amplifier. Many rail-to-rail input stages use two differential
input pairs, a long-tail PNP (or PFET) and an NPN (or
NFET). Severe penalties have to be paid for this circuit
topology. As the input signal moves from one supply rail to
another, the operational amplifier switches from one input
pair to the other causing drastic changes in input offset
voltage and an undesired change in magnitude and polarity
of input offset current.
Applications Information
Introduction
The ISL28276 is an enhanced rail-to-rail input micropower
precision operational amplifiers with an enable feature. The
part is designed to operate from single supply (2.4V to 5.0V)
or dual supply (±1.2V to ±2.5V). The device is capable of
swinging 0.5V above a 5.0V supply (0.25V for a 2.4V supply)
and to within 10mV from ground. The ISL28276 maintains
CMRR performance for input voltages greater than the
positive supply. The output operation can swing within about
3mV of the supply rails with a 100kΩ load (reference
Figures 29 through 32).
The ISL28276 achieves input rail-to-rail without sacrificing
important precision specifications and degrading distortion
performance. The devices’ input offset voltage exhibits a
smooth behavior throughout the entire common-mode input
range. The input bias current versus the common-mode
voltage range gives us an undistorted behavior from typically
10mV above the negative rail and 10% higher than the V+
rail (0.5V higher than V+ when V+ equals 5v).
Rail-to-Rail Input
The input common-mode voltage range of the ISL28276
goes from negative supply to positive supply without
introducing additional offset errors or degrading performance
associated with a conventional rail-to-rail input operational
FN6301.0
June 23, 2006
10
ISL28276
currents, components can be mounted to the PC board
Input Protection
using Teflon standoff insulators.
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. The
ISL28276 has additional back-to-back diodes across the
input terminals. If overdriving the inputs is necessary, the
external input current must never exceed 5mA. External
series resistors may be used as an external protection to
limit excessive external voltage and current from damaging
the inputs.
V+
HIGH IMPEDANCE INPUT
1/2 ISL28276
IN
FIGURE 39. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
Input Bias Current Compensation
The input bias currents of the ISL28276 are decimated down
to a typical of 500pA while maintaining an excellent
bandwidth for a micro-power operational amplifier. Inside the
ISL28276 is an input bias canceling circuit. The input stage
transistors are still biased with an adequate current for
speed but the canceling circuit sinks most of the base
current, leaving a small fraction as input bias current.
Example Application
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. The
ISL28276 (Figure 40) is used to convert the differential
thermocouple voltage into single-ended signal with 10X gain.
The ISL28276's rail-to-rail input characteristic allows the
thermocouple to be biased at ground and the converter to
run from a single 5V supply.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks
current to swing the output in the negative direction. The
PMOS sources current to swing the output in the positive
direction. The ISL28276 with a 100kΩ load will swing to
within 3mV of the supply rails.
R
4
100kΩ
R
R
10kΩ
10kΩ
3
2
V+
+
ISL28276
410µV/°C
Enable/Disable Feature
+
-
K TYPE
THERMOCOUPLE
V-
5V
The ISL28276 offers an EN pin that disables the device
when pulled up to at least 2.2V. In the disabled state (output
in a high impedance state), the part consumes typically 4µA.
By disabling the part, multiple ISL28276 parts can be
connected together as a MUX. The outputs are tied together
in parallel and a channel can be selected by the EN pin. The
EN pin also has an internal pull down. If left open, the EN pin
will pull to the negative rail and the device will be enabled by
default.
R
1
100kΩ
FIGURE 40. THERMOCOUPLE AMPLIFIER
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage of the ISL28276, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating
of the circuit board will reduce surface moisture and provide
a humidity barrier, reducing parasitic resistance on the
board. When input leakage current is a concern, the use of
guard rings around the amplifier inputs will further reduce
leakage currents. Figure 39 shows a guard ring example for
a unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to
be a specific width, but it should form a continuous loop
around both inputs. For further reduction of leakage
FN6301.0
June 23, 2006
11
ISL28276
Quarter Size Outline Plastic Packages Family (QSOP)
A
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
A
A1
A2
b
0.068
0.006
0.056
0.010
0.008
0.193
0.236
0.154
0.025
0.025
0.041
16
0.068
0.006
0.056
0.010
0.008
0.341
0.236
0.154
0.025
0.025
0.041
24
0.068
0.006
0.056
0.010
0.008
0.390
0.236
0.154
0.025
0.025
0.041
28
Max.
±0.002
±0.004
±0.002
±0.001
±0.004
±0.008
±0.004
Basic
-
-
PIN #1
I.D. MARK
E
E1
-
-
c
-
1
(N/2)
D
1, 3
B
E
-
0.010 C A B
E1
e
2, 3
e
-
H
L
±0.009
Basic
-
C
SEATING
L1
N
-
PLANE
Reference
-
0.007 C A B
b
0.004 C
Rev. E 3/01
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6301.0
June 23, 2006
12
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