ISL29020IROZ-T7 [INTERSIL]
A Low Power, High Sensitivity, Light-to Digital Sensor With I2C Interface; 低功耗，高灵敏度，光以数字传感器，带有I2C接口
| 型号： | ISL29020IROZ-T7 |
| 厂家： | 
Intersil |
| 描述： | A Low Power, High Sensitivity, Light-to Digital Sensor With I2C Interface |
| 文件： | 总11页 (文件大小：482K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL29020
®
Data Sheet
August 20, 2009
FN6505.1
A Low Power, High Sensitivity, Light-to
Digital Sensor With I C Interface
Features
2
• Low Power
- 65µA Max Operating Current
- 0.5µA Max Shutdown Current
The ISL29020 is a low power, high sensitivity, integrated light
sensor with I C (SMBus Compatible) interface. Its
2
- Software Shutdown and Automatic Shutdown
state-of-the-art photodiode array provides close-to human
eye response and good IR rejection. This ADC is capable of
rejecting 50Hz and 60Hz flicker caused by artificial light
sources. The lux range select feature allows the user to
program the lux range for optimized counts/lux.
• Ideal Spectral Response
- Close to Human Eye Response
- Excellent IR and UV Rejection
• Easy to Use
In normal operation, typical power consumption 55µA. In
order to further minimize power consumption, two
- Simple Output Code Directly Proportional to lux
- I C (SMBus Compatible) Output
2
power-down modes have been provided. If polling is chosen
over continuous measurement of light, the auto-power-down
function shuts down the whole chip after each ADC
conversion for the measurement. The other power-down
- No Complex Algorithms Needed
- Variable Conversion Resolution up to 16-bits
- Adjustable Sensitivity up to 65 Counts per lux
- Works Under Various Light Sources, Including Sunlight
2
2
mode is controlled by software via the I C interface. The
- Selectable Range (via I C)
power consumption can be reduced to less than 1µA when
powered down.
- Range 1 = 0.015 lux to 1,000 lux
- Range 2 = 0.06 lux to 4,000 lux
- Range 3 = 0.24 lux to 16,000 lux
- Range 4 = 0.96 lux to 64,000 lux
- Temperature Compensated
2
Designed to operate on supplies from 2.25V to 3.3V with I C
supply from 1.7V to 3.6V, the ISL29020 is specified for
operation over the -40°C to +85°C ambient temperature range.
- Integrated 50/60Hz Noise Rejection
Ordering Information
• Small Form Factor
- 2.0mmx2.1mmx0.7mm 6 Ld ODFN Package
PART NUMBER
(Note)
PACKAGE
(Pb-Free)
PKG.
DWG. #
• Additional Features
- I C and SMBus Compatible
- 1.7V to 3.6V Supply for I C Interface
- 2.25V to 3.3V Supply
- Address Selection Pin
ISL29020IROZ-T7*
6 Ld ODFN
L6.2x2.1
2
ISL29020IROZ-EVALZ
Evaluation Board (Pb-free)
2
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and NiPdAu plate - e4 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
• Pb-Free (RoHS compliant)
Applications
• Display and keypad dimming for:
- Mobile devices: smart phone, PDA, GPS
- Computing devices: notebook PC, webpad
- Consumer devices: LCD-TV, digital picture frame, digital
camera
Block Diagram
VDD
1
• Industrial and medical light sensing
PHOTODIODE
ARRAY
COMMAND
REGISTER
Pinout
LIGHT
DATA
PROCESS
INTEGRATING
ADC
DATA
REGISTER
ISL29020
(6 LD ODFN)
TOP VIEW
5
6
SCL
SDA
2
EXT
TIMING
I C/SMBus
IREF
f
OSC
VDD
GND
1
2
3
6
5
4
SDA
SCL
16
2
COUNTER
3
2
4
A0
REXT
GND
ISL29020
A
0
REXT
*EXPOSED PAD CAN BE CONNECTED TO GND OR
ELECTRICALLY ISOLATED
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2008, 2009. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL29020
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
V
Supply Voltage between V
and GND . . . . . . . . . . . . . 3.6V
Thermal Resistance
θ
JA
(°C/W)
88
DD
DD
2
I C Bus Pin Voltage (SCL, SDA) . . . . . . . . . . . . . . . . . -0.2V to 3.6V
6 Ld ODFN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
I C Bus Pin Current (SCL, SDA) . . . . . . . . . . . . . . . . . . . . . . <10mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +90°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +100°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
REXT, A0 Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . -0.2V to V
ESD Rating
DD
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
J
C
A
Electrical Specifications
V
= 3V, T = +25°C, R
A
= 500kΩ 1% tolerance, 16-bit ADC operation, unless otherwise specified.
DD
EXT
PARAMETER
DESCRIPTION
Power Supply Range
CONDITION
MIN
TYP
MAX UNIT
V
2.25
3.3
65
V
µA
DD
I
I
Supply Current
55
DD
Supply Current when Powered Down
Software disabled or auto power-down
0.01
0.5
3.6
800
µA
DD1
2
2
V
Supply Voltage Range for I C Interface
1.7
V
I C
f
t
Internal Oscillator Frequency
650
725
90
kHz
ms
OSC
ADC Integration/Conversion Time
16-bit ADC data
int
2
2
F
I C Clock Rate Range
1 to 400
1
kHz
Counts
I C
DATA_0
DATA_F
Count Output When Dark
Full Scale ADC Code
E = 0 lux, Range 1 (1k lux)
5
65535 Counts
%
ΔDATA
DATA
Count Output Variation Over Three Light Ambient light sensing
Sources: Fluorescent, Incandescent
and Sunlight
±10
DATA_1
DATA_2
DATA_3
DATA_4
Light Count Output With LSB of
0.015 lux/count
E = 300 lux, Fluorescent light (Note 1), Ambient light
sensing, Range 1 (1k lux)
15000 20000 25000 Counts
Light Count Output With LSB of
0.06 lux/count
E = 300 lux, Fluorescent light (Note 1), Ambient light
sensing, Range 2 (4k lux)
5000
1250
312
Counts
Counts
Counts
Light Count Output With LSB of
0.24 lux/count
E = 300 lux, Fluorescent light (Note 1), Ambient light
sensing, Range 3 (16k lux)
Light Count Output With LSB of
0.96 lux/count
E = 300 lux, Fluorescent light (Note 1), Ambient light
sensing, Range 4 (64k lux)
DATA_IR1
DATA_IR2
DATA_IR3
DATA_IR4
Infrared Count Output
Infrared Count Output
Infrared Count Output
Infrared Count Output
E = 210 lux, Sunlight (Note 2), IR sensing, Range 1
E = 210 lux, Sunlight (Note 2), IR sensing, Range 2
E = 210 lux, Sunlight (Note 2), IR sensing, Range 3
E = 210 lux, Sunlight (Note 2), IR sensing, Range 4
15000 20000 25000
5000
1250
312
V
V
V
Voltage of R
EXT
Pin
0.52
V
V
REF
IL
SCL and SDA Input Low Voltage
SCL and SDA Input High Voltage
SDA Current Sinking Capability
0.55
1.25
V
IH
I
4
5
mA
SDA
NOTES:
1. 550nm green LED is used in production test. The 550nm LED irradiance is calibrated to produce the same DATA count against an illuminance
level of 300 lux fluorscent light.
2. 850nm green LED is used in production test. The 850nm LED irradiance is calibrated to produce the same DATA_IR count against an illuminance
level of 210 lux sunlight at sea level.
FN6505.1
August 20, 2009
2
ISL29020
Pin Descriptions
PIN NUMBER
PIN NAME
DESCRIPTION
1
2
3
4
5
6
VDD
GND
REXT
Positive supply; connect this pin to a 2.25V to 3.3V supply.
Ground pin.
External resistor pin for ADC reference; connect this pin to ground through a (nominal) 500kΩ resistor.
2
A
Bit 0 of I C address; ground or tie this pin to VDD. No floating.
0
2
2
SCL
SDA
I C serial clock
The I C bus lines can be pulled from 1.7V to above V , 3.6V max.
DD
2
I C serial data
Figure 1 shows a sample one-byte read. Figure 2 shows a
sample one-byte write. Figure 3 shows a sync_I C timing
Principles of Operation
2
Photodiodes and ADC
diagram sample for externally controlled integration time. The
2
The ISL29020 contains two photodiode arrays which convert
light into current. The spectral response for ambient light
sensing and IR sensing is shown in Figure 8 in the “Typical
Performance Curves” on page 9. After light is converted to
current during the light signal process, the current output is
converted to digital by a single built-in 16-bit Analog-to-Digital
I C bus master always drives the SCL (clock) line, while either
the master or the slave can drive the SDA (data) line. Every
2
I C transaction begins with the master asserting a start
condition (SDA falling while SCL remains high). The following
byte is driven by the master, and includes the slave address
and read/write bit. The receiving device is responsible for
pulling SDA low during the acknowledgement period. Every
2
Converter (ADC). An I C command reads the ambient light or
2
IR intensity in counts.
I C transaction ends with the master asserting a stop
condition (SDA rising while SCL remains high).
The converter is a charge-balancing integrating type 16-bit
ADC. The chosen method for conversion is best for converting
small current signals in the presence of an AC periodic noise. A
100ms integration time, for instance, highly rejects 50Hz and
60Hz power line noise simultaneously. See “Integration Time or
Conversion Time” on page 6 and “Noise Rejection” on page 7.
2
For more information about the I C standard, please consult
® 2
the Philips I C specification documents.
Low-Power Operation
The ISL29020 initial operation is at the power-down mode
after a supply voltage is provided. The data registers contain
the default value of 0. When the ISL29020 receives an I C
2
The built-in ADC offers user flexibility in integration time or
conversion time. There are two timing modes: Internal Timing
Mode and External Timing Mode. In Internal Timing Mode,
2
command to do a one-time measurement from an I C
master, it will start light sensing and ADC conversion. It will
go to the power-down mode automatically after one
conversion is finished and keep the conversion data
available for the master to fetch anytime afterwards. The
ISL29020 will continuously do light sensing and ADC
integration time is determined by an internal oscillator (f
),
OSC
and the n-bit (n = 4, 8, 12,16) counter inside the ADC. In
External Timing Mode, integration time is determined by the
2
time between two consecutive I C External Timing Mode
2
commands. See “External Timing Mode” on page 6. A good
balancing act of integration time and resolution depending on
the application is required for optimal results.
conversion if it receives an I C command of continuous
measurement. It will continuously update the data registers
with the latest conversion data. It will go to the power-down
2
2
mode after it receives the I C command of power-down.
The ADC has I C programmable ranges to dynamically
accommodate various lighting conditions. For very dim
conditions, the ADC can be configured at its lower range
(Range 1). For bright conditions, the ADC can be configured
at its higher range (Range 2).
2
I C Interface
There are three 8-bit registers available inside the ISL29020.
The command register defines the operation of the device.
The command register does not change until the register is
overwritten. The two data registers are Read-Only for 16-bit
ADC output or timer output. The data registers contain the
ADC's or timer’s latest digital output.
2
The ISL29020’s I C interface slave address can be selected
as 1000100 or 1000101 by connecting A0 pin to GND or
VDD, respectively. When 1000100x or 1000101x with x as R
or W is sent after the Start condition, this device compares
the first seven bits of this byte to its address and matches.
FN6505.1
August 20, 2009
3
ISL29020
2
I C DATA START
DEVICE ADDRESS
A
A
A
9
REGISTER ADDRESS
DEVICE ADDRESS
A6 A5 A4 A3 A2 A1 A0
SDA DRIVEN BY MASTER
A
A
DATA BYTE0
W
STOP START
2
I C SDA IN
A6 A5 A4 A3 A2 A1 A0 W
SDA DRIVEN BY MASTER
R7 R6 R5 R4 R3 R2 R1 R0
SDA DRIVEN BY MASTER
A
A
9
W
SDA DRIVEN BY ISL29020
2
I C SDA OUT
A D7 D6 D5 D4 D3 D2 D1 D0
I2C CLK
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
2
FIGURE 1. I C READ TIMING DIAGRAM SAMPLE
2
I C DATA
START
DEVICE ADDRESS
W
W
A
A
A
REGISTER ADDRESS
A
FUNCTIONS
A
STOP
2
I C SDA IN
A6 A5 A4 A3 A2 A1 A0
SDA DRIVEN BY MASTER
R7 R6 R5 R4 R3 R2 R1 R0
SDA DRIVEN BY MASTER
A
B7 B6 B5 B4 B3 B2 B1 B0
SDA DRIVEN BY MASTER
A
2
I C SDA OUT
A
9
A
2
I C CLK IN
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
2
FIGURE 2. I C WRITE TIMING DIAGRAM SAMPLE
2
I C DATA
START
DEVICE ADDRESS
W
W
A
A
A
REGISTER ADDRESS
A
STOP
2
I C SDA IN
A 6 A5
A4 A3
A2
A1 A0
R7 R6
R5
R4 R3
R2
R1
R0
A
2
I C SDA OUT
SDA DRIVEN BY MASTER
SDA DRIVEN BY MASTER
A
2
I C CLK IN
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
2
2
FIGURE 3. I C SYNC_I C TIMING DIAGRAM SAMPLE
FN6505.1
August 20, 2009
4
ISL29020
Register Set
There are three 8-bit registers in the ISL29020. Table 1 summarizes their functions.
TABLE 1. REGISTER SET
BIT
ADDR REG NAME
7
6
5
4
3
2
1
RANGE1
D1
0
RANGE0
D0
DEFAULT
00h
00h
01h
02h
COMMAND
EN
D7
MODE
D6
LIGHT
D5
RES2
D4
RES1
D3
RES0
D2
DATA
00h
LSB
DATA
D15
D14
D13
D12
D11
D10
D9
D8
00h
MSB
4. Timing Mode and Resolution: Bits 4, 3 and 2. These three
bits determine whether the integration time is done
internally or externally, and the number of bits for ADC. In
Internal Timing Mode, integration time is determined by
TABLE 2. WRITE ONLY REGISTERS
ADDRESS
NAME
FUNCTIONS/DESCRIPTION
2
b1xxx_xxxx
sync_I C
Writing a logic 1 to this address bit
ends the current ADC-integration
and starts another. Used only with
External Timing Mode.
an internal oscillator (f
) and the n-bit (n = 4, 8, 12, 16)
OSC
counter inside the ADC. In External Timing Mode, the
integration time is determined by the time between two
2
consecutive sync_I C pulse commands.
Command Register (00 hex)
TABLE 6. TIMING MODE AND RESOLUTION
The Read/Write command register has five functions:
BITS 4:3:2
0:0:0
MODE
Internal Timing, 16-bit ADC data output
Internal Timing, 12-bit ADC data output
Internal Timing, 8-bit ADC data output
Internal Timing, 4-bit ADC data output
External Timing, ADC data output
External Timing, Timer data output
Reserved
1. Enable: Bit 7. This bit enables the ISL29020 with logic 1
and powers down ISL29020 with logic 0.
0:0:1
TABLE 3. ENABLE
0:1:0
BIT 7
OPERATION
Power-down the device
Enable the device
0:1:1
0
1
1:0:0
1:0:1
1:1:0
2. Measurement Mode: Bit 6. This bit controls the two
measurement modes of the device. A logic 0 puts the
device in the one-time measurement mode in which the
device is automatically shut-down after each
measurement. A logic 1 puts the device in the continuous
measurement mode in which data is collected
continuously.
1:1:1
Reserved
With Bit 4 set to 0, the device is configured to run in the
Internal-Timing mode. For example, the command register
content should be 1xx000xx to request 16-bit ADC in the
internal-timing mode.
With Bit 4 set to 1, the device is configured to run in the
External-Timing mode. For the external timing, the command
1xx101xx needs to be sent to request the Timer data, the
number of clock cycles counted within the duration between
the two sync pulses (refer to Table 2). The Timer count is
read from register 01h (LSB) and 02h (MSB). The command
1xx100xx needs to be sent to request the ADC conversion.
The ADC data is also read from register 01h (LSB) and 02h
(MSB).
TABLE 4. MEASUREMENT MODE
BIT 6
OPERATION
One-time measurement
Continuous measurement
0
1
3. Light Sensing: Bit 5. This bit programs the device to do the
ambient light or the infrared (IR) light sensing. A logic 0,
requests for the ambient light sensing and a logic 1
requests for the IR sensing.
Bits 3 and 2 determine the number of clock cycles per
conversion in the Internal-Timing mode. Changing the
number of clock cycles does more than just change the
resolution of the device. It also changes the integration
time, which the ADC uses to sample the photodiode
current signal for a measurement.
TABLE 5. LIGHT SENSING
BIT 5
OPERATION
Ambient light sensing
0
1
Infrared light sensing
FN6505.1
August 20, 2009
5
ISL29020
.
Here, n = 4, 8, 12 or 16. This is the number of ADC bits
programmed in the command register. 2 represents the
maximum number of counts possible from the ADC output in
Internal-Timing mode. Data is the ADC output stored in the
data registers (01 hex and 02 hex).
TABLE 7. RESOLUTION/WIDTH
n
BITS 3:2
0:0
NUMBER OF CLOCK CYCLES
16
2
2
= 65,536
= 4,096
12
8
0:1
1:0
2 = 256
EXTERNAL TIMING MODE
4
(EQ. 4)
Range(k)
Timer
1:1
2 = 16
---------------------------
E =
× DATA
5. Range: Bits 1 and 0. The Full Scale Range (FSR) can be
Here, Timer sets up the ADC’s maximum count reading and
it is the number of clock cycles accrued in the integration
time (set by sync_I C pulses) in External-Timing mode. It is
2
adjusted via I C using Bits 1 and 0. Table 8 lists the
2
possible values of FSR for the 500kΩ R
resistor.
EXT
TABLE 8. RANGE/FSR LUX
stored in the data registers 01h and 02h when the command
is coded as 1xx101xx. Data is the ADC output. In this mode,
the command has to be sent out again with code 1xx100xx
to request the ADC output data from registers 01h and 02h.
BITS
FSR (LUX) @
ALS SENSING
FSR (LUX) @ IR
SENSING
1:0
0:0
0:1
1:0
1:1
k
1
2
3
4
RANGE(k)
Range1
Range2
Range3
Range4
1,000
4,000
Refer to page 2
Refer to page 2
Refer to page 2
Refer to page 2
External Scaling Resistor R
Range
for f and
OSC
EXT
16,000
64,000
The ISL29020 uses an external resistor R
to fix its
EXT
and the light sensing
internal oscillator frequency, f
OSC
and Range are inversely proportional to
range, Range. f
OSC
. For user simplicity, the proportionality constant is
Data Registers (01 hex and 02 hex)
R
EXT
The device has two 8-bit read-only registers to hold a 16-bit
data from ADC or Timer. The most significant byte is
accessed at 02 hex, and the least significant byte is
accessed at 01 hex. The registers are refreshed after every
conversion cycle.
referenced to 500kΩ:
500kΩ
(EQ. 5)
(EQ. 6)
-----------------
Range =
× Range(k)
R
EXT
500kΩ
-----------------
f
=
× 725kHz
OSC
R
EXT
TABLE 9. DATA REGISTERS
Integration Time or Conversion Time
ADDRESS
Integration time is the period during which the device’s
analog-to-digital ADC converter samples the photodiode
current signal for a measurement. Integration time, in other
words, is the time to complete the conversion of analog
photodiode current into a digital signal (number of counts).
(hex)
01
CONTENTS
Least-significant byte of most recent ADC or Timer data.
Most-significant byte of most recent ADC or Timer data.
02
Calculating Lux
Integration time affects the measurement resolution. For
better resolution, use a longer integration time. For short and
fast conversions, use a shorter integration time.
The ISL29020’s ADC output codes, DATA, are directly
proportional to lux in the ambient light sensing, as shown in
Equation 1.
The ISL29020 offers user flexibility in the integration time to
balance resolution, speed and noise rejection. Integration time
can be set internally or externally by programming the bit 4 of
the command register 00(hex).
(EQ. 1)
E
= α × DATA
cal
Here, E is the calculated lux reading. The constant α is
cal
determined by the Full Scale Range and the ADC’s
maximum output counts. The constant can also be viewed
as the sensitivity: the smallest lux measurement the device
can measure, as shown in Equation 2.
INTEGRATION TIME IN INTERNAL-TIMING MODE
Most applications will use the Internal-Timing mode. In this
mode, f
and ADC n-bits resolution determine the
OSC
(EQ. 2)
Range(k)
----------------------------
α =
integration time, t as shown in Equation 7.
int,
Count
max
R
(EQ. 7)
n
n
1
EXT
-------------
---------------------------------------------
t
= 2
×
= 2
×
int
f
725kHz × 500kΩ
Here, Range(k) is defined in Table 8. Count
maximum output counts from the ADC.
is the
OSC
max
where n is the number of bits of resolution and n = 4, 8, 12 or
n
The transfer function used for each timing mode becomes:
16. 2 , therefore, is the number of clock cycles. n can be
programmed at the command register 00(hex) bits 3 and 2.
INTERNAL TIMING MODE
(EQ. 3)
Range(k)
---------------------------
E =
× DATA
n
2
FN6505.1
August 20, 2009
6
ISL29020
a window lens design. The bigger the diameter of the
TABLE 10. INTEGRATION TIME OF n-BIT ADC
window lens, the wider the viewing angle is of the ISL29020.
Table 11 shows the recommended dimensions of the optical
window to ensure both 35° and 45° viewing angle. These
dimensions are based on a window lens thickness of 1.0mm
and a refractive index of 1.59.
R
(kΩ)
EXT
n = 16-BIT
50ms
n = 12-BIT
3.2ms
n = 8-BIT
200µs
n = 4-BIT
12.5µs
24µs
250
500**
1000
1500
2000
100ms
200ms
300ms
400ms
6.25ms
390µs
WINDOW LENS
12.5ms
782µs
49µs
18.8ms
1.17ms
1.56ms
73µs
25ms
98µs
t
D
**Recommended R
resistor value
TOTAL
EXT
∅
D1
INTEGRATION TIME IN EXTERNAL TIMING MODE
The External Timing Mode is recommended when the
integration time is needed to synchronize to an external
signal, such as a PWM to eliminate noise.
ISL29020
D
LENS
2
The synchronization can be implemented by using I C sync
2
DATA
command. The 1st I C sync command starts the conversion.
E =
x 1000
16
∅ = VIEWING ANGLE
2
The 2nd completes the conversion then starts over again to
FIGURE 4. FLAT WINDOW LENS
commence the next conversion. The integration time, t , is
int
the time interval between the two sync pulses:
Timer
TABLE 11. RECOMMENDED DIMENSIONS FOR A FLAT
WINDOW DESIGN
----------------
t
=
(EQ. 8)
int
f
OSC
D
@ 35°
D
@ 45°
LENS
LENS
VIEWING ANGLE VIEWING ANGLE
D
D1
where Timer is the number of internal clock cycles obtained
TOTAL
from data registers and f
is the internal oscillator frequency.
OSC
1.5
0.50
2.25
3.00
3.75
4.30
5.00
3.75
4.75
5.75
6.75
7.75
The internal oscillator, f
, operates identically in both the
2.0
2.5
3.0
3.5
1.00
OSC
internal and external timing modes. However, in External
1.50
2.00
Timing Mode, the number of clock cycles per integration is no
n
longer fixed at 2 . The number of clock cycles varies with the
16
chosen integration time, and is limited to 2 = 65,536. In order
2.50
to avoid erroneous readings the integration time must be short
enough not to allow an overflow in the counter register.
t = 1
D1
D
Thickness of lens
Distance between ISL29020 and inner edge of lens
Diameter of lens
Distance constraint between the ISL29020 and lens
outer edge
65,535
(EQ. 9)
-----------------
t
<
LENS
int
f
D
OSC
TOTAL
Noise Rejection
* All dimensions are in mm.
In general, integrating type ADCs have excellent
noise-rejection characteristics for periodic noise sources
whose frequency is an integer multiple of the conversion
rate. For instance, a 60Hz AC unwanted signal’s sum from
Window with Light Guide Design
If a smaller window is desired while maintaining a wide
effective viewing angle of the ISL29020, a cylindrical piece of
transparent plastic is needed to trap the light and then focus
and guide the light onto the device. Hence, the name light
guide or also known as light pipe. The pipe should be placed
directly on top of the device with a distance of D1 = 0.5mm
to achieve peak performance. The light pipe should have
minimum of 1.5mm in diameter to ensure that whole area of
the sensor will be exposed. See Figure 5.
0ms to k*16.66ms (k = 1,2...k ) is zero. Similarly, setting the
i
device’s integration time to be an integer multiple of the
periodic noise signal, greatly improves the light sensor
output signal in the presence of noise.
Optical Design
Flat Window Lens Design
A window lens will surely limit the viewing angle of the
ISL29020. The window lens should be placed directly on top
of the device. The thickness of the lens should be kept at
minimum to minimize loss of power due to reflection and
also to minimize loss due to absorption of energy in the
plastic material. A thickness of t = 1mm is recommended for
FN6505.1
August 20, 2009
7
ISL29020
D
LENS
D
> 1.5mm
2
LIGHT PIPE
t
D
LENS
D
2
L
ISL29020
FIGURE 5. WINDOW WITH LIGHT GUIDE/PIPE
Suggested PCB Footprint
Typical Circuit
It is important that the users check the “Surface Mount
Assembly Guidelines for Optical Dual FlatPack No Lead
(ODFN) Package” before starting ODFN product board
mounting.
A typical application for the ISL29020 is shown in Figure 6.
2
The ISL29020’s I C address is hardwired as 1000100. The
2
device can be tied onto a system’s I C bus together with
2
other I C compliant devices.
http://www.intersil.com/data/tb/TB477.pdf
Soldering Considerations
Convection heating is recommended for reflow soldering;
direct-infrared heating is not recommended. The plastic
ODFN package does not require a custom reflow soldering
profile, and is qualified to +260°C. A standard reflow soldering
profile with a +260°C maximum is recommended.
Layout Considerations
The ISL29020 is relatively insensitive to layout. Like other
2
I C devices, it is intended to provide excellent performance
even in significantly noisy environments. There are only a
few considerations that will ensure best performance.
2
Route the supply and I C traces as far as possible from all
sources of noise. Use one 0.01µF power-supply decoupling
capacitor, placed close to the device.
1.7V TO 3.6V
2
C MASTER
I
R2
10k
R1
Ω
10k
Ω
MICROCONTROLLER
SDA
SCL
2.25V TO 3.3V
2
2
2
I
C SLAVE_0
I
C SLAVE_1
I
C SLAVE_n
1
2
3
6
5
4
SDA
SDA
VDD
SDA
SCL
SCL
SCL
GND
REXT
C1
0.01µF
A
0
REXT
500k
ISL29020
FIGURE 6. ISL29020 TYPICAL CIRCUIT
FN6505.1
August 20, 2009
8
ISL29020
Typical Performance Curves (V = 3V, R
= 500kΩ)
DD
EXT
1.2
1.2
1.0
0.8
0.6
0.4
0.2
0
HUMAN EYE
1.0
SUN
0.8
HALOGEN
0.6
0.4
0.2
0
INCANDESCENT
FLUORESCENT
IR SENSING
AMBIENT LIGHT SENSING
-0.2
300 400 500 600 700 800 900 1000 1100
WAVELENGTH (nm)
300 400 500 600 700 800 900 1000 1100
WAVELENGTH (nm)
FIGURE 7. SPECTRAL RESPONSE OF LIGHT SOURCES
FIGURE 8. SPECTRAL RESPONSE FOR AMBIENT LIGHT
SENSING AND IR SENSING
1000
900
800
700
600
500
400
300
200
100
0
65535
32768
0
ALS SENSING
RANGE 1 (1k Lux)
16-BIT ADC
INCANDESCENT
RADIATION PATTERN
0°
10°
10°
20°
20°
LUMINOSITY
ANGLE
HALOGEN
30°
30°
40°
40°
50°
50°
60°
70°
80°
60°
70°
80°
90°
FLUORESCENT
1000 LUX
x DATA
E
=
cal
16
2
90°
1.0
0
100 200 300 400 500 600 700 800 900 1000
0.2 0.4
RELATIVE SENSITIVITY
0.6 0.8
LUX METER READING (LUX)
FIGURE 9. RADIATION PATTERN
FIGURE 10. SENSITIVITY TO THREE LIGHT SOURCES
1.10
10
0 lux
300 Lux FLUORESCENT LIGHT
ALS SENSING
8
6
4
2
0
RANGE 1 (1k Lux)
1.05
1.00
0.95
0.90
-60
-20
20
60
100
-60
-20
20
60
100
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 11. OUTPUT CODE FOR 0 LUX vs TEMPERATURE
FIGURE 12. OUTPUT CODE vs TEMPERATURE
FN6505.1
August 20, 2009
9
ISL29020
Typical Performance Curves (V = 3V, R
= 500kΩ) (Continued)
EXT
DD
55
V
= 2.25V
DD
50
45
40
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 13. SUPPLY CURRENT vs TEMPERATURE
2.10
6
5
4
1
0.23
2.00
2
3
0.59
0.34
FIGURE 14. SENSOR LOCATION OUTLINE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6505.1
August 20, 2009
10
ISL29020
Package Outline Drawing
L6.2x2.1
6 LEAD OPTICAL DUAL FLAT NO-LEAD PLASTIC PACKAGE (ODFN)
Rev 0, 9/06
2.10
A
6
PIN 1
INDEX AREA
B
1
6
PIN 1
INDEX AREA
0.65
1 . 30 REF
1 . 35
(4X)
0.10
6X 0 . 30 ± 0 . 05
0 . 65
TOP VIEW
0.10 M C A B
6X 0 . 35 ± 0 . 05
BOTTOM VIEW
(0 . 65)
MAX 0.75
SEE DETAIL "X"
C
0.10
(0 . 65)
(1 . 35)
C
BASE PLANE
SEATING PLANE
0.08
( 6X 0 . 30 )
SIDE VIEW
C
( 6X 0 . 55 )
5
0 . 2 REF
C
(1 . 95)
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
FN6505.1
August 20, 2009
11
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