ISL3084 [INTERSIL]

5GHz VCO; 5GHz的VCO
ISL3084
型号: ISL3084
厂家: Intersil    Intersil
描述:

5GHz VCO
5GHz的VCO

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中文:  中文翻译
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ISL3084  
®
Data Sheet  
May 2003  
FN5042.3  
5GHz VCO  
Features  
• Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 3.3V  
The ISL3084 is a 5GHz SiGe  
monolithic VCO circuit designed to  
simplify and reduce the cost and size  
of miniature wireless transceivers.  
• Frequency . . . . . . . . . . . . . . . . . . . . . . . . . 4.9GHz typical  
• Fully Integrated/No External Varactors or Resonators  
Required  
A fully integrated VCO requiring no external elements such  
as inductors and varactors greatly simplifies low cost local  
oscillator synthesized applications.  
• Isolation Output Buffer/Reduced Load Pulling  
• Differential Design/Reduced Spurs  
• Digitally Controlled Power Down Mode  
• QFN Package:  
Included in this differential design is a low-power standby  
function and a stable process and temperature biasing  
operation.  
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat  
No Leads - Package Outline  
The ISL3084 is housed in a 16 lead QFN package  
well-suited for PCMCIA and miniPCI board applications.  
- Near Chip Scale Package footprint, which improves  
PCB efficiency and has a thinner profile  
Applications  
Pinout  
ISL3084 (QFN)  
• Systems Targeting IEEE802.11b, 11Mbps Standard  
• Only required VCO function for Intersil PRISM3 chip set  
• WLAN Applications.  
TOP VIEW  
• PCMCIA Wireless Transceivers  
• TDMA Packet Protocol Radios  
16  
15  
14  
13  
VTUNE  
VCC  
1
2
3
4
12 VCC  
Simplified Block Diagram  
VCC  
VCC  
VCC  
11  
OSC+  
OSC+  
OSC-  
VCO  
VTUNE  
PE  
10  
9
GND  
OSC-  
GND  
BIAS  
GND  
GND  
GND  
o
GND  
8
5
6
7
Ordering Information  
PART NUMBER TEMP. RANGE ( C) PACKAGE PKG. NO.  
ISL3084IR  
-40 to 85  
-40 to 85  
16 Ld QFN  
L16.4x4  
ISL3084IR-TK  
Tape and Reel  
Pin Descriptions  
PIN NUMBER  
NAME  
DESCRIPTION  
1
VTUNE  
Input tuning voltage from loop filter. Sensitivity to external injected noise to KVCO. Careful noise-free  
layout recommended.  
2, 6, 12  
VCC  
Supply pins. Requires high quality capacitor RF decoupling. Phase noise behavior proportional to supply  
pushing specifications. Use good quality, low-frequency decoupling/filtering techniques.  
5
PE  
Power enable control pin: VCO enabled high.  
10  
11  
OSC-  
OSC+  
Differential VCO output. Terminate into 100differential impedance. Terminate one end into 50when  
single end output with equivalent loss of power.  
15  
16  
FILTER CAP1  
FILTER CAP2  
GND  
Use high quality .68µF filter capacitor to ground.  
Use high quality .68µF filter capacitor to VCC.  
Ground  
3, 4, 7, 8, 9, 13, 14  
Paddle  
N/A  
Floating paddle. Grounding is recommended.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
1
Copyright © Intersil Americas Inc. 2003. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.  
PRISM® is a registered trademark of Intersil Americas Inc. PRISM and design is a trademark of Intersil Americas Inc.  
ISL3084  
Absolute Maximum Ratings  
Thermal Information  
o
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V  
Voltage on Any Other Pin . . . . . . . . . . . . . . . . . . -0.3 to V +0.3V  
Thermal Resistance (Typical, Note 1)  
θ
( C/W)  
JA  
CC  
Decouple . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V  
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
Junction Temperature (Plastic Package) . . . . . . . . . .  
47  
o
V
to V  
CC  
CC  
150 C  
o
o
Any GND to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V  
Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C  
For recommended soldering conditions see Tech Brief TB389.  
Operating Conditions  
o
o
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . .-40 to 85 C  
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 3.3V  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See  
JA  
Tech Brief TB379.  
o
TA = 25 C  
General DC Electrical Specifications  
PARAMETER  
MIN  
TYP  
MAX  
3.0  
20  
100  
-
UNITS  
V
Supply Voltage  
2.7  
-
-
Supply Current @ 3.3V  
-
-
-
-
-
mA  
µA  
µs  
Power Down Supply Current  
Power Up Time, Filtering dependent  
Power Down Time  
-
50  
-
1
µs  
CMOS Low-Level Input Voltage  
CMOS High-Level Input Voltage  
CMOS High- or Low-Level Input Current  
-
V
0.3*VCC  
-
0.7*V  
-
V
CC  
-10  
-
10  
µA  
o
AC Electrical Specifications  
PARAMETER  
VCC = 2.7 to 3.3V, Vtune operation from 0.5 to 2.2V, TA = 25 C  
TEST CONDITIONS  
MIN  
TYP  
4.67  
4.92  
5.19  
40  
MAX  
UNITS  
GHz  
RF Frequency Ranges  
Vtune = 0.5V  
Vtune = 1.35V  
Vtune = 2.2V  
-
-
4.79  
-
GHz  
5.0  
-
-
GHz  
o
Tuning Voltage Temperature Coefficient Vtune = 1.35V, -40 to 85 C  
-
MHz  
Tuning Pin Input Leakage  
VCO Gain  
Vtune = 2.0V  
Vtune = 1.35V  
-
-
2
µA  
250  
-
300  
20  
350  
MHz/V  
MHz/V  
dBc/Hz  
dBc/Hz  
dB  
o
VCO Gain Temperature Coefficient  
Phase Noise  
Vtune = 1.35V, -40 to 85 C  
Offset 10kHz  
-
-
65  
-
70  
Offset 100kHz  
95  
-
o
Phase Noise Temperature Coefficient  
Integrated Phase Noise @ 5GHz.  
Output Power  
Offset @ 10kHz, 0 to 85 C  
-
1
4
10kHz to 1MHz  
-
1.6  
-4  
deg_rms  
dBm  
Differential into 100Ω  
VCC = 2.7V–3.3V, across Vtune range  
VSWR = 2:1  
-9  
-3  
-
Supply Pushing  
+2  
+10  
MHz  
Load Pulling  
1.8  
MHz  
Output VSWR  
2:1 BALUM  
-
1.3:1  
-
2
ISL3084  
Typical Application  
1000P  
WELL FILTERED VCC  
3.9PF  
.68  
.68  
PLL  
LO_OUT  
2:1  
3.3PF  
VCC  
OSC+  
OSC-  
LOOP FILTER  
VTUNE  
VCC  
BALUM  
GND  
GND  
GND  
3.3PF  
POWER ENABLE  
3
ISL3084  
Quad Flat No-Lead Plastic Package (QFN)  
Micro Lead Frame Plastic Package (MLFP)  
L16.4x4  
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE  
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)  
MILLIMETERS  
SYMBOL  
MIN  
NOMINAL  
MAX  
1.00  
0.05  
1.00  
NOTES  
A
A1  
A2  
A3  
b
0.80  
0.90  
-
-
-
-
-
-
9
0.20 REF  
9
0.23  
1.95  
1.95  
0.28  
0.38  
2.25  
2.25  
5, 8  
D
4.00 BSC  
-
D1  
D2  
E
3.75 BSC  
9
2.10  
7, 8  
4.00 BSC  
-
E1  
E2  
e
3.75 BSC  
9
2.10  
7, 8  
0.65 BSC  
-
k
0.25  
0.35  
-
-
-
-
L
0.60  
0.75  
0.15  
8
L1  
N
-
16  
4
4
-
10  
2
Nd  
Ne  
P
3
3
-
-
0.60  
12  
9
θ
-
9
Rev. 4 10/02  
NOTES:  
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.  
2. N is the number of terminals.  
3. Nd and Ne refer to the number of terminals on each D and E.  
4. All dimensions are in millimeters. Angles are in degrees.  
5. Dimension b applies to the metallized terminal and is measured  
between 0.15mm and 0.30mm from the terminal tip.  
6. The configuration of the pin #1 identifier is optional, but must be  
located within the zone indicated. The pin #1 identifier may be  
either a mold or mark feature.  
7. Dimensions D2 and E2 are for the exposed pads which provide  
improved electrical and thermal performance.  
8. Nominal dimensionsare provided toassistwith PCBLandPattern  
Design efforts, see Intersil Technical Brief TB389.  
9. Features and dimensions A2, A3, D1, E1, P & θ are present when  
Anvil singulation method is used and not present for saw  
singulation.  
10. Depending on the method of lead termination at the edge of the  
package, a maximum 0.15mm pull back (L1) maybe present. L  
minus L1 to be equal to or greater than 0.3mm.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
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