ISL31496E [INTERSIL]
±60V Fault Protected, 5V, RS-485/RS-422 Transceivers with ±25V Common Mode Range; 为± 60V故障保护， 5V ， RS - 485 / RS - 422收发器，具有± 25V共模范围
| 型号： | ISL31496E |
| 厂家： | 
Intersil |
| 描述： | ±60V Fault Protected, 5V, RS-485/RS-422 Transceivers with ±25V Common Mode Range |
| 文件： | 总27页 (文件大小：616K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
±60V Fault Protected, 5V, RS-485/RS-422
Transceivers with ±25V Common Mode Range
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
ISL31496E, ISL31498E
The ISL31490E, ISL31491E, ISL31492E, ISL31493E,
ISL31495E, ISL31496E, ISL31498E are fault protected,
Features
• Fault Protected RS-485 Bus Pins. . . . . . Up to ±60V
5V powered, differential transceivers that exceed the
RS-485 and RS-422 standards for balanced
communication. The RS-485 transceiver pins (driver
outputs and receiver inputs) are protected against faults
up to ±60V. Additionally, the extended common mode
range allows these transceivers to operate in
• Extended Common Mode Range . . . . . . . . . . .±25V
More than Twice the Range Required for RS-485
• 1/4 Unit Load for up to 128 Devices on the Bus
• High Transient Overvoltage Tolerance. . . . . . .±80V
environments with common mode voltages up to ±25V
(>2x the RS-485 requirement), making this RS-485
family one of the most robust on the market.
• Full Fail-safe (Open, Short, Terminated) RS-485
Receivers
• High Rx I
for Opto-Couplers in Isolated Designs
OL
Transmitters deliver an exceptional 2.5V (typical)
differential output voltage into the RS-485 specified 54Ω
load. This yields better noise immunity than standard
RS-485 ICs, or allows up to six 120Ω terminations in star
network topologies.
• Hot Plug Circuitry - Tx and Rx Outputs Remain
Three-State During Power-up/Power-down
• Choice of RS-485 Data Rates . . .250kbps to 15Mbps
• Low Quiescent Supply Current . . . . . . . . . . 2.3mA
• Ultra Low Shutdown Supply Current . . . . . . . . 10μA
• Pb-Free (RoHS Compliant)
Receiver (Rx) inputs feature a “Full Fail-Safe” design
which ensures a logic high Rx output if Rx inputs are
floating, shorted, or on a terminated but undriven (idle)
bus. Rx outputs have high drive levels - typically 15mA
Applications
@ V
= 1V (for opto-coupled, isolated applications).
• Utility Meters/Automated Meter Reading Systems
• High Node Count Systems
OL
Half duplex (Rx inputs and Tx outputs multiplexed
together) and full duplex pinouts are available. See
Table 1 on page 2 for key features and configurations by
device number.
• PROFIBUS™ and Field Bus Networks, and Factory
Automation
• Security Camera Networks
For fault protected or wide common mode range devices
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
with cable invert (polarity reversal) or logic supply (V )
L
pins, please see the ISL31480E data sheet.
Exceptional Rx Operates at
>15Mbps Even with a ±25V
Common Mode Voltage
ISL3149xE Delivers Superior
Common Mode Range vs
Standard RS-485 Devices
30
25
VID = ±1V
B
25
A
12
0
20
15
10
-7
-12
5
RO
-20
-25
0
-5
STANDARD RS-485
TRANSCEIVER
CLOSEST
COMPETITOR
ISL3149xE
TIME (20ns/DIV)
June 17, 2010
FN7637.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2010 All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
TABLE 1. SUMMARY OF FEATURES
HALF/FULL DATA RATE
SLEW-RATE
LIMITED?
EN
HOT
QUIESCENT LOW POWER
PIN
COUNT
PART NUMBER
ISL31490E
ISL31491E
ISL31492E
ISL31493E
ISL31495E
ISL31496E
ISL31498E
DUPLEX
(Mbps)
0.25
0.25
0.25
1
PINS? PLUG?
I
(mA)
SHDN?
CC
Full
Yes
Yes
Yes
Yes
Yes
No
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
2.3
Yes
10, 14
Full
2.3
2.3
2.3
2.3
2.3
2.3
No
8
Half
Yes
Yes
Yes
Yes
Yes
Yes
8
10, 14
8
Full
Yes
Half
1
Yes
Full
15
Yes
10, 14
8
Half
15
No
Yes
Ordering Information
PART NUMBER
(Notes 3, 4)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL31490EIBZ (Note 1)
ISL31490EIUZ (Note 1)
ISL31490EIRTZ (Note 1)
ISL31491EIBZ (Note 1)
ISL31492EIBZ (Note 1)
ISL31492EIUZ (Note 1)
ISL31492EIPZ (Note 2)
ISL31492EIRTZ (Note 1)
ISL31493EIBZ (Note 1)
ISL31493EIUZ (Note 1)
ISL31495EIBZ (Note 1)
ISL31495EIUZ (Note 1)
ISL31496EIBZ (Note 1)
ISL31496EIUZ (Note 1)
ISL31498EIBZ (Note 1)
ISL31498EIUZ (Note 1)
NOTES:
ISL31490 EIBZ
1490E
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
14 Ld SOIC
M14.15
10 Ld MSOP
10 Ld TDFN
8 Ld SOIC
8 Ld SOIC
8 Ld MSOP
8 Ld PDIP
M10.118
L10.3x3A
M8.15
490E
31491 EIBZ
31492 EIBZ
1492E
M8.15
M8.118
E8.3
31492 EIPZ
492E
8 Ld TDFN
14 Ld SOIC
10 Ld MSOP
8 Ld SOIC
8 Ld MSOP
14 Ld SOIC
10 Ld MSOP
8 Ld SOIC
8 Ld MSOP
L8.3x3A
M14.15
M10.118
M8.15
ISL31493 EIBZ
1493E
31495 EIBZ
1495E
M8.118
M14.15
M10.118
M8.15
ISL31496 EIBZ
1496E
31498 EIBZ
1498E
M8.118
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Pb-free PDIPs can be used for through-hole wave solder processing only. They are not intended for use in Reflow solder
processing applications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information pages for ISL31490E, ISL31491E, ISL31492E, ISL31493E,
ISL31495E, ISL31496E, ISL31498E. For more information on MSL please see techbrief TB363.
FN7637.0
June 17, 2010
2
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Pin Configurations
ISL31492E, ISL31495E, ISL31498E
(8 LD MSOP, 8 LD SOIC,
8 LD PDIP, 8 LD TDFN)
TOP VIEW
ISL31490E, ISL31493E, ISL31496E
(10 LD MSOP, 10 LD TDFN)
TOP VIEW
ISL31490E, ISL31493E, ISL31496E
(14 LD SOIC)
TOP VIEW
RO 1
RE 2
V
CC
10
9
NC 1
RO 2
RE 3
14 V
13 V
12 A
11 B
10 Z
9 Y
CC
R
D
RO
RE
DE
DI
1
2
3
4
8
7
6
5
V
CC
A
B
Z
Y
R
CC
R
D
B/Z
A/Y
GND
8
DE 3
7
DI 4
DE 4
D
6
GND 5
DI 5
GND 6
GND 7
8 NC
ISL31491E
(8 LD SOIC)
TOP VIEW
V
A
B
Z
Y
CC
1
2
8
7
6
5
R
D
RO
DI 3
4
GND
NOTE: Evaluate creepage and clearance requirements at your maximum fault voltage before using small pitch packages (e.g.,
MSOP and TDFN).
Truth Tables
TRANSMITTING
RECEIVING
INPUTS
DE
INPUTS
OUTPUTS
OUTPUT
RE
X
DE
1
DI
1
Z
0
1
Y
1
RE
DE
Half Duplex Full Duplex
A-B
RO
0
0
0
0
0
0
X
X
X
≥ -0.01V
≤ -0.2V
1
0
1
X
1
0
0
0
0
X
High-Z
High-Z
High-Z*
Inputs
1
0
X
High-Z*
Open/Shorted
NOTE: *Low Power Shutdown Mode (see Note 15 on page 11),
except for ISL31491E.
1
1
0
1
0
1
X
X
High-Z*
High-Z
NOTE: *Low Power Shutdown Mode (see Note 15 on page 11),
except for ISL31491E.
FN7637.0
June 17, 2010
3
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Pin Descriptions
8 LD
8 LD
PIN #
PIN #
PIN
(EXCEPT
(ISL31491E 10 LD 14 LD
NAME ISL31491E)
ONLY)
PIN # PIN #
FUNCTION
RO
1
2
1
2
Receiver output: If A-B ≥ -10mV, RO is high; If A-B ≤ -200mV, RO is low;
RO = High if A and B are unconnected (floating), shorted together, or
connected to an undriven, terminated bus.
RE
DE
DI
2
3
4
-
-
2
3
4
3
4
5
Receiver output enable. RO is enabled when RE is low; RO is high
impedance when RE is high. Internally pulled low.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing
DE high. They are high impedance when DE is low. Internally pulled high.
3
Driver input. A low on DI forces output Y low and output Z high. Similarly,
a high on DI forces output Y high and output Z low.
GND
A/Y
5
6
4
-
5
-
6, 7 Ground connection. This is also the potential of the TDFN EPAD.
-
±60V Fault Protected RS-485/RS-422 level, non-inverting receiver input
and non inverting driver output. Pin is an input if DE = 0; pin is an output
if DE = 1.
B/Z
7
-
-
-
±60V Fault Protected RS-485/RS-422 level, inverting receiver input and
inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
A
B
Y
Z
-
-
8
7
5
6
1
-
9
8
12
11
9
±60V Fault Protected RS-485/RS-422 level, non-inverting receiver input.
±60V Fault Protected RS-485/RS-422 level, inverting receiver input.
±60V Fault Protected RS-485/RS-422 level, non-inverting driver output.
±60V Fault Protected RS-485/RS-422 level, inverting driver output.
-
6
-
7
10
V
8
-
10
13, 14 System power supply input (4.5V to 5.5V).
TDFN exposed thermal pad (EPAD). Connect to GND.
CC
PD
TDFN
ONLY
-
NC
-
-
-
1, 8 No Internal Connection.
FN7637.0
June 17, 2010
4
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Typical Operating Circuits
ISL31492E, ISL31495E, ISL31498E
+5V
+5V
8
+
+
0.1μF
0.1μF
8
V
V
CC
CC
RO
RE
1
2
4
DI
R
D
R
R
3
2
B/Z
A/Y
7
6
T
7
6
B/Z
A/Y
DE
RE
T
3 DE
DI
4
1
RO
R
D
GND
5
GND
5
ISL31490E, ISL31493E, ISL31496E (SOIC PIN NUMBERS SHOWN)
+5V
+5V
+
+
0.1μF
0.1μF
13, 14
13, 14
V
V
CC
CC
R
A 12
Y
Z
T
9
DI
2
5
RO
R
11
B
10
D
3
4
RE
DE
4
3
DE
RE
R
10
9
Z
Y
11 B
12 A
T
RO
5 DI
2
R
D
GND
6, 7
GND
6, 7
ISL31491E
+5V
+5V
+
+
0.1μF
0.1μF
1
1
V
V
CC
CC
R
T
A 8
Y
Z
5
6
DI
2
3
2
RO
R
7
B
D
R
T
6
5
Z
Y
B
A
7
8
RO
3 DI
R
D
GND
4
GND
4
FN7637.0
June 17, 2010
5
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Absolute Maximum Ratings
Thermal Information
V
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical)
θ
(°C/W) θ (°C/W)
JA JC
CC
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . -0.3V to (V
Input/Output Voltages
8 Ld MSOP Package (Notes 5, 8) . .
8 Ld PDIP* Package (Note 6, 8). . .
8 Ld SOIC Package (Note 5, 8) . . .
8 Ld TDFN Package (Note 7, 9) . . .
10 Ld MSOP Package (Note 5, 8) . .
10 Ld TDFN Package (Notes 7, 9). .
14 Ld SOIC Package (Note 5, 8). . .
Maximum Junction Temperature (Plastic Package) . . .+150°C
Maximum Storage Temperature Range . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . *-see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
140
105
116
50
40
60
47
5
+ 0.3V)
CC
A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z (Transient Pulse Through 100Ω,
(Note 19). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80V
135
58
50
7
RO . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to (V
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . see Electrical Specifications
Latch-up (Tested per JESD78, Level 2, Class A). . . . +125°C
+0.3V)
CC
88
38
*Pb-free PDIPs can be used for through-hole wave solder
processing only. They are not intended for use in Reflow
solder processing applications.
Recommended Operating Conditions
Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
CC
Temperature Range . . . . . . . . . . . . . . . . . .-40°C to +85°C
Bus Pin Common Mode Voltage Range . . . . . . -25V to +25V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
5. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
JA
TB379 for details.
6. θ is measured with the component mounted on a low effective thermal conductivity test board in free air.
JA
7. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
JA
features. See Tech Brief TB379 for details.
8. For θ , the “case temp” location is taken at the package top center.
JC
9. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C.
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C) (Note 18) TYP (Note 18) UNITS
DC CHARACTERISTICS
Driver Differential V
(No load)
V
V
Full
-
-
V
V
V
OUT
OD1
OD2
CC
Driver Differential V
(Loaded, Figure 1A)
R = 100Ω (RS-422)
Full
Full
Full
Full
2.4
1.5
2.0
0.8
3.2
2.5
2.5
1.3
-
V
V
OUT
L
R = 54Ω (RS-485)
L
CC
R = 54Ω (PROFIBUS, V
≥ 5V)
L
CC
R = 21Ω (Six 120Ω terminations for
-
V
V
L
Star Configurations, V
≥ 4.75V)
CC
Change in Magnitude of
ΔV
R = 54Ω or 100Ω (Figure 1A)
Full
-
-
0.2
OD
L
Driver Differential V
for Complementary
Output States
OUT
Driver Differential V
with Common Mode Load
(Figure 1B)
V
R = 60Ω, -7V ≤ V
≤ 12V
Full
Full
1.5
1.7
2.1
2.3
V
V
V
OUT
OD3
L
CM
CC
R = 60Ω, -25V ≤ V
≤ 25V
L
CC
CM
(V
≥ 4.75V)
R = 21Ω, -15V ≤ V
≤ 15V
Full
0.8
1.1
-
L
CC
CM
(V
≥ 4.75V)
Driver Common-Mode
V
R = 54Ω or 100Ω
Full
-1
-
-
3
5
V
V
OC
L
V
(Figure 1)
OUT
R = 60Ω or 100Ω, -20V ≤ V
≤ 20V Full
CM
-2.5
L
FN7637.0
June 17, 2010
6
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
R = 54Ω or 100Ω (Figure 1A)
(°C) (Note 18) TYP (Note 18) UNITS
Change in Magnitude of
Driver Common-Mode
for Complementary
Output States
ΔV
Full
-
-
-
0.2
V
OC
L
V
OUT
Driver Short-Circuit
Current
I
DE = V , -25V ≤ V ≤ 25V (Note 12) Full
CC
-250
-83
250
83
mA
mA
mA
OSD
O
I
I
At First Fold-back, 22V ≤ V ≤ -22V
Full
Full
OSD1
O
At Second Fold-back,
-13
13
OSD2
35V ≤ V ≤ -35V
O
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DE, DI, RE
DE, DI, RE
DI
Full
Full
Full
Full
Full
Full
Full
Full
2.5
-
-
-
-
0.8
1
V
V
IH
V
IL
I
-1
-
μA
μA
μA
μA
μA
mA
IN1
IN2
DE, RE
-15
-
6
15
250
-
Input/Output Current
(A/Y, B/Z)
I
DE = 0V,
V
V
V
V
= 12V
110
-75
±240
±0.5
IN
IN
IN
IN
V
= 0V or 5.5V
CC
= -7V
-200
-800
-6
= ±25V
= ±60V
800
6
(Note 21)
Input Current (A, B)
(Full Duplex Versions
Only)
I
V
= 0V or 5.5V V = 12V
Full
Full
Full
Full
-
90
125
-
μA
μA
μA
mA
IN3
CC
IN
V
V
V
= -7V
-100
-500
-3
-70
IN
IN
IN
= ±25V
= ±60V
±200
±0.4
500
3
(Note 21)
Output Leakage Current
(Y, Z) (Full Duplex
Versions Only)
I
RE=0V,DE = 0V, V = 12V
Full
Full
Full
Full
-
20
-5
200
-
μA
μA
μA
mA
OZD
IN
V
= 0V or 5.5V
CC
V
V
V
= -7V
-100
-500
-3
IN
IN
IN
= ±25V
= ±60V
±40
±0.1
500
3
(Note 21)
Receiver Differential
Threshold Voltage
V
-25V ≤ V
-25V ≤ V
≤ 25V
≤ 25V
Full
-200
-100
-10
mV
TH
CM
CM
Receiver Input Hysteresis
ΔV
+25
Full
Full
Full
-
25
-
-
mV
V
TH
Receiver Output High
Voltage
V
I
I
I
= -2mA, V = -10mV
ID
V - 0.5
CC
4.75
4.2
OH
O
O
O
= -8mA, V = -10mV
ID
2.8
-
V
Receiver Output Low
Voltage
V
= 6mA, V = -200mV
ID
-
0.27
0.4
V
OL
Receiver Output Low
Current
I
V
= 1V, V = -200mV
ID
Full
Full
15
-1
22
-
mA
OL
O
Three-State (High
Impedance) Receiver
Output Current
I
I
0V ≤ V ≤ V
0.01
1
μA
OZR
OSR
O
CC
Receiver Short-Circuit
Current
0V ≤ V ≤ V
Full
±12
-
±110
mA
O
CC
FN7637.0
June 17, 2010
7
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C) (Note 18) TYP (Note 18) UNITS
SUPPLY CURRENT
No-Load Supply Current
(Note 11)
I
DE = V , RE = 0V or V , DI = 0V or
CC CC
CC
Full
Full
-
-
2.3
10
4.5
50
mA
CC
V
Shutdown Supply Current
ESD PERFORMANCE
All Pins
I
DE = 0V, RE = V , DI = 0V or V
CC
μA
SHDN
CC
Human Body Model
(Tested per JESD22-A114E)
+25
+25
-
-
±2
-
-
kV
V
Machine Model
±700
(Tested per JESD22-A115-A)
DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL31490E through ISL31492E)
Driver Differential Output
Delay
t
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
320
-
450
ns
ns
PLH, PHL
D
D
≤ 25V Full
1000
CM
(Figure 2)
Driver Differential Output
Skew
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
6
-
30
50
ns
ns
SKEW
D
D
≤ 25V Full
CM
(Figure 2)
Driver Differential Rise or
Fall Time
t , t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
400
300
650
-
1200
1200
ns
ns
R
F
D
D
≤ 25V Full
CM
(Figure 2)
Maximum Data Rate
f
C
= 820pF (Figure 4)
Full
0.25
1.5
-
-
Mbps
ns
MAX
D
Driver Enable to Output
High
t
SW = GND (Figure 3), (Notes 13, 20)
Full
Full
Full
Full
-
1200
ZH
Driver Enable to Output
Low
t
SW = V
SW = V
(Figure 3), (Notes 13, 20)
(Figure 3) (Note 20)
-
-
-
-
-
-
1200
120
ns
ns
ns
ZL
LZ
HZ
CC
CC
Driver Disable from
Output Low
t
Driver Disable from
Output High
t
SW = GND (Figure 3) (Note 20)
120
Time to Shutdown
t
(Note 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Driver Enable from
Shutdown to Output High
t
SW = GND (Figure 3), (Notes 15, 16)
-
2500
ZH(SHDN)
Driver Enable from
Shutdown to Output Low
t
SW = V
(Figure 3), (Notes 15, 16)
CC
Full
-
-
2500
ns
ZL(SHDN)
DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL31493E, ISL31495E)
Driver Differential Output
Delay
t
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
70
-
125
350
ns
ns
PLH, PHL
D
D
≤ 25V Full
CM
(Figure 2)
Driver Differential Output
Skew
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
3
-
15
25
ns
ns
SKEW
D
D
≤ 25V Full
CM
(Figure 2)
Driver Differential Rise or
Fall Time
t , t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
70
70
230
-
300
400
ns
ns
R
F
D
D
≤ 25V Full
CM
(Figure 2)
Maximum Data Rate
f
C
= 820pF (Figure 4)
Full
1
4
-
Mbps
MAX
D
FN7637.0
June 17, 2010
8
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C) (Note 18) TYP (Note 18) UNITS
Driver Enable to Output
High
t
SW = GND (Figure 3), (Note 13)
Full
Full
Full
Full
-
-
-
-
-
-
-
-
350
300
120
120
ns
ns
ns
ns
ZH
Driver Enable to Output
Low
t
SW = V
SW = V
(Figure 3), (Note 13)
(Figure 3)
ZL
LZ
HZ
CC
CC
Driver Disable from
Output Low
t
Driver Disable from
Output High
t
SW = GND (Figure 3)
Time to Shutdown
t
(Note 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Driver Enable from
Shutdown to Output High
t
SW = GND (Figure 3), (Notes 15, 16)
-
2000
ZH(SHDN)
Driver Enable from
Shutdown to Output Low
t
SW = V
(Figure 3), (Notes 15, 16)
CC
Full
-
-
2000
ns
ZL(SHDN)
DRIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL31496E, ISL31498E)
Driver Differential Output
Delay
t
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
21
-
45
80
ns
ns
PLH, PHL
D
D
≤ 25V Full
CM
(Figure 2)
Driver Differential Output
Skew
t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
-
-
3
-
6
7
ns
ns
SKEW
D
D
≤ 25V Full
CM
(Figure 2)
Driver Differential Rise or
Fall Time
t , t
R
C
= 54Ω,
= 50pF
No CM Load
-25V ≤ V
Full
5
5
17
-
30
30
ns
ns
R
F
D
D
≤ 25V Full
CM
(Figure 2)
Maximum Data Rate
f
C
= 470pF (Figure 4)
Full
15
25
-
-
Mbps
ns
MAX
D
Driver Enable to Output
High
t
SW = GND (Figure 3), (Note 13)
Full
Full
Full
Full
-
100
ZH
Driver Enable to Output
Low
t
SW = V
SW = V
(Figure 3), (Note 13)
(Figure 3)
-
-
-
-
-
-
100
120
120
ns
ns
ns
ZL
LZ
HZ
CC
CC
Driver Disable from
Output Low
t
Driver Disable from
Output High
t
SW = GND (Figure 3)
Time to Shutdown
t
(Note 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Driver Enable from
Shutdown to Output High
t
SW = GND (Figure 3), (Notes 15, 16)
-
2000
ZH(SHDN)
Driver Enable from
Shutdown to Output Low
t
SW = V
(Figure 3), (Notes 15, 16)
CC
Full
-
-
2000
ns
ZL(SHDN)
RECEIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL31490E through ISL31492E)
Maximum Data Rate
f
-25V ≤ V
-25V ≤ V
≤ 25V (Figure 5)
≤ 25V (Figure 5)
Full
Full
0.25
5
-
Mbps
ns
MAX
CM
CM
Receiver Input to Output
Delay
t
, t
-
200
280
PLH PHL
Receiver Skew
t
(Figure 5)
Full
-
4
10
ns
SKD
|t
- t |
PLH
PHL
FN7637.0
June 17, 2010
9
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
R = 1kΩ, C = 15pF, SW = V
CC
(°C) (Note 18) TYP (Note 18) UNITS
Receiver Enable to Output
Low
t
Full
Full
Full
Full
-
-
-
-
-
-
-
-
50
50
50
50
ns
ns
ns
ns
ZL
L
L
(Figure 6), (Notes 14, 20)
Receiver Enable to Output
High
t
ZH
R = 1kΩ, C = 15pF, SW = GND
L
L
(Figure 6), (Notes 14, 20)
R = 1kΩ, C = 15pF, SW = V
CC
Receiver Disable from
Output Low
t
LZ
L
L
(Figure 6) (Note 20)
Receiver Disable from
Output High
t
HZ
R = 1kΩ, C = 15pF, SW = GND
L
L
(Figure 6) (Note 20)
Time to Shutdown
t
(Notes 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Receiver Enable from
Shutdown to Output High
t
R = 1kΩ, C = 15pF, SW = GND
-
2000
ZH(SHDN)
L
L
(Figure 6), (Notes 15, 17)
R = 1kΩ, C = 15pF, SW = V
CC
Receiver Enable from
Shutdown to Output Low
t
Full
-
-
2000
ns
ZL(SHDN)
L
L
(Figure 6), (Notes 15, 17)
RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL31493E, ISL31495E)
Maximum Data Rate
f
-25V ≤ V
-25V ≤ V
≤ 25V (Figure 5)
≤ 25V (Figure 5)
Full
Full
1
15
90
-
Mbps
ns
MAX
CM
CM
Receiver Input to Output
Delay
t
, t
-
150
PLH PHL
Receiver Skew
t
(Figure 5)
Full
Full
Full
Full
Full
-
-
-
-
-
4
-
-
-
-
10
50
50
50
50
ns
ns
ns
ns
ns
SKD
|t
- t |
PLH
PHL
Receiver Enable to Output
Low
t
R = 1kΩ, C = 15pF, SW = V
CC
ZL
L
L
(Figure 6), (Note 14)
Receiver Enable to Output
High
t
ZH
R = 1kΩ, C = 15pF, SW = GND
L
L
(Figure 6), (Note 14)
Receiver Disable from
Output Low
t
R = 1kΩ, C = 15pF, SW = V
LZ
L
L
CC
(Figure 6)
Receiver Disable from
Output High
t
R = 1kΩ, C = 15pF, SW = GND
HZ
L
L
(Figure 6)
Time to Shutdown
t
(Note 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Receiver Enable from
Shutdown to Output High
t
R = 1kΩ, C = 15pF, SW = GND
-
2000
ZH(SHDN)
L
L
(Figure 6), (Notes 15, 17)
R = 1kΩ, C = 15pF, SW = V
CC
Receiver Enable from
Shutdown to Output Low
t
Full
-
-
2000
ns
ZL(SHDN)
L
L
(Figure 6), (Notes 15, 17)
RECEIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL31496E, ISL31498E)
Maximum Data Rate
f
-25V ≤ V
-25V ≤ V
≤ 25V (Figure 5)
≤ 25V (Figure 5)
Full
Full
15
25
35
-
Mbps
ns
MAX
CM
CM
Receiver Input to Output
Delay
t
, t
-
70
PLH PHL
Receiver Skew
t
(Figure 5)
Full
Full
Full
-
-
-
4
-
10
50
50
ns
ns
ns
SKD
|t
- t |
PLH
PHL
Receiver Enable to Output
Low
t
R = 1kΩ, C = 15pF, SW = V
CC
ZL
L
L
(Figure 6), (Note 14)
Receiver Enable to Output
High
t
R = 1kΩ, C = 15pF, SW = GND
-
ZH
L
L
(Figure 6), (Note 14)
FN7637.0
June 17, 2010
10
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V,
CC
CC
T = +25°C (Note 10). Boldface limits apply over the operating temperature range,
A
-40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C) (Note 18) TYP (Note 18) UNITS
Receiver Disable from
Output Low
t
R = 1kΩ, C = 15pF, SW = V
(Figure 6)
Full
Full
-
-
-
-
50
50
ns
ns
LZ
L
L
CC
Receiver Disable from
Output High
t
R = 1kΩ, C = 15pF, SW = GND
HZ
L
L
(Figure 6)
Time to Shutdown
t
(Note 15)
Full
Full
60
160
-
600
ns
ns
SHDN
Receiver Enable from
Shutdown to Output High
t
R = 1kΩ, C = 15pF, SW = GND
-
2000
ZH(SHDN)
L
L
(Figure 6), (Notes 15, 17)
R = 1kΩ, C = 15pF, SW = V
CC
Receiver Enable from
Shutdown to Output Low
t
Full
-
-
2000
ns
ZL(SHDN)
L
L
(Figure 6), (Notes 15, 17)
NOTES:
10. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device
ground unless otherwise specified.
11. Supply current specification is valid for loaded drivers when DE = 0V.
12. Applies to peak current. See “Typical Performance Curves” beginning on page 16 for more information.
13. Keep RE = 0 to prevent the device from entering SHDN.
14. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
15. Transceivers (except on the ISL31491E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state
for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts
are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page 16.
16. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
17. Set the RE signal high time >600ns to ensure that the device enters SHDN.
18. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
19. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15μs at a 1% duty cycle).
20. Does not apply to the ISL31491E.
21. See “Caution” statement below the “Recommended Operating Conditions” section on page 6.
Test Circuits and Waveforms
R /2
375Ω
375Ω
R /2
L
L
DE
DI
DE
DI
V
V
CC
CC
Z
Y
V
Z
Y
CM
V
D
V
OD
D
OD
V
OC
R /2
V
R /2
L
L
OC
FIGURE 1B. V
AND V
OC
WITH COMMON MODE LOAD
FIGURE 1A. V
AND V
OC
OD
OD
FIGURE 1. DC DRIVER TEST CIRCUITS
FN7637.0
June 17, 2010
11
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Test Circuits and Waveforms(Continued)
3V
DI
1.5V
1.5V
0V
t
t
PHL
PLH
V
OH
OUT (Z)
OUT (Y)
37Ω*
V
OL
DE
DI
V
CC
Z
Y
+V
OD
C
R
D
D
90%
90%
10%
D
DIFF OUT (Y - Z)
V
CM
375Ω*
10%
-V
OD
SIGNAL
GENERATOR
t
t
R
F
*USED ONLY FOR COMMON
MODE LOAD TESTS
SKEW = |t
PLH
- t |
PHL
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DE
Z
Y
110Ω
V
DI
CC
D
GND
SW
SIGNAL
GENERATOR
C
L
3V
0V
DE
1.5V
1.5V
HZ
(Note 15)
C
(pF)
L
t
, t
PARAMETER OUTPUT
RE
DI
1/0
0/1
SW
t
ZH ZH(SHDN)
(Note 15)
OUTPUT HIGH
V
OH
t
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
X
X
GND
50
HZ
V
- 0.5V
OH
OUT (Y, Z)
2.3V
t
V
50
LZ
CC
0V
t
0 (Note 13) 1/0
0 (Note 13) 0/1
1 (Note 16) 1/0
1 (Note 16) 0/1
GND
100
100
100
100
ZH
t
, t
t
ZL ZL(SHDN)
LZ
t
V
ZL
CC
(Note 15)
V
CC
t
GND
OUT (Y, Z)
2.3V
ZH(SHDN)
V
+ 0.5V
OL
V
OL
t
V
CC
ZL(SHDN)
OUTPUT LOW
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES
DE
DI
V
CC
+
3V
0V
Z
Y
DI
V
54Ω
OD
C
D
D
-
SIGNAL
GENERATOR
+V
OD
DIFF OUT (Y - Z)
0V
-V
OD
FIGURE 4A. TEST CIRCUIT
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER DATA RATE
FN7637.0
June 17, 2010
12
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Test Circuits and Waveforms(Continued)
RE
B
V
+ 750mV
CM
15pF
B
V
V
CM
CM
RO
R
A
V
- 750mV
A
CM
t
t
PLH
PHL
SIGNAL
GENERATOR
SIGNAL
GENERATOR
V
CC
50%
50%
RO
V
CM
0V
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
B
A
1kΩ
V
CC
RO
R
(Note 15)
GND
SW
SIGNAL
3V
0V
15pF
GENERATOR
RE
1.5V
1.5V
HZ
PARAMETER
DE
0
A
SW
GND
t
, t
ZH ZH(SHDN)
t
OUTPUT HIGH
(Note 15)
t
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
V
HZ
OH
V
- 0.5V
OH
1.5V
RO
t
0
V
LZ
CC
0V
t
(Note 14)
(Note 14)
0
GND
ZH
t
, t
t
ZL ZL(SHDN)
LZ
t
0
V
CC
ZL
(Note 15)
V
CC
t
(Note 17)
(Note 17)
0
GND
ZH(SHDN)
RO
1.5V
OUTPUT LOW
V
+ 0.5V
OL
t
0
V
V
ZL(SHDN)
CC
OL
FIGURE 6A. TEST CIRCUIT
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES
FN7637.0
June 17, 2010
13
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
The Rx in the 250kbps and 1Mbps versions include noise
filtering circuitry to reject high frequency signals. The
1Mbps version typically rejects pulses narrower than
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy
50ns (equivalent to 20Mbps), while the 250kbps Rx
environments. RS-422 is a subset of RS-485, so RS-485
rejects pulses below 150ns (6.7Mbps).
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows
only one driver and up to 10 (assuming one unit load
devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one unit load
devices (any combination of drivers and receivers) on
each bus. To allow for multipoint operation, the RS-485
specification requires that drivers must handle bus
contention without sustaining any damage.
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device
that delivers at least 1.5V across a 54Ω load (RS-485),
and at least 2.4V across a 100Ω load (RS-422). The
drivers feature low propagation delay skew to maximize
bit width, and to minimize EMI, and all drivers are
three-statable via the active high DE input.
The 250kbps and 1Mbps driver outputs are slew rate
limited to minimize EMI, and to minimize reflections in
unterminated or improperly terminated networks.
Outputs of the ISL31496E and ISL31498E drivers are not
limited, thus faster output transition times allow data
rates of at least 15Mbps.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the
driver outputs and receiver inputs withstand signals that
range from +12V to -7V. RS-422 and RS-485 are
intended for runs as long as 4000’, thus the wide CMR is
necessary to handle ground potential differences, as well
as voltages induced in the cable by external fields.
High Overvoltage (Fault) Protection
Increases ruggedness
Note: The available smaller pitch packages (e.g., MSOP
and TDFN) may not meet the creepage and clearance
(C&C) requirements for ±60V levels. The user is advised
to determine his C&C requirements before selecting a
package type.
The ISL3149xE is a family of ruggedized RS-485
transceivers that improves on the RS-485 basic
requirements, and therefore increases system reliability.
The CMR increases to ±25V, while the RS-485 bus pins
(receiver inputs and driver outputs) include fault
protection against voltages and transients up to ±60V.
Additionally, larger than required differential output
The ±60V (referenced to the IC GND) fault protection on
the RS-485 pins, makes these transceivers some of the
most rugged on the market. This level of protection
makes the ISL3149xE perfect for applications where
power (e.g., 24V and 48V supplies) must be routed in the
conduit with the data lines, or for outdoor applications
where large transients are likely to occur. When power is
routed with the data lines, even a momentary short
between the supply and data lines will destroy an
unprotected device. The ±60V fault levels of this family
are at least five times higher than the levels specified
for standard RS-485 ICs. The ISL3149xE protection is
active whether the Tx is enabled or disabled, and even if
the IC is powered down.
voltages (V ) increase noise immunity.
OD
Receiver (Rx) Features
These devices utilize a differential input receiver for
maximum noise immunity and common mode rejection.
Input sensitivity is better than ±200mV, as required by
the RS-422 and RS-485 specifications.
Receiver input (load) current surpasses the RS-422
specification of 3mA, and is four times lower than the
RS-485 “Unit Load (UL)” requirement of 1mA maximum.
Thus, these products are known as “one-quarter UL”
transceivers, and there can be up to 128 of these devices
on a network while still complying with the RS-485
loading specification.
If transients or voltages (including overshoots and
ringing) greater than ±60V are possible, then additional
external protection is required.
The Rx functions with common mode voltages as great
as ±25V, making them ideal for industrial, or long
networks where induced voltages are a realistic concern.
Widest Common Mode Voltage (CMV)
Tolerance Improves Operating Range
All the receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver
inputs are unconnected (floating), shorted together, or
connected to a terminated bus with all the transmitters
disabled (i.e., an idle bus).
RS-485 networks operating in industrial complexes, or
over long distances, are susceptible to large CMV
variations. Either of these operating environments may
suffer from large node-to-node ground potential
differences, or CMV pickup from external electromagnetic
sources, and devices with only the minimum required
+12V to -7V CMR may malfunction. The ISL3149xE’s
extended ±25V CMR is the widest available, allowing
operation in environments that would overwhelm lesser
transceivers. Additionally, the Rx will not phase invert
(erroneously change state) even with CMVs of ±40V, or
differential voltages as large as 40V.
Rx outputs feature high drive levels (typically 22mA @
V
= 1V) to ease the design of optically coupled
OL
isolated interfaces.
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are
three-statable via the active low RE input (except on the
ISL31491E).
FN7637.0
June 17, 2010
14
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
High V
Flexibility
Improves Noise Immunity and
Data Rate, Cables, and Terminations
OD
RS-485/RS-422 are intended for network lengths up to
4000’, but the maximum system data rate decreases as
the transmission length increases. Devices operating at
15Mbps may be used at lengths up to 150’ (46m), but
the distance can be increased to 328’ (100m) by
operating at 10Mbps. The 1Mbps versions can operate at
full data rates with lengths up to 800’ (244m). Jitter is
the limiting parameter at these faster data rates, so
employing encoded data streams (e.g., Manchester
coded or Return-to-Zero) may allow increased
transmission distances. The slow versions can operate at
115kbps, or less, at the full 4000’ (1220m) distance, or
at 250kbps for lengths up to 3000’ (915m). DC cable
attenuation is the limiting parameter, so using better
quality cables (e.g., 22 AWG) may allow increased
transmission distance.
The ISL3149xE driver design delivers larger differential
output voltages (V ) than the RS-485 standard
requires, or than most RS-485 transmitters can deliver.
The typical ±2.5V V
OD
provides more noise immunity
OD
than networks built using many other transceivers.
Another advantage of the large V is the ability to drive
more than two bus terminations, which allows for
utilizing the ISL3149xE in “star” and other
multi-terminated, nonstandard network topologies.
Figure 8 details the transmitter’s V
characteristic, and includes load lines for four (30Ω) and
six (20Ω) 120Ω terminations. Figure 8 shows that the
driver typically delivers ±1.3V into six terminations, and
the “Electrical Specification” table guarantees a V
±0.8V at 21Ω over the full temperature range. The
RS-485 standard requires a minimum 1.5V V into two
OD
vs I
OD
OUT
of
OD
Twisted pair is the cable of choice for RS-485/RS-422
networks. Twisted pair cables tend to pick up noise and
other electromagnetically induced voltages as common
mode signals, which are effectively rejected by the
differential receivers in these ICs.
OD
terminations, but the ISL3149xE deliver RS-485 voltage
levels with 2x to 3x the number of terminations.
Hot Plug Function
When a piece of equipment powers up, there is a period
of time where the processor or ASIC driving the RS-485
control lines (DE, RE) is unable to ensure that the
RS-485 Tx and Rx outputs are kept disabled. If the
equipment is connected to the bus, a driver activating
prematurely during power-up may crash the bus. To
avoid this scenario, the ISL3149xE devices incorporate a
Proper termination is imperative, when using the 15Mbps
devices, to minimize reflections. Short networks using
the 250kbps versions need not be terminated, however,
terminations are recommended unless power dissipation
is an overriding concern.
In point-to-point, or point-to-multipoint (single driver on
bus like RS-422) networks, the main cable should be
terminated in its characteristic impedance (typically
120Ω) at the end farthest from the driver. In
“Hot Plug” function. Circuitry monitoring V ensures
CC
that, during power-up and power-down, the Tx and Rx
outputs remain disabled, regardless of the state of DE
multi-receiver applications, stubs connecting receivers to
the main cable should be kept as short as possible.
Multipoint (multi-driver) systems require that the main
cable be terminated in its characteristic impedance at
both ends. Stubs connecting a transceiver to the main
cable should be kept as short as possible.
and RE, if V
is less than ≈3.5V. This gives the
CC
processor/ASIC a chance to stabilize and drive the
RS-485 control lines to the proper states. Figure 7
illustrates the power-up and power-down performance of
the ISL3149xE compared to an RS-485 IC without the
Hot Plug feature.
Built-In Driver Overload Protection
DE, DI = V
CC
As stated previously, the RS-485 specification requires
that drivers survive worst case bus contentions
undamaged. These transceivers meet this requirement
via driver output short circuit current limits, and on-chip
thermal shutdown circuitry.
5.0
2.5
RE = GND
3.5V
2.8V
VCC
0
5.0
2.5
0
The driver output stages incorporate a double foldback
short circuit current limiting scheme which ensures that
the output current never exceeds the RS-485
specification, even at the common mode and fault
condition voltage range extremes. The first foldback
current level (≈70mA) is set to ensure that the driver
never folds back when driving loads with common mode
voltages up to ±25V. The very low second foldback
current setting (≈9mA) minimizes power dissipation if
the Tx is enabled when a fault occurs.
R
R
= 1kΩ
= 1kΩ
L
ISL3149xE
ISL3149xE
A/Y
ISL83088E
5.0
2.5
L
RO
0
TIME (40μs/DIV)
FIGURE 7. HOT PLUG PERFORMANCE (ISL3149xE) vs
ISL83088E WITHOUT HOT PLUG
CIRCUITRY
In the event of a major short circuit condition, devices
also include a thermal shutdown feature that disables
the drivers whenever the die temperature becomes
excessive. This eliminates the power dissipation,
FN7637.0
June 17, 2010
15
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about +15°C.
If the contention persists, the thermal
I
to a 10μA trickle. These devices enter shutdown
CC
whenever the receiver and driver are simultaneously
disabled (RE = V and DE = GND) for a period of at
CC
shutdown/re-enable cycle repeats until the fault is
cleared. Receivers stay operational during thermal
shutdown.
least 600ns. Disabling both the driver and the receiver
for less than 60ns guarantees that the transceiver will
not enter shutdown.
Note that receiver and driver enable times increase when
the transceiver enables from shutdown. Refer to
Notes 13, 14, 15, 16 and 17, at the end of the “Electrical
Specification” table on page 11, for more information.
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power
required by competitive devices, but they also include a
shutdown feature that reduces the already low quiescent
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified.
A
CC
3.6
3.4
90
R
= 20Ω
D
R
= 30Ω
D
80
70
60
50
40
30
20
10
0
+25°C
R
= 100Ω
D
R
= 54Ω
3.2
3
D
+85°C
2.8
2.6
2.4
2.2
R
= 100Ω
D
R
= 54Ω
D
0
1
2
3
4
5
-40
-25
0
25
50
75 85
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 8. DRIVER OUTPUT CURRENT vs
DIFFERENTIAL OUTPUT VOLTAGE
FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOLTAGE
vs TEMPERATURE
70
60
2.45
2.40
V
, +25°C
OL
V
, +85°C
OL
50
40
30
20
10
0
DE = V , RE = X
CC
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
DE = GND, RE = GND
-10
-20
-30
V
, +85°C
1
OH
V
, +25°C
3
OH
0
2
4
5
-40
-25
0
25
50
75 85
RECEIVER OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 10. SUPPLY CURRENT vs TEMPERATURE
FIGURE 11. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
FN7637.0
June 17, 2010
16
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified. (Continued)
CC
A
800
340
R
= 54Ω, C = 50pF
D
D
600
400
200
335
330
325
320
315
310
305
300
t
PLH
Y OR Z
0
t
-200
PHL
-400
A/Y OR B/Z
-600
-70
-50
-30
-10 0 10
30
50
70
-40
-25
0
25
50
75 85
BUS PIN VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 12. BUS PIN CURRENT vs BUS PIN VOLTAGE
FIGURE 13. DRIVER DIFFERENTIAL PROPAGATION
DELAY vs TEMPERATURE (ISL31490E,
ISL31491E, ISL31492E)
8
85
R
= 54Ω, C = 50pF
D
D
R
= 54Ω, C = 50pF
D D
7
6
5
4
3
2
1
0
80
75
70
65
60
55
50
t
PLH
t
PHL
25
|t
- t
|
PHL
PLH
-40
0
50
85
75
-25
25
-40
-25
0
50
75 85
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 14. DRIVER DIFFERENTIAL SKEW vs
FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION
DELAY vs TEMPERATURE (ISL31493E,
ISL31495E)
TEMPERATURE (ISL31490E, ISL31491E,
ISL31492E)
27
4.0
3.5
3.0
2.5
2.0
R
= 54Ω, C = 50pF
D
D
R
= 54Ω, C = 50pF
D
D
25
23
21
19
17
15
t
PLH
t
PHL
|t
- t
|
PHL
PLH
-40
-25
0
25
50
75 85
-40
0
50
85
75
-25
25
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 16. DRIVER DIFFERENTIAL SKEW vs
FIGURE 17. DRIVER DIFFERENTIAL PROPAGATION
DELAY vs TEMPERATURE (ISL31496E,
ISL31498E)
TEMPERATURE (ISL31493E, ISL31495E)
FN7637.0
June 17, 2010
17
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified. (Continued)
CC A
3.4
R
= 54Ω, C = 50pF
D
D
3.2
3.0
2.8
2.6
2.4
2.2
2.0
|t
- t
|
PHL
PLH
-40
0
50
85
75
-25
25
TEMPERATURE (°C)
FIGURE 18. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL31496E, ISL31498E)
A
B
A
B
25
20
15
10
5
25
20
15
10
5
VID = ±1V
VID = ±1V
RO
RO
RO
RO
0
0
5
0
5
0
-5
-5
-10
-15
-20
-25
-10
-15
-20
-25
A
B
A
B
TIME (1μs/DIV)
TIME (400ns/DIV)
FIGURE 19. ±25V RECEIVER PERFORMANCE
FIGURE 20. ±25V RECEIVER PERFORMANCE
(ISL31493E, ISL31495E)
(ISL31490E, ISL31491E, ISL31492E)
A
B
R
= 54Ω, C = 50pF
D
25
20
15
10
5
D
5
0
VID = ±1V
DI
5
0
RO
RO
RO
0
5
0
-5
-10
-15
-20
-25
3
2
1
A/Y - B/Z
0
-1
-2
-3
A
B
TIME (20ns/DIV)
TIME (1μs/DIV)
FIGURE 21. ±25V RECEIVER PERFORMANCE
(ISL31496E, ISL31498E)
FIGURE 22. DRIVER AND RECEIVER WAVEFORMS
(ISL31490E, ISL31491E, ISL31492E)
FN7637.0
June 17, 2010
18
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Typical Performance Curves
V
= 5V, T = +25°C; Unless Otherwise Specified. (Continued)
CC A
R
= 54Ω, C = 50pF
D
R
= 54Ω, C = 50pF
D
D
D
5
5
0
DI
DI
0
5
0
5
0
RO
RO
3
3
2
1
2
1
0
0
A/Y - B/Z
-1
-2
-3
-1
-2
-3
A/Y - B/Z
TIME (400ns/DIV)
TIME (20ns/DIV)
FIGURE 23. DRIVER AND RECEIVER WAVEFORMS
(ISL31493E, ISL31495E)
FIGURE 24. DRIVER AND RECEIVER WAVEFORMS
(ISL31496E, ISL31498E)
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP) AND TDFN EPAD:
GND
PROCESS:
Si Gate BiCMOS
FN7637.0
June 17, 2010
19
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to
web to make sure you have the latest Rev.
DATE
REVISION
CHANGE
6/17/10
FN7637.0
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The
Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones,
handheld products, and notebooks. Intersil's product families address power management and analog signal
processing functions. Go to www.intersil.com/products for a complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device
information page on intersil.com: ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E, ISL31498E
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7637.0
June 17, 2010
20
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 3, 3/10
5
3.0±0.05
A
DETAIL "X"
D
8
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.25
3°±3°
0.55 ± 0.15
0.85±010
H
DETAIL "X"
C
SEATING PLANE
0.10 C
0.25 - 0.036
0.10 ± 0.05
0.08 C A-B D
M
SIDE VIEW 1
(5.80)
NOTES:
1. Dimensions are in millimeters.
(4.40)
(3.00)
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
(0.65)
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
(0.40)
(1.40)
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
FN7637.0
June 17, 2010
21
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Mini Small Outline Plastic Packages (MSOP)
N
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
E1
E
INCHES
MILLIMETERS
SYMBOL
MIN
MAX
MIN
0.94
0.05
0.75
0.18
0.09
2.95
2.95
MAX
1.10
0.15
0.95
0.27
0.20
3.05
3.05
NOTES
-B-
0.20 (0.008)
INDEX
AREA
A
A1
A2
b
0.037
0.002
0.030
0.007
0.004
0.116
0.116
0.043
0.006
0.037
0.011
0.008
0.120
0.120
-
1 2
A
B
C
-
TOP VIEW
-
4X θ
0.25
(0.010)
R1
9
R
GAUGE
PLANE
c
-
D
3
SEATING
PLANE
E1
e
4
L
-C-
4X θ
0.020 BSC
0.50 BSC
-
L1
A
A2
E
0.187
0.016
0.199
0.028
4.75
0.40
5.05
0.70
-
SEATING
PLANE
L
6
0.10 (0.004)
-A-
C
C
L1
N
0.037 REF
10
0.95 REF
10
-
b
-H-
A1
7
e
D
R
0.003
0.003
-
-
0.07
0.07
-
-
-
0.20 (0.008)
C
R1
θ
-
a
SIDE VIEW
o
o
o
o
C
L
5
15
5
15
-
o
0
o
o
0
o
E
1
6
6
-
α
-B-
0.20 (0.008)
C
D
END VIEW
Rev. 0 12/02
NOTES:
1. Thesepackagedimensionsarewithinallowabledimensionsof
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension“D”doesnotincludemoldflash,protrusionsorgate
burrsandaremeasuredatDatumPlane.Moldflash,protrusion
andgateburrsshallnotexceed0.15mm(0.006inch)perside.
4. Dimension“E1”doesnotincludeinterleadflashorprotrusions
- H -
and are measured at Datum Plane.
Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formedleadsshallbeplanarwithrespecttooneanotherwithin
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension“b”doesnotincludedambarprotrusion.Allowable
dambarprotrusionshallbe0.08mm(0.003inch)totalinexcess
of“b”dimensionatmaximummaterialcondition.Minimumspace
betweenprotrusionandadjacentleadis0.07mm(0.0027inch).
- B -
-A -
10. Datums
and
to be determined at Datum plane
.
- H -
11. Controllingdimension: MILLIMETER.Convertedinchdimen-
sions are for reference only
FN7637.0
June 17, 2010
22
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Package Outline Drawing
L8.3x3A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 4, 2/10
( 2.30)
3.00
( 1.95)
A
B
( 8X 0.50)
(1.50)
6
PIN 1
INDEX AREA
( 2.90 )
(4X)
0.15
PIN 1
TOP VIEW
(6x 0.65)
( 8 X 0.30)
TYPICAL RECOMMENDED LAND PATTERN
SEE DETAIL "X"
0.10 C
2X 1.950
C
6X 0.65
0.75 ±0.05
0.08 C
1
PIN #1
INDEX AREA
6
SIDE VIEW
1.50 ±0.10
5
8
C
0 . 2 REF
4
8X 0.30 ±0.05
0.10 M C A B
8X 0.30 ± 0.10
0 . 02 NOM.
0 . 05 MAX.
2.30 ±0.10
DETAIL "X"
BOTTOM VIEW
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.20mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
Compliant to JEDEC MO-229 WEEC-2 except for the foot length.
7.
FN7637.0
June 17, 2010
23
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Package Outline Drawing
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 5, 3/10
2.0 REF
8X 0.50 BSC
6
3.00
A
PIN 1
INDEX AREA
B
1
5
6
10X 0 . 30
PIN 1
INDEX AREA
3.00
1.50
0.15
(4X)
C
C
A B
0.10
0.05
M
M
10
5
10 X 0.25
4
TOP VIEW
( 2.30 )
2.30
BOTTOM VIEW
0 .80 MAX
SEE DETAIL "X"
0.10 C
C
(2.90)
SEATING PLANE
0.08 C
(1.50)
SIDE VIEW
(10 X 0.50)
5
0 . 2 REF
C
( 8X 0 .50 )
( 10X 0.25 )
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
Angular ±2.50°
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
Compliant to JEDEC MO-229-WEED-3 except exposed pad length (2.30mm).
7.
FN7637.0
June 17, 2010
24
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
4
0.10 C A-B 2X
8.65
A
3
6
DETAIL"A"
0.22±0.03
D
14
8
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
(0.35) x 45°
4° ± 4°
5
0.31-0.51
0.25M C A-B D
B
3
6
TOP VIEW
0.10 C
H
1.75 MAX
1.25 MIN
0.25
GAUGE PLANE
C
0.10-0.25
SEATING PLANE
1.27
0.10 C
SIDE VIEW
DETAIL "A"
(1.27)
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 indentifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
(1.50)
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
FN7637.0
June 17, 2010
25
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Dual-In-Line Plastic Packages (PDIP)
E8.3 (JEDEC MS-001-BA ISSUE D)
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
E1
INDEX
AREA
INCHES
MILLIMETERS
1
2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
-C-
A
A1
A2
B
-
4
-A-
D
E
0.015
0.115
0.014
0.045
0.008
0.355
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
9.01
0.13
7.62
6.10
4
BASE
PLANE
0.195
0.022
0.070
0.014
0.400
-
4.95
0.558
1.77
0.355
10.16
-
-
A2
A
-
SEATING
PLANE
L
C
L
B1
C
8, 10
D1
B1
eA
-
A
1
D1
e
D
5
eC
C
B
eB
D1
E
5
0.010 (0.25) M
C
A B S
0.325
0.280
8.25
7.11
6
NOTES:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between
EnglishandMetricdimensions, theinchdimensionscontrol.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
e
e
6
A
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
-
0.430
0.150
-
10.92
3.81
7
3. Symbolsaredefinedinthe“MOSeriesSymbolList”inSection
2.2 of Publication No. 95.
B
L
0.115
2.93
4
9
4. DimensionsA,A1andLaremeasuredwiththepackageseated
in JEDEC seating plane gauge GS-3.
N
8
8
Rev. 0 12/93
5. D, D1, andE1dimensionsdonotincludemoldflashorprotru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
e
6. Eand
pendicular to datum
7. e and e are measured at the lead tips with the leads uncon-
aremeasuredwiththeleadsconstrainedtobeper-
A
-C-
.
B
C
strained. e must be zero or greater.
C
8. B1maximumdimensionsdonotincludedambarprotrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
FN7637.0
June 17, 2010
26
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
0.25(0.010)
M
L
B M
H
AREA
INCHES
MILLIMETERS
E
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
NOTES
-B-
A
A1
B
C
D
E
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
-
1
2
3
9
SEATING PLANE
A
0.0075
0.1890
0.1497
0.0098
0.1968
0.1574
-
-A-
3
h x 45°
D
4
-C-
e
0.050 BSC
1.27 BSC
-
α
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
e
A1
C
5
B
0.10(0.004)
L
6
0.25(0.010) M
C
A M B S
N
α
8
8
7
NOTES:
0°
8°
0°
8°
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN7637.0
June 17, 2010
27
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