ISL32603EFBZ [INTERSIL]
1.8V to 3.3V, Micro-Power, ±15kV ESD, 125°C, Slew Rate Limited, RS-485/RS-422 Transceivers;型号: | ISL32603EFBZ |
厂家: | Intersil |
描述: | 1.8V to 3.3V, Micro-Power, ±15kV ESD, 125°C, Slew Rate Limited, RS-485/RS-422 Transceivers 驱动 信息通信管理 光电二极管 接口集成电路 驱动器 |
文件: | 总23页 (文件大小:1212K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
1.8V to 3.3V, Micro-Power, ±15kV ESD, +125°C, Slew
Rate Limited, RS-485/RS-422 Transceivers
ISL32600E, ISL32601E, ISL32602E, ISL32603E
The Intersil ISL32600E, ISL32601E, ISL32602E and
ISL32603E are ±15kV IEC61000 ESD protected, micro power,
wide supply range transceivers for differential communication.
Features
• Single 1.8V, 3V, or 3.3V Supply
The ISL32600E and ISL32601E operate with V ≥ 2.7V and
• Low Supply Currents . . . . . . . ISL32601E, 100µA (Max) @ 3V
. . . . . . ISL32603E, 150µA (Max) @ 1.8V
CC
have maximum supply currents as low as 100µA with both the
transmitter (Tx) and receiver (Rx) enabled. The ISL32602E and
ISL32603E operate with supply voltages as low as 1.8V. These
transceivers have very low bus currents, so they present less
than a “1/8 unit load” to the bus. This allows more than 256
transmitters on the network, without violating the RS-485
specification’s 32 unit load maximum.
- Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . 10nA
• IEC61000 ESD Protection on RS-485 I/O Pins . . . . . . ±15kV
- Class 3 ESD Levels on all Other Pins. . . . . . . . . >8kV HBM
• Symmetrical Switching Thresholds for Less Duty Cycle
Distortion (See Figure 9)
Rx inputs feature symmetrical switching thresholds, and up to
65mV of hysteresis, to improve noise immunity and to reduce
duty cycle distortion in the presence of slow moving input
signals (see Figure 9). The Rx input common mode range is the
full -7V to +12V RS-485 range for supply voltages ≥ 3V.
• Up to 65mV Hysteresis for Improved Noise Immunity
• Data Rates from 128kbps to 460kbps
• Specified for +125°C Operation
• 1/8 Unit Load Allows up to 256 Devices on the Bus
Hot Plug circuitry ensures that the Tx and Rx outputs remain in
a high impedance state while the power supply stabilizes.
• -7V to +12V Common Mode Input/Output Voltage Range
(V ≥ 3V)
CC
• Half and Full Duplex Pinouts; Three State Rx and Tx Outputs
• 5V Tolerant Logic Inputs
This transceiver family utilizes slew rate limited drivers, which
reduce EMI, and minimize reflections from improperly terminated
transmission lines, or unterminated stubs in multidrop and
multipoint applications.
• Tiny MSOP Packages Consume 50% Less Board Space
The ISL32600E and ISL32602E are configured for full duplex
(separate Rx input and Tx output pins) applications. The half
duplex versions multiplex the Rx inputs and Tx outputs to allow
transceivers with output disable functions in 8 Ld packages.
See Table 1 for a summary of each device’s features.
Applications
• Differential Sensor Interfaces
• Process Control Networks
• Security Camera Networks
• Building Environmental Control/Lighting Systems
10m
ISL3172E DYNAMIC (9.6kbps)
DE = V , RE = GND
CC
DYNAMIC (256kbps)
1m
25°C, R = ∞, C = 50pF
D
D
ISL3172E STATIC
DYNAMIC (128kbps)
ISL3260XE DYNAMIC (9.6kbps)
1m
100µ
ISL3260XE STATIC
STATIC
3.4
DE = V , RE = GND
CC
25°C, R = ∞, C = 50pF
D
D
10µ
2.7
100µ
2.8
2.9
3
3.1
3.2
3.3
3.4
3.5
3.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 1. ISL32600E AND ISL32601E HAVE A 9.6kbps
OPERATING I LOWER THAN THE STATIC I OF
FIGURE 2. ISL32602E AND ISL32603E WITH V = 1.8V REDUCE
CC
OPERATING I BY A FACTOR OF 25 TO 40,
CC
CC
CC
MANY EXISTING 3V TRANSCEIVERS
COMPARED WITH I AT V = 3.3V
CC CC
June 22, 2012
FN7967.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL32600E, ISL32601E, ISL32602E, ISL32603E
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
SUPPLY
RANGE (V)
HALF/FULL DATA RATE SLEW-RATE
HOT
PLUG?
# DEVICES
ON BUS
RX/TX
ENABLE?
QUIESCENT LOW POWER
PIN
DUPLEX
(kbps)
LIMITED?
I
CC
(µA) SHUTDOWN? COUNT
ISL32600E
ISL32601E
ISL32602E
ISL32603E
2.7 to 3.6
2.7 to 3.6
1.8 to 3.6
1.8 to 3.6
FULL
128 - 256
128 - 256
256 - 460
256 - 460
YES
YES
YES
YES
YES
256
256
256
256
YES
YES
YES
YES
60 @ 3V
60 @ 3V
YES
YES
YES
YES
10, 14
HALF
FULL
YES
8
10, 14
8
YES
105 @ 1.8V
105 @ 1.8V
HALF
YES
Pin Configurations
ISL32601E, ISL32603E
ISL32600E, ISL32602E
(10 LD MSOP)
(8 LD MSOP, SOIC)
TOP VIEW
TOP VIEW
RO
RE
1
2
3
4
5
10 V
CC
RO
RE
DE
DI
1
8
7
6
5
V
CC
R
D
R
D
A
B
Z
9
8
7
6
2
3
4
B/Z
DE
A/Y
DI
GND
GND
Y
ISL32600E, ISL32602E
(14 LD SOIC)
TOP VIEW
NC
RO
1
2
3
4
5
6
7
14 V
CC
13 NC
12 A
11 B
10 Z
R
D
RE
DE
DI
GND
GND
9
8
Y
NC
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL32600EFBZ
ISL32600EFUZ
ISL32601EFBZ
ISL32601EFUZ
ISL32602EFBZ
ISL32602EFUZ
ISL32603EFBZ
ISL32603EFUZ
NOTES:
32600EFBZ
32600
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
14 Ld SOIC
M14.15
M10.118
M8.15
10 Ld MSOP
8 Ld SOIC
32601 EFBZ
32601
8 Ld MSOP
14 Ld SOIC
10 Ld MSOP
8 Ld SOIC
M8.118
M14.15
M10.118
M8.15
32602EFBZ
32602
32603 EFBZ
32603
8 Ld MSOP
M8.118
1. Add “-T” (full reel) or -T7A (250 piece reel) suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL32600E, ISL32601E, ISL32602E, ISL32603E. For more information
on MSL please see tech brief TB363.
FN7967.0
June 22, 2012
2
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Truth Tables
Truth Tables (continued)
TRANSMITTING
RECEIVING
INPUTS
DE
INPUTS
OUTPUTS
OUTPUT
RO
RE
X
DE
1
DI
1
Z
0
1
Y
1
RE
DE
Half Duplex Full Duplex
A-B
0
0
0
1
1
0
0
0
0
1
X
X
X
0
1
≥ 0.2V
1
0
X
1
0
0
≤ -0.2V
0
0
X
High-Z
High-Z
High-Z *
Inputs Open
1
1
0
X
High-Z *
X
X
High-Z *
High-Z
NOTE: *Shutdown Mode (See Note 11).
NOTE: *Shutdown Mode (See Note 11).
Pin Descriptions
8 LD
10 LD
14 LD
PIN PACKAGE PACKAGE PACKAGE
FUNCTION
RO
RE
DE
DI
1
2
3
4
1
2
3
4
2
3
4
5
Receiver output: If A-B ≥ 200mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and B are unconnected
(floating).
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high. If the Rx enable
function isn’t required, connect RE directly to GND.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high, and are high impedance
when DE is low. If the Tx enable function isn’t required, connect DE to V
.
CC
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high
and output Z low.
GND
A/Y
5
6
5
-
6, 7
-
Ground connection.
±15kV IEC61000 ESD Protected RS-485/422 level, noninverting receiver input and noninverting driver
output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z
7
-
-
±15kV IEC61000 ESD Protected RS-485/422 level, Inverting receiver input and inverting driver output. Pin is
an input if DE = 0; pin is an output if DE = 1.
A
B
Y
Z
-
-
9
8
12
11
9
±15kV IEC61000 ESD Protected RS-485/422 level, noninverting receiver input.
±15kV IEC61000 ESD Protected RS-485/422 level, inverting receiver input.
±15kV IEC61000 ESD Protected RS-485/422 level, noninverting driver output.
±15kV IEC61000 ESD Protected RS-485/422 level, inverting driver output.
-
6
-
7
10
14
V
8
10
System power supply input (2.7V to 3.6V for ISL32600E and ISL32601E; 1.8V to 3.6V for ISL32602E and
ISL32603E).
CC
NC
-
-
1, 8, 13 No Internal Connection.
FN7967.0
June 22, 2012
3
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Operating Circuits
HALF DUPLEX NETWORK USING ISL32603E
+1.8V
+1.8V
+
+
0.1µF
0.1µF
8
8
V
V
CC
CC
RO
1
2
4
DI
R
D
RE
DE
3
2
7
6
7
6
B/Z
A/Y
DE
RE
B/Z
A/Y
}
NOTE 14
3
4
DI
1
RO
R
D
GND
5
GND
5
FULL DUPLEX NETWORK USING ISL32600E
(PIN NUMBERS FOR SOIC)
+3.3V
+3.3V
+
+
0.1µF
0.1µF
14
R
14
CC
V
V
CC
R
T
A
B
12
Y
Z
9
DI
2
5
RO
11
D
10
3
4
RE
DE
4
3
DE
RE
}
NOTE 14
R
10
9
Z
Y
B
A
T
11
12
RO
5
DI
2
R
D
GND
GND
6, 7
6, 7
FN7967.0
June 22, 2012
4
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Absolute Maximum Ratings
Thermal Information
V
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Thermal Resistance (Typical, Notes 4, 5)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . .
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . .
10 Ld MSOP Package . . . . . . . . . . . . . . . . . .
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . .
θ
JA (°C/W)
105
θ
JC (°C/W)
CC
Input Voltages
47
40
59
39
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input/Output Voltages
140
160
128
A, B, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
A/Y, B/Z, Y, Z (V = 0V or ≥ 3V) . . . . . . . . . . . . . . . . . . . . . . . -8V to +13V
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CC
A/Y, B/Z, Y, Z (1.8V ≤ V < 3V) . . . . . . . . . . . . . . . . . . . . . . . -8V to +11V
CC
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V +0.3V)
CC
Short Circuit Duration
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indeterminate
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Latch-up (per JESD78, Level 2, Class A). . . . . . . . . . . . . . . . . . . . . . +125°C
Recommended Operating Conditions
Recommended Operating Conditions (continued)
Supply Voltage Range
Common Mode Range
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 3.3V
ISL32602E, ISL32603E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 3.3V
Differential Load Resistance
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60Ω or 120Ω
ISL32602E, ISL32603E . . . . . . . . . . . . . . . ≥10kΩ @ 1.8V; 120Ω @ 3.3V
ISL32600E, ISL32601E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to +12V
ISL32602E, ISL32603E
V
V
= 1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to +2V
= 3.3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to +12V
CC
CC
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
5. For θ , the “case temp” location is taken at the package top center.
JC
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: V = 2.7V to 3.6V; Typicals are at V = 3V, T = +25°C;
CC
CC
A
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6)
TEMP
(°C)
MIN
(Note 15)
MAX
(Note 15) UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
TYP
DC CHARACTERISTICS
Driver Differential V
OUT
V
R = 100Ω (RS-422) (Figure 3A, V ≥ 3.15V)
Full
Full
Full
Full
Full
1.95
1.2
1.4
-
2.1
1.5
1.7
-
-
V
V
V
V
V
OD
L
CC
R = 54Ω (RS-485)
(Figure 3A)
V
V
= 2.7V
V
V
V
L
CC
CC
≥ 3V
CC
CC
No Load
CC
-
R = 60Ω, -7V ≤ V ≤ 12V (Figure 3B,
1.3
-
L
CM
V
≥ 3V)
CC
Change in Magnitude of Driver
Differential V for
ΔV
R = 54Ω or 100Ω (Figure 3A)
Full
-
0.01
0.2
V
OD
L
OUT
Complementary Output States
Driver Common-Mode V
OUT
V
R = 54Ω or 100Ω (Figure 3A)
Full
Full
-
-
-
3
V
V
OC
L
Change in Magnitude of Driver
Common-Mode V for
ΔV
R = 54Ω or 100Ω (Figure 3A)
0.01
0.2
OC
L
OUT
Complementary Output States
Output Leakage Current (Y, Z) (Full
Duplex Versions Only)
I
DE = 0V, V = 0V
CC
V
V
V
= 12V (V ≥ 3V)
CC
Full
Full
Full
Full
-
3
3
60
60
µA
µA
µA
mA
OZD
IN
IN
IN
(-7V ≤ V ≤ 12V) or
IN
= 10V (V = 2.7V)
CC
-
-30
-
2.7V ≤ V ≤ 3.6V
CC
= -7V
-10
-
-
Driver Short-Circuit Current,
I
DE = V , -7V ≤ V or V ≤ 12V (Note 8)
±250
OSD
CC
Y
Z
V
= High or Low
O
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DI, DE, RE
DI, DE, RE
Full
Full
Full
2
-
-
-
-
-
V
V
IH
V
0.7
1
IL
I
DI = DE = RE = 0V or V (Note 14)
CC
-1
µA
IN1
FN7967.0
June 22, 2012
5
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: V = 2.7V to 3.6V; Typicals are at V = 3V, T = +25°C;
CC
CC
A
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
TEMP
(°C)
MIN
(Note 15)
MAX
(Note 15) UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
DE = 0V, V = 0V = 12V (V ≥ 2.7V
TYP
80
Input Current (A, B, A/Y, B/Z)
I
V
Full
-
-
-
125
125
125
µA
µA
µA
IN2
CC
IN
for A, B)
CC
(-7V ≤ V ≤ 12V) or
IN
2.7V ≤ V ≤ 3.6V
CC
V
= 12V (V ≥ 3V for
CC
Full
Full
80
80
IN
A/Y, B/Z)
V
= 10V (V = 2.7V
CC
IN
for A/Y, B/Z)
V
= -7V
Full
Full
-100
-200
-50
0
-
µA
IN
Receiver Differential Threshold
Voltage
V
-7V ≤ V ≤ 12V
CM
200
mV
TH
Receiver Input Hysteresis
Receiver Output High Voltage
Receiver Output Low Voltage
ΔV
-7V ≤ V ≤ 12V
CM
Full
Full
Full
Full
-
40
-
-
mV
V
TH
V
I
= -4mA, V = 200mV
ID
V - 0.5
CC
-
-
-
OH
O
O
V
I
= 4mA, V = -200mV
ID
-
0.4
1
V
OL
Three-State (high impedance)
Receiver Output Current
I
0V ≤ V ≤ V , RE = V
-1
µA
OZR
O
CC
CC
Receiver Short-Circuit Current
SUPPLY CURRENT
I
0V ≤ V ≤ V
Full
-
30
±60
mA
OSR
O
CC
No-Load Supply Current (Note 7)
I
DI = 0V or V
CC
,
V
V
= 3V
Full
Full
-
-
60
70
100
120
µA
µA
CC
CC
DE = V , RE = 0V or
CC
= 3.6V
CC
V
CC
DI = 0V or V , Rx Only
CC
(DE = 0V, RE = 0V)
V
V
= 3V
Full
Full
Full
-
-
-
42
46
65
80
1
µA
µA
µA
CC
= 3.6V
CC
Shutdown Supply Current
ESD PERFORMANCE
I
DE = 0V, RE = V , DI = 0V or V
CC CC
0.01
SHDN
RS-485 Pins (A, Y, B, Z, A/Y, B/Z)
IEC61000-4-2, Air-Gap Discharge Method
IEC61000-4-2, Contact Discharge Method
Human Body Model, From Bus Pins to GND
HBM, per MIL-STD-883 Method 3015
Machine Model
25
25
25
25
25
-
-
-
-
-
±15
±8
-
-
-
-
-
kV
kV
kV
kV
V
±15
±8
All Pins
400
SWITCHING CHARACTERISTICS
Maximum Data Rate
f
R
= 54Ω,
V
V
= 2.7V
Full
Full
Full
Full
Full
Full
128
-
-
kbps
kbps
ns
MAX
DIFF
(Figures 6, 7)
CC
≥ 3V
256
-
340
1
-
CC
Driver Differential Output Delay
Driver Differential Output Skew
Driver Differential Rise or Fall Time
Driver Enable to Output High
t
R
R
R
= 54Ω, C = 50pF (Figure 4)
-
600
30
DD
DIFF
DIFF
DIFF
D
t
= 54Ω, C = 50pF (Figure 4)
-
200
-
ns
SKEW
D
t , t
= 54Ω, C = 50pF (Figure 4)
400
-
1000
1000
ns
R
F
D
t
R = 1kΩ, C = 50pF, SW = GND (Figure 5),
ns
ZH
L
L
(Note 9)
Driver Enable to Output Low
t
R = 1kΩ, C = 50pF, SW = V (Figure 5),
Full
-
-
1000
ns
ZL
L
L
CC
(Note 9)
Driver Disable from Output High
Driver Disable from Output Low
t
R = 1kΩ, C = 50pF, SW = GND (Figure 5)
Full
Full
Full
-
-
-
-
-
-
150
150
10
ns
ns
µs
HZ
L
L
t
R = 1kΩ, C = 50pF, SW = V (Figure 5)
CC
LZ
ZH(SHDN)
L
L
Driver Enable from Shutdown to
Output High
t
R = 1kΩ, C = 50pF, SW = GND (Figure 5),
L L
(Notes 11, 12)
FN7967.0
June 22, 2012
6
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Electrical Specifications ISL32600E, ISL32601E: Test Conditions: V = 2.7V to 3.6V; Typicals are at V = 3V, T = +25°C;
CC
CC
A
Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
TEMP
(°C)
MIN
(Note 15)
MAX
(Note 15) UNITS
PARAMETER
SYMBOL
TEST CONDITIONS
R = 1kΩ, C = 50pF, SW = V (Figure 5),
TYP
-
Driver Enable from Shutdown to
Output Low
t
Full
-
10
µs
ZL(SHDN)
L
L
CC
(Notes 11, 12)
Time to Shutdown
t
(Note 11)
Full
Full
Full
Full
50
-
600
1300
300
50
ns
ns
ns
ns
SHDN
, t
Receiver Input to Output Delay
t
PLH PHL
(Figure 7)
-
-
-
750
115
-
Receiver Skew | t
- t
PLH PHL
|
t
(Figure 7)
SKD
Receiver Enable to Output High
t
R = 1kΩ, C = 15pF, SW = GND (Figure 8),
ZH
L
L
(Note 10)
Receiver Enable to Output Low
t
R = 1kΩ, C = 15pF, SW = V (Figure 8),
Full
-
-
50
ns
ZL
L
L
CC
(Note 10)
Receiver Disable from Output High
Receiver Disable from Output Low
t
R = 1kΩ, C = 15pF, SW = GND (Figure 8)
Full
Full
Full
-
-
-
12
13
-
50
50
12
ns
ns
µs
HZ
L
L
t
R = 1kΩ, C = 15pF, SW = V (Figure 8)
CC
LZ
ZH(SHDN)
L
L
Receiver Enable from Shutdown to
Output High
t
R = 1kΩ, C = 15pF, SW = GND (Figure 8),
L L
(Notes 11, 13)
Receiver Enable from Shutdown to
Output Low
t
R = 1kΩ, C = 15pF, SW = V (Figure 8),
(Notes 11, 13)
Full
-
-
12
µs
ZL(SHDN)
L
L
CC
NOTES:
6. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
7. Supply current specification is valid for loaded drivers when DE = 0V.
8. Applies to peak current. See “Typical Performance Curves” starting on page 14 for more information.
9. When testing this parameter, keep RE = 0 to prevent the device from entering SHDN.
10. When testing this parameter, the RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
11. Devices are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts are guaranteed not to enter
shutdown. If the inputs are in this state for at least 600ns (1200ns if V =1.8V), the parts are guaranteed to have entered shutdown. See “Low Power
CC
Shutdown Mode” on page 13.
12. Keep RE = V , and set the DE signal low time >600ns (1200ns if V =1.8V) to ensure that the device enters SHDN.
CC CC
13. Set the RE signal high time >600ns (1200ns if V =1.8V) to ensure that the device enters SHDN.
CC
14. If the Tx or Rx enable function isn’t needed, connect the enable pin to the appropriate supply (see “Pin Descriptions” on page 3).
15. Compliance to data sheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: V = 1.8V to 3.6V; Typicals are at V = 1.8V,
CC
CC
T
= +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6)
A
TEMP
MIN
MAX
PARAMETER
DC CHARACTERISTICS
Driver Differential V
SYMBOL
TEST CONDITIONS
(°C) (Note 15) TYP (Note 15) UNITS
V
R
= 100Ω (RS-422)
V
V
= 1.8V
Full
Full
Full
Full
Full
0.8
1.95
1.1
0.9
2.25
1.4
1.95
-
-
-
V
V
OUT
OD
L
CC
(Figure 3A)
≥ 3.15V
CC
No Load, V = 1.8V
V
CC
CC
R
R
= 54Ω (RS-485) (Figure 3A, V ≥ 3V)
1.5
-
V
V
L
CC
= 60Ω, -7V ≤ V ≤ 12V (Figure 3B,
CM
1.3
-
L
V
≥ 3V)
CC
Change in Magnitude of Driver
Differential V for
Complementary Output States
ΔV
R
= 100Ω (Figure 3A)
Full
Full
-
-
0.01
-
0.2
3
V
V
OD
L
OUT
Driver Common-Mode V
OUT
V
R
= 100Ω (Figure 3A)
OC
L
FN7967.0
June 22, 2012
7
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: V = 1.8V to 3.6V; Typicals are at V = 1.8V,
CC
CC
T
= +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
A
TEMP
MIN
MAX
PARAMETER
Change in Magnitude of Driver
SYMBOL
TEST CONDITIONS
= 100Ω (Figure 3A)
L
(°C) (Note 15) TYP (Note 15) UNITS
ΔV
R
Full
-
0.01
0.2
V
OC
Common-Mode V for
OUT
Complementary Output States
Output Leakage Current (Y, Z)
(Full Duplex Versions Only)
I
DE = 0V, V = 0V
CC
V
V
V
= 12V (V ≥ 3V)
CC
Full
Full
Full
-
1
1
60
60
µA
µA
µA
mA
OZD
OUT
OUT
OUT
(-7V ≤ V ≤ 12V) or
IN
= 10V (V = 1.8V)
CC
-
-30
-
1.8V or
3V ≤ V ≤ 3.6V
= -7V
-10
-
-
CC
Driver Short-Circuit Current,
I
DE = V , -7V ≤ V or V ≤ 12V (3.0V ≤ V ≤ 3.6V) or Full
CC CC
±250
OSD
Y
Z
V
= High or Low
-7V ≤ V or V ≤ 10V (V = 1.8V) (Note 8)
O
Y
Z
CC
Logic Input High Voltage
V
DI, DE, RE
V
≥ 1.8V
≥ 3V
Full
Full
Full
Full
Full
Full
1.26
-
-
V
V
IH
CC
CC
CC
CC
V
V
V
2
-
-
-
Logic Input Low Voltage
V
DI, DE, RE
≥ 1.8V
≥ 3V
-
-
0.4
0.8
1
V
IL
-
V
Logic Input Current
I
DI = DE = RE = 0V or V (Note 14)
CC
-1
-
-
µA
µA
µA
IN1
IN2
Input Current (A, B, A/Y, B/Z)
I
DE = 0V, V = 0V
CC
V
= 12V (A, B Only)
80
80
125
125
IN
(-7V ≤ V ≤ 12V) or
IN
V
B/Z)
= 12V (V ≥ 3V for A/Y, Full
CC
-
IN
1.8V or
3V ≤ V ≤ 3.6V
CC
V
= 10V (V = 1.8V for
Full
-
80
125
µA
IN
A/Y, B/Z)
CC
V
= -7V
Full
Full
-100
-200
-50
0
-
µA
IN
Receiver Differential Threshold
Voltage
V
-7V ≤ V or V ≤ 2V at V = 1.8V or -7V ≤ V or
200
mV
TH
Y
Z
CC
Y
V
≤ 12V at V ≥ 3V
Z
CC
Receiver Input Hysteresis
ΔV
-7V ≤ V or V ≤ 2V at V = 1.8V or -7V ≤ V or
CC
Full
-
65
-
mV
TH
Y
Z
Y
V
≤ 12V at V ≥ 3V
Z
CC
Receiver Output High Voltage
Receiver Output Low Voltage
V
I
I
= -1mA, V = 200mV
ID
Full
Full
Full
V - 0.4
CC
-
-
-
-
V
V
OH
O
V
= 2.2mA, V = -200mV
O ID
-
0.4
1
OL
Three-State (high impedance)
Receiver Output Current
I
0V ≤ V ≤ V , RE = V
-1
µA
OZR
O
CC
CC
Receiver Short-Circuit Current
SUPPLY CURRENT
I
0V ≤ V ≤ V
Full
-
-
±60
mA
OSR
O
CC
No-Load Supply Current (Note 7)
I
DI = 0V or V
,
V
V
= 1.8V
= 3.6V
Full
Full
-
-
105
150
150
350
µA
µA
CC
CC
CC
DE = V , RE = 0V or
CC
CC
V
CC
DI = 0V or V , Rx Only
CC
(DE = 0V,
RE = 0V)
V
V
= 1.8V
= 3.6V
Full
Full
-
-
90
115
260
µA
µA
CC
125
CC
Shutdown Supply Current
ESD PERFORMANCE
I
DE = 0V, RE = V , DI = 0V or V
CC CC
Full
-
-
1
µA
SHDN
RS-485 Pins (A, Y, B, Z, A/Y, B/Z)
IEC61000-4-2, Air-Gap Discharge Method
IEC61000-4-2, Contact Discharge Method
Human Body Model, From Bus Pins to GND
HBM, per MIL-STD-883 Method 3015
Machine Model
25
25
25
25
25
-
-
-
-
-
±15
±8
-
-
-
-
-
kV
kV
kV
kV
V
±15
±8
All Pins
400
FN7967.0
June 22, 2012
8
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Electrical Specifications ISL32602E, ISL32603E: Test Conditions: V = 1.8V to 3.6V; Typicals are at V = 1.8V,
CC
CC
T
= +25°C; Unless Otherwise Specified. Boldface limits apply over the operating temperature range. (Note 6) (Continued)
A
TEMP
MIN
MAX
PARAMETER
SYMBOL
TEST CONDITIONS
(°C) (Note 15) TYP (Note 15) UNITS
SWITCHING CHARACTERISTICS
Maximum Data Rate
f
(Figures 6, 7)
V
V
V
V
V
V
V
V
= 1.8V, R
= ∞
Full
Full
Full
Full
Full
Full
Full
Full
Full
256
-
-
-
kbps
kbps
ns
MAX
CC
CC
CC
CC
CC
CC
CC
CC
DIFF
≥ 3V, R
= 54Ω
460
-
DIFF
Driver Differential Output Delay
Driver Differential Output Skew
Driver Differential Rise or Fall Time
t
C
C
C
= 50pF (Figure 4)
= 50pF (Figure 4)
= 50pF (Figure 4)
= 1.8V, R
= ∞
-
750
350
120
2
2600
1500
220
100
4500
900
3000
DD
D
D
D
DIFF
≥ 3V, R
= 54Ω
-
ns
DIFF
t
= 1.8V, R
= ∞
-
ns
SKEW
DIFF
≥ 3V, R
= 54Ω
-
ns
DIFF
t , t
= 1.8V, R
= ∞
150
200
-
1700
400
-
ns
R
F
DIFF
≥ 3V, R
= 54Ω
ns
DIFF
Driver Enable to Output High
Driver Enable to Output Low
t
R
= 1kΩ, C = 50pF, SW = GND (Figure 5),
ns
ZH
L
L
(Note 9)
t
R
= 1kΩ, C = 50pF, SW = V (Figure 5),
Full
-
-
3000
ns
ZL
L
L
CC
(Note 9)
Driver Disable from Output High
Driver Disable from Output Low
t
R
R
R
= 1kΩ, C = 50pF, SW = GND (Figure 5)
Full
Full
Full
-
-
-
-
-
-
250
250
ns
ns
ns
HZ
L
L
L
L
t
= 1kΩ, C = 50pF, SW = V (Figure 5)
CC
LZ
ZH(SHDN)
L
Driver Enable from Shutdown to
Output High
t
= 1kΩ, C = 50pF, SW = GND (Figure 5),
3000
L
(Notes 11, 12)
Driver Enable from Shutdown to
Output Low
t
R
= 1kΩ, C = 50pF, SW = V (Figure 5),
Full
-
-
3000
ns
ZL(SHDN)
L
L
CC
(Notes 11, 12)
Time to Shutdown
t
(Note 11)
Full
Full
Full
50
500
1200
1000
250
100
100
75
ns
ns
ns
ns
ns
ns
ns
ns
SHDN
, t
Receiver Input to Output Delay
t
PLH PHL
(Figure 7)
-
-
-
-
-
-
-
180
Receiver Skew | t
- t
PLH PHL
|
t
(Figure 7)
35
SKD
Receiver Enable to Output High
Receiver Enable to Output Low
Receiver Disable from Output High
Receiver Disable from Output Low
t
R = 1kΩ, C = 15pF, SW = GND (Figure 8), (Note 10) Full
-
-
-
-
-
ZH
L
L
L
L
L
L
t
R
R
R
R
= 1kΩ, C = 15pF, SW = V (Figure 8), (Note 10)
CC
Full
Full
Full
Full
ZL
L
t
= 1kΩ, C = 15pF, SW = GND (Figure 8)
L
HZ
t
= 1kΩ, C = 15pF, SW = V (Figure 8)
CC
75
LZ
L
Receiver Enable from Shutdown to
Output High
t
= 1kΩ, C = 15pF, SW = GND (Figure 8),
5500
ZH(SHDN)
L
(Notes 11, 13)
Receiver Enable from Shutdown to
Output Low
t
R
= 1kΩ, C = 15pF, SW = V (Figure 8),
Full
-
-
5500
ns
ZL(SHDN)
L
L
CC
(Notes 11, 13)
FN7967.0
June 22, 2012
9
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Test Circuits and Waveforms
R /2
L
375Ω
DE
DI
DE
DI
V
V
CC
CC
Z
Y
Z
Y
V
CM
R
= 60Ω
V
V
OD
L
D
D
OD
-7V to +12V
V
R /2
L
375Ω
OC
FIGURE 3B. V WITH COMMON MODE LOAD
OD
FIGURE 3A. V AND V
OD
OC
FIGURE 3. DC DRIVER TEST CIRCUITS
V
CC
DI
50%
50%
0V
t
t
DDHL
DDLH
DE
V
CC
V
OH
OUT (Z)
Z
DI
R
C
D
DIFF
D
Y
V
OUT (Y)
OL
SIGNAL
GENERATOR
+V
OD
90%
10%
90%
10%
DIFF OUT (Y - Z)
-V
OD
t
t
R
F
t
= |t
- t |
DDLH DDHL
SKEW
FIGURE 4A. TEST CIRCUIT
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 4B. MEASUREMENT POINTS
DE
DI
Z
Y
1kΩ
V
CC
V
CC
D
GND
DE
SW
50%
50%
HZ
SIGNAL
GENERATOR
NOTE 11
50pF
0V
t
, t
ZH ZH(SHDN)
NOTE 11
t
OUTPUT HIGH
50%
V
OH
V
- 0.25V
OH
OUT (Y, Z)
PARAMETER
OUTPUT
RE
X
DI
SW
0V
t
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
Y/Z
1/0
0/1
1/0
0/1
1/0
0/1
GND
HZ
t
, t
t
t
X
V
ZL ZL(SHDN)
t
LZ
LZ
CC
NOTE 11
0 (Note 9)
0 (Note 9)
1 (Note 12)
1 (Note 12)
GND
V
ZH
CC
OL
t
V
OUT (Y, Z)
50%
ZL
CC
V
+ 0.25V
t
GND
OL
V
ZH(SHDN)
OUTPUT LOW
t
V
CC
ZL(SHDN)
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
FN7967.0
June 22, 2012
10
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Test Circuits and Waveforms(Continued)
DE
V
CC
V
CC
-
DI
Z
Y
DI
0V
V
50pF
R
OD
+
D
DIFF
+V
SIGNAL
GENERATOR
OD
DIFF OUT (Y - Z)
0V
-V
OD
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6A. TEST CIRCUIT
FIGURE 6. DRIVER DATA RATE
+1V
-1V
RE
B
15pF
A
0V
0V
GND
RO
R
A
t
t
PHL
PLH
V
CC
SIGNAL
GENERATOR
50%
50%
RO
0V
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7A. TEST CIRCUIT
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
RE
NOTE 11
B
A
1kΩ
V
V
CC
GND
CC
RO
R
RE
50%
50%
HZ
GND
SW
SIGNAL
0V
GENERATOR
15pF
t
, t
ZH ZH(SHDN)
t
NOTE 11
OUTPUT HIGH
1.5V
V
OH
V
- 0.25V
OH
RO
PARAMETER
DE
X
A
SW
0V
t
+1.5V
-1.5V
+1.5V
-1.5V
+1.5V
-1.5V
GND
HZ
t
, t
t
X
V
ZL ZL(SHDN)
t
LZ
LZ
CC
NOTE 11
t
(Note 10)
(Note 10)
0
GND
V
ZH
CC
RO
t
0
V
1.5V
ZL
CC
V
+ 0.25V
OL
t
(Note 13)
0
GND
V
ZH(SHDN)
OL
OUTPUT LOW
t
(Note 11)
0
V
CC
ZL(SHDN)
FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
FIGURE 8A. TEST CIRCUIT
Another important advantage of RS-485 is the extended
Application Information
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
-7V to +12V. RS-422 and RS-485 are intended for runs as long
as 4000’, so the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable
by external fields.
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices) receivers
on each bus. RS-485 is a true multipoint standard, which
allows up to 32 one-unit load devices (any combination of
drivers and receivers) on each bus. To allow for multipoint
operation, the RS-485 spec requires that drivers must handle
bus contention without sustaining any damage.
Receiver Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications. The symmetrical ±200mV switching thresholds
FN7967.0
June 22, 2012
11
ISL32600E, ISL32601E, ISL32602E, ISL32603E
eliminate the duty cycle distortion that occurs on receivers with
full fail safe (FFS) functionality and with slowly transitioning
input signals (see Figure 9). FFS receiver switching points have a
Driver Features
These drivers are differential output devices that deliver at
least 1.4V with V ≥ 3V across a 54Ω load (RS-485) and at
CC
1
least 1.95V with V ≥ 3.15V across a 100Ω load (RS-422).
CC
A-B
0
The 1.8V transmitters deliver a 1.1V unloaded, differential
level. Drivers operate at data rates from 128kbps to 460kbps -
depending on the supply voltage - and they feature low
propagation delay skews to maximize bit width. Driver outputs
are slew rate limited to minimize EMI and to reduce reflections
in unterminated or improperly terminated networks.
-1
4
ISL3260XE
0
All drivers are tri-statable via the active high DE input. There
are no parasitic nor ESD diodes to V on the DI and DE inputs,
CC
so these inputs are tolerant of input voltages up to 5.5V, even
4
with the ISL3260XE powered down (i.e., V = 0V).
CC
ISL3172E
0
1.8V Operation
The ISL32602E and ISL32603E are specifically designed to
operate with supply voltages as low as 1.8V. Termination
resistors should be avoided at this operating condition, and the
unterminated driver is guaranteed to deliver a healthy 1.1V
differential output voltage. This low supply voltage limits the
V
= 3.3V, DATA RATE = 125kbps
CC
TIME (4µs/DIV)
FIGURE 9. COMPARED WITH A FULL-FAILSAFE ISL3172E
RECEIVER, THE SYMMETRICAL RX THRESHOLDS OF
THE ISL3260XE DELIVER LESS OUTPUT DUTY CYCLE
DISTORTION WHEN DRIVEN WITH SLOW INPUT
SIGNALS
+CMR to +2V, but the CMR increases as V increases.
CC
To get good 1.8V operation, the ISL32602E and ISL32603E
have to run at a higher operating current. Thus, their I with
CC
V
= 3.3V is considerably higher than the I of the
CC
CC
negative offset, so the RO high time is naturally longer than the
low time. The ISL3260XE’s larger receiver input sensitivity range
enables an increase of the receiver input hysteresis. The 40mV
to 65mV receiver hysteresis increases the noise immunity,
which is a big advantage for noisy networks, or networks with
slow bus transitions.
ISL32600E and ISL32601E, which are optimized for low I at
3.3V (see Figures 1 and 2).
CC
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure that the RS-485 Tx and Rx
outputs are kept disabled. If the equipment is connected to the
bus, a driver activating prematurely during power up may
crash the bus. To avoid this scenario, the ISL3260XE devices
incorporate a “Hot Plug” function. During power up, circuitry
Receiver input resistance of 96kΩ surpasses the RS-422 spec
of 4kΩ and is eight times the RS-485 “Unit Load (UL)”
requirement of 12kΩ minimum. Thus, these products are
known as “one-eighth UL” transceivers and there can be up to
256 of these devices on a network while still complying with
the RS-485 loading specification.
monitoring V ensures that the Tx and Rx outputs remain
CC
disabled for a period of time, regardless of the state of DE and RE.
This gives the processor/ASIC a chance to stabilize and drive the
RS-485 control lines to the proper states.
Receiver inputs function with common mode voltages as great
as +9V/-7V outside the power supplies (i.e., +12V and -7V) at
V
= 3V, making them ideal for long networks where induced
CC
voltages and ground potential differences are realistic concerns.
The positive CMR is limited to +2V when the ISL32602E or
ESD Protection
All pins on these devices include class 3 (>8kV) Human Body
Model (HBM) ESD protection structures, but the RS-485 pins
(driver outputs and receiver inputs) incorporate advanced
structures allowing them to survive ESD events in excess of
±15kV HBM and ±15kV IEC61000. The RS-485 pins are
particularly vulnerable to ESD damage because they typically
connect to an exposed port on the exterior of the finished
product. Simply touching the port pins, or connecting a cable,
can cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or not it
is powered up, and without degrading the transceiver’s
common mode range. This built-in ESD protection eliminates
the need for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
ISL32603E is operated with V = 1.8V.
CC
All the receivers include a “Fail-Safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating). Because the Rx is not full failsafe,
terminated networks may require bus biasing resistors (pull-up
on noninverting input, pull-down on inverting input) to preserve
the bus idle state when the bus is not actively driven.
Receivers operate at data rates from 128kbps to 460kbps -
depending on the supply voltage - and all receiver outputs are
tri-statable via the active low RE input. There are no parasitic
nor ESD diodes to V on the RE input, so it is tolerant of input
CC
voltages up to 5.5V, even with the ISL3260XE powered down
(i.e., V = 0V).
CC
FN7967.0
June 22, 2012
12
ISL32600E, ISL32601E, ISL32602E, ISL32603E
main cable be terminated in its characteristic impedance at
both ends. Stubs connecting a transceiver to the main cable
should be kept as short as possible.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-485 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge storage
capacitor yields a test that is much more severe than the HBM
test. The extra ESD protection built into this device’s RS-485
pins allows the design of equipment meeting level 4 criteria
without the need for additional board level protection on the
RS-485 port.
Terminated networks using the ISL3260XE may require bus
biasing resistors (pull-up on noninverting input, pull-down on
inverting input) to preserve the bus idle state when the bus is
not actively driven. Without bus biasing, the termination
resistor collapses the undriven, differential bus voltage to 0V,
which is an undefined level to the ISL3260XE Rx. Bus biasing
forces a few hundred milli-volt positive differential voltage on
the undriven bus, which all RS-485/422 Rx interpret as a valid
logic high.
Built-In Driver Overload Protection
AIR-GAP DISCHARGE TEST METHOD
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. These devices
meet this requirement via driver output short circuit current
limits, and on-chip thermal shutdown circuitry.
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc. so it is difficult to obtain repeatable results.
The ISL3260XE RS-485 pins withstand ±15kV air-gap
discharges.
The driver output stages incorporate short circuit current
limiting circuitry that ensures that the output current never
exceeds the RS-485 spec, even at the common mode voltage
range extremes. Additionally, these devices utilize a foldback
circuit which reduces the short circuit current, and thus the
power dissipation, whenever the contending voltage exceeds
either supply.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. The ISL3260XE survive ±8kV contact
discharges on the RS-485 pins.
In the event of a major short circuit condition, these ICs also
include a thermal shutdown feature that disables the drivers
whenever the die temperature becomes excessive. This
eliminates the power dissipation, allowing the die to cool. The
drivers automatically re-enable after the die temperature
drops by about 20°C. If the condition persists, the thermal
shutdown / re-enable cycle repeats until the fault is cleared.
Receivers remain operational during thermal shutdown.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’
(1220m), but the maximum system data rate decreases as the
transmission length increases. The ISL32600E and ISL32601E
operate at data rates up to 128kbps at the maximum (4000’)
distance, or at data rates of 256kbps for cable lengths less
than 3000’ (915m). The ISL32602E and ISL32603E, with
Low Power Shutdown Mode
These micro-power transceivers all use a fraction of the power
required by their counterparts, but they also include a
V
= 1.8V, are limited to 1000’ (305m) at 256kbps, or 2000’
shutdown feature that reduces the already low quiescent I to
a 10nA trickle. These devices enter shutdown whenever the
CC
CC
(610m) at 128kbps. With V = 3.3V, the ISL32602E and
CC
ISL32603E deliver 460kbps over 2000’, 256kbps over 3000’,
or 128kbps over 4000’ cables.
receiver and driver are simultaneously disabled (RE = V and
DE = GND) for a period of at least 600ns (1200ns at
CC
V
= 1.8V). Disabling both the driver and the receiver for less
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
CC
than 50ns guarantees that the transceiver will not enter
shutdown.
Note that most receiver and driver enable times increase when
the transceiver enables from shutdown. Refer to Notes 9 through
13, at the end of the “Electrical Specification table” on page 7, for
more information.
Short networks using these transceivers need not be
terminated, but terminations are recommended for 2.7V to
3.6V powered networks unless power dissipation is an
overriding concern. Terminations are not recommended for
1.8V applications, due to the low drive available from those
transmitters.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
connecting receivers to the main cable should be kept as short
as possible. Multipoint (multi-driver) systems require that the
FN7967.0
June 22, 2012
13
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Performance Curves V = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), T = +25°C; Unless Otherwise
CC
A
Specified
30
25
20
15
10
5
2.9
V
, +25°C
OL
2.7
2.5
2.3
2.1
1.9
1.7
1.5
R
= 10kΩ
DIFF
V
, +125°C
OL
V
, +85°C
OL
R
= 100Ω
0
DIFF
-5
V
, +85°C
1.5
OH
-10
-15
-20
V
, +125°C
0.5
OH
R
= 54Ω
V
, +25°C
DIFF
OH
-40 -25 -10
5
20
35
50 65
80
95 110 125
0
1.0
2.0
2.5
3.0
TEMPERATURE (°C)
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 10. ISL32600E, ISL32601E DRIVER DIFFERENTIAL
OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 11. ISL32600E, ISL32601E RECEIVER OUTPUT CURRENT
vs RECEIVER OUTPUT VOLTAGE
70
10m
R
= ∞, C = 50pF
D
RE = 0V
D
V
= 3.3V
CC
256kbps
DE = V , RE = 0V
65
60
55
50
45
40
35
30
25
CC
V
= 3.0V
CC
128kbps
DE = V
CC
V
= 2.7V
CC
1m
Tx AND Rx BOTH
SWITCHING
V
= 3.3V
CC
DE = 0V
V
= 3.0V
CC
9.6kbps
V
= 2.7V
50
CC
100µ
2.7
2.8
2.9
3.0
3.1
3.2
(V)
3.3
3.4
3.5
3.6
-40 -25 -10
5
20
35
65
80
95 110 125
V
CC
TEMPERATURE (°C)
FIGURE 12. ISL32600E, ISL32601E STATIC SUPPLY CURRENT vs
TEMPERATURE
FIGURE 13. ISL32600E, ISL32601E DYNAMIC SUPPLY CURRENT
vs SUPPLY VOLTAGE AT DIFFERENT DATA RATES
3
3
DI
DI
0
0
3
2
3
2
1
1
A-B
0
A-B
0
-1
-1
-2
-2
RD = ∞
RD = ∞
3
2
1
0
3
2
1
0
TIME (10µs/DIV)
TIME (20µs/DIV)
FIGURE 14. ISL32600E, ISL32601E PERFORMANCE WITH
FIGURE 15. ISL32600E, ISL32601E PERFORMANCE WITH
V
= 3V, 256kbps, 3000’ (915m) CAT 5 CABLE
V
= 2.7V, 128kbps, 4000’ (1220m) CAT 5 CABLE
CC
CC
FN7967.0
June 22, 2012
14
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Performance Curves V = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), T = +25°C; Unless Otherwise
CC
A
Specified (Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0
400
R
= 54Ω, C = 50pF
D
R
= 54Ω, C = 50pF
D
D
D
390
380
370
360
350
340
330
t
DDLH
t
DDHL
5
t
= |t
- t |
DDLH DDHL
SKEW
-40 -25 -10
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 16. ISL32600E, ISL32601E DRIVER DIFFERENTIAL
PROPAGATION DELAY vs TEMPERATURE
FIGURE 17. ISL32600E, ISL32601E DRIVER DIFFERENTIAL SKEW
vs TEMPERATURE
130
128
126
124
122
120
118
116
114
112
1000
950
900
850
800
t
PLH
750
700
650
600
t
PHL
65
t
= |t |
- t
95 110 125
SKEW
65 80
TEMPERATURE (°C)
PLH PHL
110
-40 -25 -10
-40 -25 -10
5
20
35
50
80
95 110 125
5
20
35
50
TEMPERATURE (°C)
FIGURE 19. ISL32600E, ISL32601E RECEIVER SKEW vs
TEMPERATURE
FIGURE 18. ISL32600E, ISL32601E RECEIVER PROPAGATION
DELAY vs TEMPERATURE
R
= 54Ω, C = 50pF
D
DIFF
R
= 54Ω, C = 50pF
D
DIFF
3
0
3
0
DI
DI
3
0
3
0
RO
RO
2
2
1
0
1
0
A/Y - B/Z
A/Y - B/Z
-1
-2
-1
-2
TIME (200ns/DIV)
TIME (200ns/DIV)
FIGURE 20. ISL32600E, ISL32601E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 21. ISL32600E, ISL32601E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
FN7967.0
June 22, 2012
15
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Performance Curves V = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), T = +25°C; Unless Otherwise
CC
A
Specified (Continued)
140
120
100
80
200
-40°C
150
100
+25°C
-40°C
+25°C
+125°C
Y OR Z = LOW
50
0
60
Y OR Z = LOW
+125°C
40
+25°C
Y OR Z = HIGH
20
-50
-100
-150
-40°C
0
+125°C
+25°C
+125°C
-40°C
-20
-40
Y OR Z = HIGH
-40°C
-7 -6 -5 -4 -3 -2 -1
OUTPUT VOLTAGE (V)
0
1
2
3
4
5
6
7
8
9
10 11 12
-7 -6 -5 -4 -3 -2 -1
0
1
2
3
4
5
6
7
8 9 10 11 12
OUTPUT VOLTAGE (V)
FIGURE 22. ISL32600E, ISL32601E DRIVER OUTPUT CURRENT
vs SHORT CIRCUIT VOLTAGE
FIGURE 23. ISL32602E, ISL32603E DRIVER OUTPUT CURRENT
vs SHORT CIRCUIT VOLTAGE
2.5
30
V
= 3.3V, R = 100Ω
DIFF
CC
V
, +25°C
OL
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
20
10
0
V
, +125°C
V
= 3.3V
V
, +85°C
OL
CC
OL
V
V
V
, +25°C
, +85°C
, +125°C
OL
OL
OL
V
V
= 3.3V, R
= 1.8V, R
= 54Ω
= 10kΩ
= 100Ω
CC
DIFF
V
= 1.8V
CC
V
, +25°C, +85°C, +125°C
OH
CC
CC
DIFF
-10
-20
-30
V
, +85°C
OH
V
, +125°C
OH
V
= 3.3V
CC
V
= 1.8V, R
DIFF
5
V
, +25°C
OH
0
0.5
1.0
1.5
2.0
2.5
3.0 3.3
-40 -25 -10
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
RECEIVER OUTPUT VOLTAGE (V)
FIGURE 24. ISL32602E, ISL32603E DRIVER DIFFERENTIAL
OUTPUT VOLTAGE vs TEMPERATURE
FIGURE 25. ISL32602E, ISL32603E RECEIVER OUTPUT CURRENT
vs RECEIVER OUTPUT VOLTAGE
100m
180
Tx AND Rx BOTH
SWITCHING
R
= ∞, C = 50pF
D
D
RE = 0V
DE = V , RE = 0V
CC
160
140
120
100
80
460kbps
10m
256kbps
V
= 3.3V, DE = V
CC
CC
128kbps
9.6kbps
V
= 3.3V, DE = 0V
1m
CC
V
= 1.8V, DE = V
CC
CC
100µ
STATIC
V
= 1.8V, DE = 0V
CC
5
10µ
60
1.8
2.0
2.2
2.4
2.6
2.8
(V)
3.0
3.2
3.4
3.6
-40 -25 -10
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
V
CC
FIGURE 26. ISL32602E, ISL32603E STATIC SUPPLY CURRENT vs
TEMPERATURE
FIGURE 27. ISL32602E, ISL32603E DYNAMIC SUPPLY CURRENT
vs SUPPLY VOLTAGE AT DIFFERENT DATA RATES
FN7967.0
June 22, 2012
16
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Performance Curves V = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), T = +25°C; Unless Otherwise
CC
A
Specified (Continued)
2
3
0
DI
DI
0
2.0
1.5
1.0
4
3
2
0.5
A-B
0
1
0
A-B
-0.5
-1.0
-1
-2
-3
-1.5
RD = ∞
RD = ∞
4
3
2
1
0
2.0
1.5
1.0
0.5
0
TIME (10µs/DIV)
TIME (10µs/DIV)
FIGURE 28. ISL32602E, ISL32603E PERFORMANCE WITH
= 1.8V, 256kbps, 1000’ (305m) CAT 5 CABLE
FIGURE 29. ISL32602E, ISL32603E PERFORMANCE WITH
= 3.3V, 460kbps, 2000’ (610m) CAT 5 CABLE
V
V
CC
CC
1200
1100
1000
900
C
= 50pF
C
= 50pF
D
D
t
= |t
- t |
DDLH DDHL
SKEW
120
100
80
60
40
20
0
V
= 1.8V, R = ∞
D
CC
V
= 1.8V, R = ∞
D
CC
800
t
DDHL
700
t
DDLH
600
500
t
400
DDHL
V
= 3.3V, R = 54Ω
D
CC
V
= 3.3V, R = 54Ω
D
CC
t
DDLH
300
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 30. ISL32602E, ISL32603E DRIVER DIFFERENTIAL
PROPAGATION DELAY vs TEMPERATURE
FIGURE 31. ISL32602E, ISL32603E DRIVER DIFFERENTIAL SKEW
vs TEMPERATURE
300
280
260
240
220
140
t
= |t
- t |
PLH PHL
SKEW
120
100
80
60
40
20
0
V
= 1.8V
CC
V
= 1.8V, t
PLH
CC
200
180
160
140
120
100
V
= 1.8V, t
PHL
CC
V
= 3.3V, t
PHL
CC
V
= 3.3V, t
CC
PLH
V
= 3.3V
CC
-40 -25 -10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 32. ISL32602E, ISL32603E RECEIVER PROPAGATION
DELAY vs TEMPERATURE
FIGURE 33. ISL32602E, ISL32603E RECEIVER SKEW vs
TEMPERATURE
FN7967.0
June 22, 2012
17
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Typical Performance Curves V = 3V (ISL32600E, ISL32601E) or 1.8V (ISL32602E, ISL32603E), T = +25°C; Unless Otherwise
CC
A
Specified (Continued)
V
= 1.8V
R
= 10kΩ, C = 50pF
D
CC
V
= 1.8V
DIFF
R
= 10kΩ, C = 50pF
CC
DIFF
D
2
0
2
0
DI
DI
2
0
2
0
RO
RO
1.5
1.0
0.5
0
1.5
1.0
0.5
0
A/Y - B/Z
A/Y - B/Z
-0.5
-1.0
-1.5
-0.5
-1.0
-1.5
TIME (1µs/DIV)
TIME (1µs/DIV)
FIGURE 34. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 35. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
V
= 3.3V
R
= 54Ω, C = 50pF
D
CC
DIFF
V
= 3.3V
R
= 54Ω, C = 50pF
D
CC
DIFF
3
3
0
DI
DI
0
3
0
3
0
RO
RO
3
3
2
1
2
1
0
0
A/Y - B/Z
A/Y - B/Z
-1
-2
-3
-1
-2
-3
TIME (200ns/DIV)
TIME (200ns/DIV)
FIGURE 36. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, LOW TO HIGH
FIGURE 37. ISL32602E, ISL32603E DRIVER AND RECEIVER
WAVEFORMS, HIGH TO LOW
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
PROCESS:
Si Gate BiCMOS
FN7967.0
June 22, 2012
18
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE
REVISION
FN7967.0
CHANGE
June 22, 2012
Initial Release.
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL32600E, ISL32601E, ISL32602E, ISL32603E
To report errors or suggestions for this data sheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
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For information regarding Intersil Corporation and its products, see www.intersil.com
FN7967.0
June 22, 2012
19
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
5
3.0±0.05
A
8
DETAIL "X"
D
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
B
0.65 BSC
GAUGE
PLANE
TOP VIEW
0.25
3°±3°
0.55 ± 0.15
DETAIL "X"
0.85±010
H
C
SEATING PLANE
0.10 C
0.25 - 0.36
0.10 ± 0.05
0.08
C A-B D
M
SIDE VIEW 1
(5.80)
NOTES:
1. Dimensions are in millimeters.
(4.40)
(3.00)
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
(0.65)
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
(0.40)
(1.40)
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
FN7967.0
June 22, 2012
20
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
1.27 (0.050)
0.40 (0.016)
INDEX
AREA
6.20 (0.244)
5.80 (0.228)
0.50 (0.20)
x 45°
0.25 (0.01)
4.00 (0.157)
3.80 (0.150)
8°
0°
1
2
3
0.25 (0.010)
0.19 (0.008)
SIDE VIEW “B”
TOP VIEW
2.20 (0.087)
1
8
SEATING PLANE
0.60 (0.023)
1.27 (0.050)
1.75 (0.069)
5.00 (0.197)
4.80 (0.189)
2
3
7
6
1.35 (0.053)
-C-
4
5
0.25(0.010)
0.10(0.004)
1.27 (0.050)
0.51(0.020)
0.33(0.013)
5.20(0.205)
SIDE VIEW “A
TYPICAL RECOMMENDED LAND PATTERN
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
FN7967.0
June 22, 2012
21
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Package Outline Drawing
M10.118
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 4/12
5
3.0±0.05
A
DETAIL "X"
D
10
1.10 MAX
SIDE VIEW 2
0.09 - 0.20
4.9±0.15
3.0±0.05
5
0.95 REF
PIN# 1 ID
1
2
0.50 BSC
B
GAUGE
PLANE
TOP VIEW
0.25
3°±3°
0.55 ± 0.15
DETAIL "X"
0.85±010
H
C
SEATING PLANE
0.10 C
0.18 - 0.27
0.10 ± 0.05
0.08
C A-B D
M
SIDE VIEW 1
(5.80)
NOTES:
1. Dimensions are in millimeters.
(4.40)
(3.00)
2. Dimensioning and tolerancing conform to JEDEC MO-187-BA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
(0.50)
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
(0.29)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
FN7967.0
June 22, 2012
22
ISL32600E, ISL32601E, ISL32602E, ISL32603E
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
4
0.10 C A-B 2X
8.65
A
3
6
DETAIL"A"
0.22±0.03
D
14
8
6.0
3.9
4
0.10 C D 2X
0.20 C 2X
7
PIN NO.1
ID MARK
(0.35) x 45°
4° ± 4°
5
0.31-0.51
0.25M C A-B D
B
3
6
TOP VIEW
0.10 C
H
1.75 MAX
1.25 MIN
0.25
GAUGE PLANE
SEATING PLANE
C
0.10-0.25
1.27
0.10 C
SIDE VIEW
DETAIL "A"
(1.27)
(0.6)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSEY14.5m-1994.
3. Datums A and B to be determined at Datum H.
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5. The pin #1 identifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
shall be 0.10mm total in excess of lead width at maximum condition.
(1.50)
7. Reference to JEDEC MS-012-AB.
TYPICAL RECOMMENDED LAND PATTERN
FN7967.0
June 22, 2012
23
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