ISL4223E [INTERSIL]
QFN Packaged, +/-15kV ESD Protected, +2.7V to +5.5V, 150Nanoamp, 250kBps, RS-232 Transmitters/Receivers; QFN封装, +/- 15kV ESD保护, + 2.7V至+ 5.5V , 150Nanoamp , 250kbps的, RS - 232发射器/接收器型号: | ISL4223E |
厂家: | Intersil |
描述: | QFN Packaged, +/-15kV ESD Protected, +2.7V to +5.5V, 150Nanoamp, 250kBps, RS-232 Transmitters/Receivers |
文件: | 总13页 (文件大小:391K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ISL4221E, ISL4223E
®
Data Sheet
August 2004
FN6045.1
QFN Packaged, +/-15kV ESD Protected,
+2.7V to +5.5V, 150Nanoamp, 250kBps,
RS-232 Transmitters/Receivers
Features
• Available in Near Chip Scale QFN (5mmx5mm) Package
which is 40% Smaller than a 20 Lead TSSOP
The Intersil ISL422XE devices are 2.7V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
V.28/V.24 specifications, even at V
= 3.0V. Additionally,
CC
they provide ±15kV ESD protection (IEC61000-4-2 Air Gap,
and Human Body Model) on transmitter outputs and receiver
inputs (RS-232 pins). Targeted applications are PDAs,
Palmtops, and hand-held products where the low
operational, and even lower standby, power consumption is
critical. Efficient on-chip charge pumps, coupled with manual
and automatic powerdown functions, reduce the standby
supply current to a 150nA trickle. Tiny 5mm x 5mm Quad
Flat No-Lead (QFN) packaging and the use of small, low
value capacitors ensure board space savings as well. Data
rates greater than 250kBps are guaranteed at worst case
load conditions.
• RS-232 Compatible with V
= 2.7V
CC
• On-Chip Voltage Converters Require Only Four External
0.1µF Capacitors
• Manual and Automatic Powerdown Features
• Receiver Hysteresis For Improved Noise Immunity
• Guaranteed Minimum Data Rate . . . . . . . . . . . . 250kBps
• Wide Power Supply Range. . . . . . . Single +2.7V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . .150nA
• Pb-free Available as an Option
The ISL4221E is a 1 driver, 1 receiver device and the
ISL4223E is a 2 driver, 2 receiver device that, coupled with
the 5x5 QFN package, provide the industry’s smallest,
lowest power serial port suitable for PDAs, and hand-held
applications. The 5x5 QFN requires 40% less board area
than a 20 lead TSSOP, and is nearly 20% thinner.
Applications
• Any Space Constrained System Requiring RS-232 Ports
- Battery Powered, and Portable Equipment
- Hand-Held Products (GPS Receivers, Bar Code
Scanners, etc.)
- PDAs and Palmtops, Data Cables
The ISL422XE features an automatic powerdown function
that powers down the on-chip power-supply and driver
circuits. This occurs when an attached peripheral device is
shut off or the RS-232 cable is removed, conserving system
power automatically without changes to the hardware or
operating system. It powers up again when a valid RS-232
voltage is applied to any receiver input.
- Cellular/Mobile Phones, Digital Cameras
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
• ”Technical Brief TB379 “Thermal Characterization of
Packages for ICs”
Table 1 summarizes the features of the ISL422XE, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER
NO. OF NO.OF
QFN PKG.
AVAILABLE?
DATA RATE
(kBps)
Rx. ENABLE
FUNCTION?
MANUAL
POWERDOWN?
AUTOMATIC POWERDOWN
FUNCTION?
Tx.
Rx.
ISL4221E
ISL4223E
1
1
YES
YES
250
250
YES
YES
YES
YES
YES
YES
2
2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL4221E, ISL4223E
Ordering Information
Ordering Information (Continued)
PART NO.
ISL4221EIR
ISL4221EIR-T
TEMP. RANGE (°C) PACKAGE PKG. DWG. #
PART NO.
TEMP. RANGE (°C) PACKAGE PKG. DWG. #
-40 to 85
-40 to 85
16 Ld QFN L16.5x5
ISL4223EIR-T
-40 to 85
-40 to 85
20 Ld QFN L20.5x5
Tape & Reel
16 Ld QFN L16.5x5
Tape & Reel
ISL4223EIRZ-T
(Note)
20 Ld QFN L20.5x5
Tape & Reel
ISL4221EIRZ-T
(Note)
-40 to 85
16 Ld QFN L16.5x5
Tape & Reel
(Pb-free)
(Pb-free)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
ISL4223EIR
-40 to 85
-40 to 85
20 Ld QFN L20.5x5
ISL4223EIRZ
(Note)
20 Ld QFN L20.5x5
(Pb-free)
Pinouts
ISL4221E (QFN)
ISL4223E (QFN)
TOP VIEW
TOP VIEW
16 15 14 13
20 19 18 17 16
V+
C1-
C2+
C2-
1
2
3
4
12 GND
11 T1
T1
15
14
V+
C1-
C2+
C2-
V-
1
2
3
4
5
OUT
R1
OUT
IN
10 FORCEON
13 R1
OUT
9
T1
IN
12 FORCEON
T1
5
6
7
8
11
IN
6
7
8
9
10
Pin Descriptions
PIN
FUNCTION
V
System power supply input (2.7V to 5.5V).
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
CC
V+
V-
GND
C1+
C1-
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
C2+
C2-
T
IN
T
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
TTL/CMOS level receiver outputs.
OUT
R
IN
R
OUT
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
EN
Active low receiver enable control.
2
ISL4221E, ISL4223E
Typical Operating Circuits
ISL4221E
+3.3V
+
0.1µF
13
16
+
2
C
0.1µF
1
C1+
V
CC
1
C
0.1µF
3
+
V+
V-
C1-
3
C
0.1µF
2
C2+
+
5
C
4
0.1µF
4
C2-
+
T
1
9
7
11
T1
OUT
T1
R1
IN
TTL/CMOS
LOGIC
LEVELS
RS-232
LEVELS
6
R1
IN
OUT
5kΩ
R
1
15
10
EN
14
8
V
CC
FORCEOFF
INVALID
TO POWER
CONTROL LOGIC
FORCEON
GND
12
ISL4223E
17
+3.3V
+
0.1µF
20
C
0.1µF
C1+
1
1
V
CC
C
0.1µF
+
3
+
V+
V-
2
C1-
3
C
0.1µF
2
C2+
+
5
C
4
0.1µF
4
C2-
+
T
T
1
2
11
10
15
6
T1
T2
T1
T2
IN
OUT
OUT
IN
TTL/CMOS
RS-232
LOGIC LEVELS
13
14
7
LEVELS
R1
R2
R1
R2
OUT
OUT
IN
IN
5kΩ
5kΩ
R
1
8
R
2
19
EN
18
9
V
FORCEOFF
INVALID
CC
12
TO POWER
CONTROL LOGIC
FORCEON
GND
16
3
ISL4221E, ISL4223E
Absolute Maximum Ratings
Thermal Information
o
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance (Typical, Note 1)
θJA ( C/W)
CC
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
16 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
20 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
Moisture Sensitivity (see Technical Brief TB363)
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
35
32
o
T
, FORCEOFF, FORCEON, EN . . . . . . . . . . . . . . . -0.3V to 6V
IN
o
o
R
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
T
OUT
R
, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
+0.3V
OUT
CC
Operating Conditions
Short Circuit Duration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Temperature Range
ISL422XEIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
T
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
o
o
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379, and Tech Brief TB389.
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
o
Typicals are at T = 25 C
A
TEMP
o
PARAMETER
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R Open, FORCEON = GND, FORCEOFF = V
IN
25
-
0.15
1
µA
CC
Supply Current, Powerdown
FORCEOFF = GND
25
25
-
-
0.15
0.3
1
µA
Supply Current,
All Outputs Unloaded,
V
= 3.15V
1.0
mA
CC
Automatic Powerdown Disabled
FORCEON = FORCEOFF = V
CC
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold Low
Input Logic Threshold High
T
, FORCEON, FORCEOFF, EN
Full
Full
Full
Full
Full
Full
Full
-
2.0
2.4
-
-
0.8
-
V
V
IN
IN
T
EN
, FORCEON, FORCEOFF,
V
V
= 3.3V
= 5.0V
-
CC
-
-
V
CC
Input Leakage Current
Output Leakage Current
Output Voltage Low
Output Voltage High
T
, FORCEON, FORCEOFF, EN
±0.01
±0.05
-
±1.0
±10
0.4
-
µA
µA
V
IN
EN = V
-
CC
I
I
= 1.6mA
= -1.0mA
-
OUT
OUT
V
-0.6 V
-0.1
CC
V
CC
AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V
)
CC
Receiver Input Thresholds to
Enable Transmitters
ISL422XE Powers Up (See Figure 6)
Full
Full
-2.7
-0.3
-
-
2.7
0.3
V
V
Receiver Input Thresholds to
Disable Transmitters
ISL422XE Powers Down (See Figure 6)
-
INVALID Output Voltage Low
INVALID Output Voltage High
Receiver Threshold to Transmitters
I
I
= 1.6mA
= -1.0mA
Full
Full
25
-
-
0.4
V
V
OUT
OUT
V
-0.6
-
-
CC
-
100
µs
Enabled Delay (t
)
WU
Receiver Positive or Negative
Threshold to INVALID High Delay
25
25
-
-
1
-
-
µs
µs
(t
)
INVH
Receiver Positive or Negative
30
Threshold to INVALID Low Delay
(t
)
INVL
4
ISL4221E, ISL4223E
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF; Unless Otherwise Specified.
CC
1
4
o
Typicals are at T = 25 C (Continued)
A
TEMP
o
PARAMETER
RECEIVER INPUTS
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
Input Voltage Range
Input Threshold Low
25
25
25
25
25
25
25
-25
0.6
0.8
-
-
25
-
V
V
V
V
V
V
= 3.3V
= 5.0V
= 3.3V
= 5.0V
1.2
1.5
1.5
1.8
0.5
5
CC
CC
CC
CC
-
V
Input Threshold High
2.4
2.4
-
V
-
V
Input Hysteresis
-
V
Input Resistance
3
7
kΩ
TRANSMITTER OUTPUTS
Output Voltage Swing
Output Resistance
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
Full
Full
Full
±5.0
±5.4
10M
±35
-
-
V
Ω
V
= V+ = V- = 0V, Transmitter Output = ±2V
300
-
CC
Output Short-Circuit Current
Output Leakage Current
-
-
±60
±25
mA
µA
V
= ±12V, V
= 0V or 3V to 5.5V,
CC
OUT
Automatic Powerdown or FORCEOFF = GND
TIMING CHARACTERISTICS
Maximum Data Rate
R
= 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
25
25
25
25
25
25
25
250
500
0.15
0.15
200
200
100
50
-
-
kBps
µs
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
L
t
t
-
-
PHL
PLH
-
µs
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Skew
Normal Operation
Normal Operation
-
-
ns
-
-
ns
t
t
- t
PHL PLH
(Note 2)
-
-
ns
Receiver Skew
- t
PHL PLH
-
-
ns
Transition Region Slew Rate
V
= 3.3V, R = 3kΩ to 7kΩ,
C = 150pF to 2500pF
4
6
-
30
30
V/µs
V/µs
CC
L
L
Measured From 3V to -3V
or -3V to 3V
C = 150pF to 1000pF
-
L
ESD PERFORMANCE
RS-232 Pins (T
, R
)
Human Body Model
25
25
25
25
-
-
-
-
±15
±8
-
-
-
-
kV
kV
kV
kV
OUT IN
IEC61000-4-2 Contact Discharge
IEC61000-4-2 Air Gap Discharge
Human Body Model
±15
±2
All Other Pins
NOTE:
2. Transmitter skew is measured at the transmitter zero crossing points.
Charge-Pump
Detailed Description
Intersil’s new ISL422XE devices utilize regulated on-chip
dual charge pumps as voltage doublers, and voltage
inverters to generate ±5.5V transmitter supplies from a V
supply as low as 3.0V. This allows them to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions. The charge pumps
operate discontinuously (i.e., they turn off as soon as the V+
The ISL422XE operate from a single +2.7V to +5.5V supply,
guarantee a 250kBps minimum data rate, require only four
small external 0.1µF capacitors, feature low power
consumption, and meet all ElA RS-232C and V.28
CC
specifications even with V
= 3.0V. The circuit is divided
CC
into three sections: The charge pump, the transmitters, and
the receivers.
5
ISL4221E, ISL4223E
and V- supplies are pumped up to the nominal values),
resulting in significant power savings.
11mA current required by comparable 5V RS-232 devices,
allowing users to reduce system power simply by switching
to this new family.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies, these
transmitters deliver true RS-232 levels over a wide range of
single supply system voltages.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 150nA, because the on-chip charge
pump turns off (V+ collapses to V , V- collapses to GND),
CC
and the transmitter outputs three-state. Receiver outputs are
unaffected by powerdown; refer to Table 2 for details. This
micro-power mode makes the ISL422XE ideal for battery
powered and portable applications.
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
The devices guarantee a 250kBps data rate for full load
V
CC
V
CC
conditions (3kΩ and 1000pF), V
≥ 3.0V, with one
CC
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
CURRENT
FLOW
V
CC
CC
L
L
transmitter easily operates at 900kBps.
V
= V
CC
OUT
Transmitter inputs float if left unconnected, and may cause
increases. Connect unused inputs to GND for the best
performance.
Rx
I
CC
POWERED
DOWN
UART
Receivers
Tx
OLD
RS-232 CHIP
All the ISL422XE devices contain standard inverting
receivers that three-state via the EN control line. All the
receivers convert RS-232 signals to CMOS output levels and
accept inputs up to ±25V while presenting the required 3kΩ
to 7kΩ input impedance (see Figure 1) even if the power is
GND
SHDN = GND
FIGURE 2. POWER DRAIN THROUGH POWERED DOWN
PERIPHERAL
off (V
= 0V). The receivers’ Schmitt trigger input stage
CC
uses hysteresis to increase noise immunity and decrease
errors due to slow input signal transitions.
V
CC
V
CC
TRANSITION
DETECTOR
R
R
XIN
XOUT
GND ≤ V
TO
ISL422XE
≤ V
-25V ≤ V
≤ +25V
5kΩ
ROUT
CC
RIN
WAKE-UP
LOGIC
GND
V
FIGURE 1. INVERTING RECEIVER CONNECTIONS
CC
INVALID
Receivers driving a powered down UART must be disabled
to prevent current flow through, and possible damage to, the
UART’s protection diodes (see Figures 2 and 3). This can be
accomplished on the ISL422XE by driving the EN input high
whenever the UART powers down. Figure 3 also shows that
the INVALID output can be used to determine when the
UART should be powered down. When the RS-232 cable is
disconnected, INVALID switches low indicating that the
UART is no longer needed. Reconnecting the cable drives
INVALID back high, indicating that the UART should be
powered up.
R
T
V
= HI-Z
X
OUT
R
OUT
POWERED
DOWN
UART
R
IN
T
X
IN
T
OUT
EN = V
CC
FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN
Software Controlled (Manual) Powerdown
The ISL422XE family provides pins that allow the user to
force the IC into the low power, standby state.
Low Power Operation
These 3V devices require a nominal supply current of
The ISL422XE utilize a two pin approach where the
FORCEON and FORCEOFF inputs determine the IC’s
0.3mA, even at V
powerdown mode). This is considerably less than the 5mA to
= 5.5V, during normal operation (not in
CC
6
ISL4221E, ISL4223E
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
RS-232 SIGNAL
PRESENT AT
FORCEOFF FORCEON
EN
TRANSMITTER RECEIVER INVALID
RECEIVER INPUT?
INPUT
INPUT
INPUT
OUTPUTS
OUTPUTS OUTPUT
MODE OF OPERATION
Normal Operation
NO
NO
H
H
H
H
H
H
L
H
H
L
L
H
L
Active
Active
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
L
L
(Auto Powerdown Disabled)
Active
YES
YES
NO
Active
H
H
L
Normal Operation
(Auto Powerdown Enabled)
L
H
L
Active
L
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Powerdown Due to Auto Powerdown
Logic
NO
L
H
L
L
YES
YES
NO
X
X
X
X
H
H
L
Manual Powerdown
L
H
L
Manual Powerdown w/Rcvr. Disabled
Manual Powerdown
L
NO
L
H
L
Manual Powerdown w/Rcvr. Disabled
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
MASTER POWERDOWN LINE
POWER
MANAGEMENT
UNIT
0.1µF
1MΩ
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the automatic powerdown circuitry.
FORCEOFF
FORCEON
ISL422XE
Connecting FORCEOFF and FORCEON together disables
the automatic powerdown feature, enabling them to function
as a manual SHUTDOWN input (see Figure 4).
FIGURE 5. CIRCUIT TO PREVENT AUTO POWERDOWN FOR
100ms AFTER FORCED POWERUP
FORCEOFF
PWR
Automatic Powerdown
FORCEON
MGT
Even greater power savings is available by using the
automatic powerdown function. When no valid RS-232
voltages (see Figure 6) are sensed on any receiver input for
30µs, the charge pump and transmitters powerdown, thereby
reducing supply current to 10nA. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. The ISL422XE powers back up whenever it
detects a valid RS-232 voltage level on any receiver input.
This automatic powerdown feature provides additional
system power savings without changes to the existing
operating system.
LOGIC
INVALID
ISL422XE
I/O
UART
CPU
Automatic powerdown operates when the FORCEON input
is low, and the FORCEOFF input is high. Tying FORCEON
high disables automatic powerdown, but manual powerdown
is always available via the overriding FORCEOFF input.
Table 2 summarizes the automatic powerdown functionality.
FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
The time to recover from automatic powerdown mode is
Some applications may need more time to wake up from
shutdown. If automatic powerdown is being utilized, the RS-
232 device will reenter powerdown if valid receiver levels
aren’t reestablished within 30µs of the ISL422XE powering
up. Figure 5 illustrates a circuit that keeps the ISL422XE
typically 100µs.
7
ISL4221E, ISL4223E
from initiating automatic powerdown for 100ms after
powering up. This gives the slow-to-wake peripheral circuit
time to reestablish valid RS-232 output levels.
circuitry. When automatic powerdown is utilized, INVALID =
0 indicates that the ISL422XE is in powerdown mode.
RECEIVER
INPUTS
INVALID
REGION
}
The time to recover from automatic powerdown mode is
typically 100µs.
TRANSMITTER
OUTPUTS
INVALID Output
The INVALID output always indicates whether or not a valid
RS-232 signal (see Figure 6) is present at any of the receiver
inputs (see Table 2), giving the user an easy way to
determine when the interface block should power down.
Invalid receiver levels occur whenever the driving
V
CC
INVALID
t
t
INVH
INVL
OUTPUT
0
PWR UP
AUTOPWDN
V+
peripheral’s outputs are shut off (powered down) or when the
RS-232 interface cable is disconnected. In the case of a
disconnected interface cable where all the receiver inputs
are floating (but pulled to GND by the internal receiver pull
down resistors), the INVALID logic detects the invalid levels
and drives the output low. The power management logic
then uses this indicator to power down the interface block.
Reconnecting the cable restores valid levels at the receiver
inputs, INVALID switches high, and the power management
logic wakes up the interface block. INVALID can also be
used to indicate the DTR or RING INDICATOR signal, as
long as the other receiver inputs are floating, or driven to
GND (as in the case of a powered down driver).
V
CC
0
V-
FIGURE 7. AUTOMATIC POWERDOWN AND INVALID TIMING
DIAGRAMS
Capacitor Selection
The charge pumps require 0.1µF, or greater, capacitors for
proper operation. Increasing the capacitor values (by a factor
of 2) reduces ripple on the transmitter outputs and slightly
reduces power consumption.
VALID RS-232 LEVEL - ISL422XE IS ACTIVE
2.7V
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
0.3V
INVALID LEVEL - POWERDOWN OCCURS AFTER 30µs
-0.3V
INDETERMINATE - POWERDOWN MAY OR
MAY NOT OCCUR
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
-2.7V
VALID RS-232 LEVEL - ISL422XE IS ACTIVE
power supply noise, decouple V
to ground with a
CC
capacitor of the same value as the charge-pump capacitor C .
1
FIGURE 6. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Connect the bypass capacitor as close as possible to the IC.
INVALID switches low after invalid levels have persisted on
all of the receiver inputs for more than 30µs (see Figure 7).
INVALID switches back high 1µs after detecting a valid
RS-232 level on a receiver input. INVALID operates in all
modes (forced or automatic powerdown, or forced on), so it
is also useful for systems employing manual powerdown
Transmitter Outputs when Exiting
Powerdown
Figure 8 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF.
8
ISL4221E, ISL4223E
Note that the transmitters enable only when the magnitude
of the supplies exceed approximately 3V.
5V/DIV.
T1
IN
5V/DIV.
FORCEOFF
T1
T1
OUT
2V/DIV.
R1
OUT
V
= +3.3V
CC
C1 - C4 = 0.1µF
T2
V
= +3.3V
CC
C1 - C4 = 0.1µF
5µs/DIV.
FIGURE 10. LOOPBACK TEST AT 120kBps
TIME (20µs/DIV.)
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
5V/DIV.
T1
IN
Operation Down to 2.7V
ISL422XE transmitter outputs meet RS-562 levels (±3.7V), at
the full data rate, with V
as low as 2.7V. RS-562 levels
CC
typically ensure inter operability with RS-232 devices.
T1
OUT
OUT
High Data Rates
The ISL422XE maintain the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 9
details a transmitter loopback test circuit, and Figure 10
illustrates the loopback test result at 120kBps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kBps. Figure 11 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kBps. The static transmitters were
also loaded with an RS-232 receiver.
R1
V
= +3.3V
CC
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 11. LOOPBACK TEST AT 250kBps
Interconnection with 3V and 5V Logic
The ISL422XE directly interface with 5V CMOS and TTL
logic families. Nevertheless, with the ISL422XE at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ISL422XE inputs, but ISL422XE outputs do not reach
V
CC
+
0.1µF
V
CC
V+
V-
+
C1+
C1-
C2+
C2-
the minimum V for these logic families. See Table 3 for
IH
+
C
1
2
C
3
4
more information.
ISL422XE
TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SUPPLY VOLTAGES
+
C
+
C
SYSTEM
V
CC
POWER-SUPPLY SUPPLY
T
T
IN
OUT
VOLTAGE
(V)
VOLTAGE
(V)
COMPATIBILITY
1000pF
R
IN
R
OUT
3.3
3.3
Compatible with all CMOS
families.
FORCEON
FORCEOFF
5k
5
5
Compatible with all TTL and
CMOS logic families.
V
CC
5
3.3
Compatible with ACT and HCT
CMOS, and with TTL. ISL422XE
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
9
ISL4221E, ISL4223E
IEC61000-4-2 Testing
±15kV ESD Protection
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
All pins on ISL422XE devices include ESD protection
structures, but the RS-232 pins (transmitter outputs and
receiver inputs) incorporate advanced structures which allow
them to survive ESD events up to ±15kV. The RS-232 pins
are particularly vulnerable to ESD damage because they
typically connect to an exposed port on the exterior of the
finished product. Simply touching the port pins, or
connecting a cable, can cause an ESD event that might
destroy unprotected ICs. These new ESD structures protect
the device whether or not it is powered up, protect without
allowing any latchup mechanism to activate, and don’t
interfere with RS-232 signals as large as ±25V.
AIR-GAP DISCHARGE TEST METHOD
Human Body Model (HBM) Testing
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results. The “E” device RS-232 pins withstand
±15kV air-gap discharges.
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
10
ISL4221E, ISL4223E
o
Typical Performance Curves V = 3.3V, T = 25 C
CC
A
6
25
20
V
+
OUT
4
2
1 TRANSMITTER AT 250kBps
OTHER TRANSMITTERS AT 30kBps
0
15
10
5
-SLEW
-2
-4
+SLEW
V
-
OUT
-6
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
45
45
ISL4221E
40
ISL4223E
40
35
30
25
20
15
10
250kBps
35
250kBps
30
25
120kBps
20kBps
20
15
10
5
120kBps
20kBps
5
0
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 15. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
Die Characteristics
3.5
NO LOAD
ALL OUTPUTS STATIC
SUBSTRATE POTENTIAL (POWERED UP):
3.0
2.5
2.0
1.5
1.0
0.5
0
GND
TRANSISTOR COUNT:
ISL4221E: 286
ISL4223E: 357
PROCESS:
Si Gate CMOS
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
FIGURE 16. SUPPLY CURRENT vs SUPPLY VOLTAGE
11
ISL4221E, ISL4223E
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L16.5x5
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHB ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
1.00
0.05
1.00
NOTES
A
A1
A2
A3
b
0.80
0.90
-
-
-
-
-
-
9
0.20 REF
9
0.28
2.55
2.55
0.33
0.40
2.85
2.85
5, 8
D
5.00 BSC
-
D1
D2
E
4.75 BSC
9
2.70
7, 8
5.00 BSC
-
E1
E2
e
4.75 BSC
9
2.70
7, 8
0.80 BSC
-
k
0.25
0.35
-
-
-
-
L
0.60
0.75
0.15
8
L1
N
-
16
4
4
-
10
2
Nd
Ne
P
3
4
-
3
0.60
12
9
θ
-
-
9
Rev. 2 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare provided toassistwith PCBLandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
12
ISL4221E, ISL4223E
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L20.5x5
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHC ISSUE C)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
1.00
0.05
1.00
NOTES
A
A1
A2
A3
b
0.80
0.90
-
-
-
-
-
-
9
0.20 REF
9
0.23
2.95
2.95
0.28
0.38
3.25
3.25
5, 8
D
5.00 BSC
-
D1
D2
E
4.75 BSC
9
3.10
7, 8
5.00 BSC
-
E1
E2
e
4.75 BSC
9
3.10
7, 8
0.65 BSC
-
k
0.25
0.35
-
-
-
-
L
0.60
0.75
0.15
8
L1
N
-
20
5
5
-
10
2
Nd
Ne
P
3
3
-
-
0.60
12
9
θ
-
9
Rev. 3 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare provided toassistwith PCBLandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
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