ISL43210A [INTERSIL]
Medium-Voltage, Single Supply, Single SPDT Analog Switch; 中等电压，单电源，单路单刀双掷模拟开关
| 型号： | ISL43210A |
| 厂家： | 
Intersil |
| 描述： | Medium-Voltage, Single Supply, Single SPDT Analog Switch |
| 文件： | 总12页 (文件大小：552K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Medium-Voltage, Single Supply, Single SPDT Analog
Switch
ISL43210A
Features
The Intersil ISL43210A device is a precision, bidirectional,
single SPDT analog switch designed to operate from a single
+2.7V to +15V supply. Targeted applications include
• Fully specified at 12V, 5V, and 3.3V supplies for 10%
tolerances
• ON-resistance (r ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Ω
ON
applications that require a +15V single supply such as
3D TV/Eyeware products and single supply +3.0V/+5V battery
powered equipment that benefit from the devices’ low power
consumption (5µW), low leakage currents (10nA max), and fast
• r matching between channels . . . . . . . . . . . . . . . . . . . . . . . <1Ω
ON
• Low charge injection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5pC
• Single supply operation . . . . . . . . . . . . . . . . . . . . . . +2.7V to +15V
switching speeds (t = 28ns, t
= 20ns). Cell phones, for
ON OFF
• Low leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10nA
• Fast switching action
example, often face ASIC functionality limitations. The number
of analog input or GPIO pins may be limited and digital
geometries are not well suited to analog switch performance.
This device may be used to “mux-in” additional functionality
while reducing ASIC design risk. It’s small package alleviates
board space limitations, making it an ideal solution.
- t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns
ON
- t
OFF
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17ns
• Guaranteed break-before-make switching
• Minimum 2000V ESD protection per method 3015.7
• TTL, CMOS compatible
The ISL43210A is a single committed SPDT, which is perfect for
use in 2-to-1 multiplexer applications.
• Available in 6 Ld SOT-23 package
• Pb-free (RoHS compliant)
TABLE 1. FEATURES AT A GLANCE
ISL43210A
SPDT or
Applications
• Battery-powered, handheld, and portable equipment
- Cellular/mobile phones
SW 1/SW 2
12V r
2x1 MUX
11Ω
ON
12V t /t
25ns/17ns
19Ω
- Pagers
ON OFF
- Laptops, notebooks, palmtops
5V r
ON
5V t /t
• Communications systems
- Radios, ADSL Modems
- PBX, PABX
28ns/20ns
32Ω
ON OFF
3.3V r
ON
3.3V t /t
40ns/20ns
6 Ld SOT-23
ON OFF
• Test and measurement equipment
- Ultrasound
Package
- Computerized Tomography (CT) Scanner
- Magnetic Resonance Image (MRI)
- Position Emission Tomography (PET) Scanner
- Electrocardiograph
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Audio and Video switching
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
- 3D TV
- 3D Eyeware
• Various circuits
- +3V/+5V DACs and ADCs
- Sample and hold circuits
- Digital filters
- Operational amplifier gain switching networks
- High frequency analog switching
- High speed multiplexing
- Integrator reset circuits
June 24, 2011
FN7876.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL43210A
Pin Configuration (Note 1)
ISL43210A
(6 LD SOT-23)
TOP VIEW
IN
V+
1
2
3
6
5
4
NO
COM
NC
GND
NOTE:
1. Switch Shown for Logic “0” Input.
Ordering Information
Truth Table
PART
ISL43210A
PART NUMBER
(Notes 2, 3, 4)
MARKING TEMP. RANGE PACKAGE
PKG.
(Pb-free) DWG. #
LOGIC
PIN NC
ON
PIN NO
(Note 5)
(°C)
0
1
OFF
ON
ISL43210AIHZ-T
210A
-40 to +85 6 Ld SOT-23 P6.064
-40 to +85 6 Ld SOT-23 P6.064
OFF
ISL43210AIHZ-T7A 210A
NOTES:
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.
2. Please refer to TB347 for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish, which
is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
Pin Descriptions
PIN
PIN
NAME
NUMBER
FUNCTION
V+
GND
IN
2
3
1
5
6
4
System Power Supply Input (+2.7V to +15V)
Ground Connection
4. For Moisture Sensitivity Level (MSL), please see device information
page for ISL43210A. For more information on MSL please see
techbrief TB363.
Digital Control Input
COM
NO
Analog Switch Common Pin
Analog Switch Normally Open Pin
Analog Switch Normally Closed Pin
5. The part marking is located on the bottom of the part.
NC
FN7876.0
June 24, 2011
2
ISL43210A
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 16.5V
Input Voltages
Thermal Resistance (Typical)
6 Ld SOT-23 Package (Notes 7, 8) . . . . . . .
θ
JA (°C/W)
175
θ
JC (°C/W)
95
IN (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
NO, NC (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . . . . . . . . 40mA
ESD Rating
Human Body Model (Tested per JESD22-A114E). . . . . . . . . . . . . . . . 2kV
Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . 100V
Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Maximum Operating Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
6. Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
7. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
8. For θ , the “case temp” location is taken at the package top center.
JC
Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +15V, GND = 0V, V = 4V, V = 0.8V (Note 9),
INH
INL
Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C.
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
20
25
2
V
Ω
ON-Resistance, r
V+ = 10.8V, I
= 1.0mA, V or V = 10V
NO NC
11
ON
COM
(see Figure 5)
Full
25
-
15
Ω
r
Matching Between Channels, Δr
V+ = 10.8V, I
COM
= 1.0mA, V or V = 10V
NO NC
-
0.8
Ω
ON
ON
ON
Full
25
-
1
4
Ω
r
Flatness, R
V+ = 10.8V, I
(Note 12)
= 1.0mA, V or V = 3V, 6V, 9V
COM NO NC
-
1
4
Ω
FLAT(ON)
Full
25
-
-
6
Ω
NO or NC OFF Leakage Current, I
V+ = 15V, V
= 1V, 12V, V or V = 12V, 1V
NO NC
-3
-5
-3
-5
-5
-10
0.01
3
nA
nA
nA
nA
nA
nA
NO(OFF)
COM
COM
COM
or I
NC(OFF)
Full
25
-
5
COM OFF Leakage Current, I
COM(OFF)
V+ = 15V, V
= 12V, 1V, V or V = 1V, 12V
NO NC
0.01
3
Full
25
-
-
-
5
COM ON Leakage Current, I
V+ = 15V, V
floating
= 1V, 12V, or V or V = 1V, 12V or
NO NC
5
COM(ON)
Full
10
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
or V = 10V, R = 1kΩ, C = 35pF, V = 0V to
NC IN
25
-
-
25
35
-
-
ns
ns
ON
NO
4V
(see Figure 1)
L
L
Full
Turn-OFF Time, t
OFF
V
or V = 10V, R = 1kΩ, C = 35pF, V = 0V to 4V 25
NC IN
-
-
-
17
26
2
-
-
-
ns
ns
ns
NO
(see Figure 1)
L
L
Full
Full
Break-Before-Make Time Delay, t
R = 300Ω, C = 35pF, V or V = 10V,
D
L
L
NO
NC
V
= 0V to 4V (see Figure 3)
IN
Charge Injection, Q
OFF Isolation
C
= 1.0nF, V = 0V, R = 0Ω (see Figure 2)
25
25
-
-
5
-
-
pC
dB
L
G
G
R = 50Ω, C = 5pF, f = 1MHz (see Figure 4)
76
L
L
FN7876.0
June 24, 2011
3
ISL43210A
Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +15V, GND = 0V, V = 4V, V = 0.8V (Note 9),
INH
INL
Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
R = 50Ω, C = 5pF, f = 1MHz (see Figure 6)
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
Crosstalk (Channel-to-Channel)
25
-
-
-
dB
L
L
105
Power Supply Rejection Ratio
R = 50Ω, C = 5pF, f = 1MHz
25
25
25
25
-
-
-
-
63
8
-
-
-
-
dB
pF
pF
pF
L
L
NO or NC OFF Capacitance, C
f = 1MHz, V or V = V
NO NC
= 0V (see Figure 7)
= 0V (see Figure 7)
= 0V (See Figure 7)
OFF
COM(OFF)
COM(ON)
COM
COM
COM
COM OFF Capacitance, C
f = 1MHz, V or V = V
NO NC
8
COM ON Capacitance, C
f = 1MHz, V or V = V
NO NC
28
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 15V, V = 0V or V+, all channels on or off
IN
Full
-1.8
-
1.8
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.8
V
V
INL
Input Voltage High, V
4
-
INH
Input Current, I , I
INH INL
V+ = 15V, V = 0V or V+
IN
-1
1
µA
Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V = 2.4V, V = 0.8V (Note 9),
INH
INL
Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C.
TEMP MIN
(°C) (Notes 10, 11) TYP
MAX
(Notes 10, 11) UNITS
PARAMETER
TEST CONDITIONS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
30
40
2
V
Ω
Ω
Ω
Ω
Ω
ON-Resistance, r
ON
V+ = 4.5V, I
COM
(See Figure 5)
= 1.0mA, V or V = 3.5V
NO NC
19
23
0.8
1
Full
25
-
r
Matching Between Channels, Δr
ON
V+ = 5V, I
COM
= 1.0mA, V or V = 3.5V
NO NC
-
ON
Full
Full
-
4
r
Flatness, R
V+ = 5V, I = 1.0mA, V or V = 1V, 2V, 3V
COM NO NC
-
7
8
ON
FLAT(ON)
(Note 12)
NO or NC OFF Leakage Current,
or I
V+ = 5.5V, V
= 1V, 4.5V, V or V = 4.5V, 1V
NO NC
25
Full
25
-3
-5
0.01
3
5
nA
nA
nA
nA
nA
nA
COM
COM
I
NO(OFF)
NC(OFF)
-
-
-
-
-
COM OFF Leakage Current, I
COM(OFF)
V+ = 5.5V, V
= 4.5V, 1V, V or V = 1V, 4.5V
NO NC
-3
3
Full
25
-5
5
COM ON Leakage Current, I
COM(ON)
V+ = 5.5V, V
COM
4.5V or Floating
= 1V, 4.5V, or V or V = 1V,
NO NC
-5
5
Full
-10
10
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
V
or V = 3V, R = 1kΩ, C = 35pF,
NC
= 0V to 3V (See Figure 1)
25
Full
25
-
-
-
-
-
28
40
20
30
10
-
-
-
-
-
ns
ns
ns
ns
ns
ON
NO
L
L
IN
Turn-OFF Time, t
OFF
V
V
or V = 3V, R = 1kΩ, C = 35pF,
NC
NO
L
L
= 0V to 3V (See Figure 1)
IN
Full
Full
Break-Before-Make Time Delay, t
R
= 300Ω, C = 35pF, V = V = 3V,
NO NC
D
L
L
V
= 0V to 3V (See Figure 3)
IN
Charge Injection, Q
OFF Isolation
C = 1.0nF, V = 0V, R = 0Ω (See Figure 2)
25
25
-
-
3
-
-
pC
dB
L
G
G
R
= 50Ω, C = 5pF, f = 1MHz (See Figure 4)
76
L
L
FN7876.0
June 24, 2011
4
ISL43210A
Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V = 2.4V, V = 0.8V (Note 9),
INH
INL
Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
MIN
MAX
(Notes 10, 11) UNITS
PARAMETER
TEST CONDITIONS
= 50Ω, C = 5pF, f = 1MHz
(°C) (Notes 10, 11) TYP
Power Supply Rejection Ratio
R
25
25
25
25
-
-
-
-
60
8
-
-
-
-
dB
pF
pF
pF
L
L
NO or NC OFF Capacitance, C
f = 1MHz, V or V = V
NO NC
= 0V (See Figure 7)
= 0V (See Figure 7)
= 0V (See Figure 7)
OFF
COM(OFF)
COM(ON)
COM
COM
COM
COM OFF Capacitance, C
f = 1MHz, V or V = V
NO NC
8
COM ON Capacitance, C
f = 1MHz, V or V = V
NO NC
28
POWER SUPPLY CHARACTERISTICS
Power Supply Range
Full
Full
2.7
-1
-
15
1
V
Positive Supply Current, I+
V+ = 5.5V, V = 0V or V+, all channels on or off
IN
0.0001
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
Full
Full
Full
-
-
-
-
0.8
V
V
INL
Input Voltage High, V
2.4
-1
-
INH
Input Current, I , I
INH INL
V+ = 5.5V, V = 0V or V+
IN
1
µA
Electrical Specifications - 2.7V to 5.5V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V = 2.4V, V = 0.8V
INH
INL
(Note 9),Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C.
TEMP MIN
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
MAX
PARAMETER
TEST CONDITIONS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full
25
0
-
-
V+
50
60
2
V
Ω
ON-Resistance, r
V+ = 3V, I
= 1.0mA, V or V = 1.5V
NO NC
32
ON
COM
(see Figure 5)
Full
25
-
40
Ω
r
Matching Between Channels, Δr
V+ = 3.3V, I
= 1.0mA, V or V = 1.5V
NO NC
-
0.8
Ω
ON
ON
ON
COM
COM
Full
-
1
4
Ω
r
Flatness, R
FLAT(ON)
V+ = 3.3V, I
(Note 12)
= 1.0mA, V or V = 0.5V, 1V, 1.5V 25
NO NC
-
6
10
12
3
Ω
Full
25
-
7
Ω
NO or NC OFF Leakage Current, I
V+ = 3.6V, V
= 1V, 3V, V or V = 3V, 1V
NO NC
-3
-5
-3
-5
-5
-10
0.01
nA
nA
nA
nA
nA
nA
NO(OFF)
COM
COM
or I
NC(OFF)
Full
25
-
5
COM OFF Leakage Current, I
COM(OFF)
V+ = 3.6V, V
= 3V, 1V, V or V = 1V, 3V
NO NC
0.01
3
Full
25
-
-
-
5
COM ON Leakage Current, I
COM(ON)
V+ = 3.6V, V
floating
= 1V, 3V, or V or V = 1V, 3V or
NO NC
5
COM
Full
10
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
V
V
or V = 1.5V, R = 1kΩ, C = 35pF,
NC
= 0V to 3V (see Figure 1)
25
Full
25
-
-
-
-
-
40
60
20
30
20
-
-
-
-
-
ns
ns
ns
ns
ns
ON
NO
L
L
IN
Turn-OFF Time, t
V
V
or V = 1.5V, R = 1kΩ, C = 35pF,
NC
OFF
NO
IN
L
L
= 0V to 3V (see Figure 1)
Full
Full
Break-Before-Make Time Delay, t
R
= 300Ω, C = 35pF, V or V = 1.5V,
NO NC
D
L
L
V
= 0V to 3V (see Figure 3)
IN
Charge Injection, Q
OFF Isolation
C
= 1.0nF, V = 0V, R = 0Ω (see Figure 2)
25
25
25
25
-
-
-
-
1
76
56
8
-
-
-
-
pC
dB
dB
pF
L
G
G
R = 50Ω, C = 5pF, f = 1MHz (see Figure 4)
L
L
Power Supply Rejection Ratio
R = 50Ω, C = 5pF, f = 1MHz
L L
NO or NC OFF Capacitance, C
f = 1MHz, V or V = V = 0V (see Figure 7)
NO NC COM
OFF
FN7876.0
June 24, 2011
5
ISL43210A
Electrical Specifications - 2.7V to 5.5V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V = 2.4V, V = 0.8V
INH
INL
(Note 9),Unless Otherwise Specified. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 10, 11) TYP (Notes 10, 11) UNITS
COM OFF Capacitance, C
f = 1MHz, V or V = V
NO NC
= 0V (see Figure 7)
= 0V (See Figure 7)
25
25
-
-
8
-
-
pF
pF
COM(OFF)
COM
COM ON Capacitance, C
f = 1MHz, V or V = V
NO NC
28
COM(ON)
COM
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 3.6V, V = 0V or V+, all channels on or off
IN
Full
-1
-
1
µA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
INL
Full
Full
Full
-
-
-
-
0.8
V
V
Input Voltage High, V
INH
2.4
-1
-
Input Current, I , I
INH INL
V+ = 3.6V, V = 0V or V+
IN
1
µA
NOTES:
9. V = input voltage to perform proper function.
IN
10. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
11. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
12. Limits established by characterization and are not production tested.
Test Circuits and Waveforms
V+
3V OR 4V
t < 20ns
t < 20ns
f
r
C
LOGIC
50%
INPUT
0V
NO
0V
t
V
OFF
OUT
NO OR NC
IN
SWITCH
INPUT
COM
SWITCH
INPUT
V
V
OUT
90%
90%
C
L
35pF
R
LOGIC
INPUT
L
1kΩ
GND
SWITCH
OUTPUT
t
ON
Repeat test for all switches. C includes fixture and stray
L
Logic input waveform is inverted for switches that have the opposite
logic sense.
capacitance.
R
L
---------------------
V
= V
OUT
(NO or NC)
R
+ r
ON
L
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
SWITCH
OUTPUT
ΔV
OUT
V
OUT
V
R
OUT
G
COM
NO OR NC
GND
V+
0V
ON
ON
LOGIC
INPUT
OFF
V
IN
G
C
L
Q = ΔV
x C
L
OUT
LOGIC
INPUT
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FN7876.0
June 24, 2011
6
ISL43210A
Test Circuits and Waveforms(Continued)
V+
3V OR 4V
C
LOGIC
INPUT
0V
NO
NC
V
V
OUT
NX
COM
90%
C
SWITCH
OUTPUT
R
L
300Ω
L
35pF
IN
V
OUT
0V
t
D
GND
LOGIC
INPUT
C
includes fixture and stray capacitance.
L
FIGURE 3B. TEST CIRCUIT
FIGURE 3A. MEASUREMENT POINTS
FIGURE 3. BREAK-BEFORE-MAKE TIME
V+
V+
C
C
r
= V /1mA
ON
1
SIGNAL
GENERATOR
NO OR NC
NO OR NC
V
NX
0.8V OR V
1mA
IN
0V OR V
INH
INH
X
IN
V
1
COM
COM
ANALYZER
GND
GND
R
L
FIGURE 5. r TEST CIRCUIT
ON
FIGURE 4. OFF ISOLATION TEST CIRCUIT
V+
C
V+
C
SIGNAL
GENERATOR
50Ω
NO1 OR NC1
COM1
NO OR NC
IN
1
0V OR V
IN
INH
X
0V OR V
0V OR 2.4V
INH
IN
2
IMPEDANCE
ANALYZER
COM
NO2 OR NC2
GND
COM2
ANALYZER
NC
GND
R
L
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 7. CAPACITANCE TEST CIRCUIT
FN7876.0
June 24, 2011
7
ISL43210A
The minimum recommended supply voltage is 2.7V. It is
Detailed Description
The ISL43210A bidirectional, single SPDT analog switch offers
precise switching capability from a single 2.7V to 15V supply
with low ON-resistance (11Ω) and high speed operation.
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer to
the “Electrical Specification” tables beginning on page 3 and
“Typical Performance Curves” beginning on page 9 for details.
The device is especially well suited for 3D TV and 3D eyeware
equipment thanks to the high single supply operating voltage
(15V), low power consumption (27µW max), fast switching
V+ and GND also power the internal logic and level shifter. The
level shifter converts the input logic levels to switch V+ and
GND signals to drive the analog switch gate terminals.
speed (t = 25ns, t
= 17ns), and the tiny SOT-23
ON OFF
This device cannot be operated with bipolar supplies because
the input switching point becomes negative in this
configuration.
packaging. High frequency applications also benefit from the
wide bandwidth and the very high off isolation rejection.
Supply Sequencing and Overvoltage
Protection
Logic-Level Thresholds
This switch is TTL compatible (0.8V and 2.4V) over a supply
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
that might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and GND (see
Figure 8). To prevent forward biasing these diodes, V+ must be
applied before any input signals, and input signal voltages
must remain between V+ and GND. If these conditions cannot
be guaranteed, then one of the following two protection
methods should be employed.
range of 3V to 11V (see Figure 15). At 12V the V level is
about 2.5V. This is still below the TTL guaranteed high output
minimum level of 2.8V, but noise margin is reduced. For best
results with a 12V supply, use a logic family the provides a V
greater than 3V.
IH
OH
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving the
digital input signals from GND to V+ with a fast transition time
minimizes power dissipation.
Logic inputs can easily be protected by adding a 1kΩ resistor in
series with the input (see Figure 8). The resistor limits the input
current below the threshold that produces permanent
damage, and the sub-microamp input current produces an
insignificant voltage drop during normal operation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
300MHz (see Figure 16). Figure 16 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
Adding a series resistor to the switch input defeats the purpose
of using a low r switch, so two small signal diodes can be
ON
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed-
through from a switch’s input to its output. Off isolation is the
resistance to this feed-through. Figure 17 details the high off
isolation rejection provided by this part. At 10MHz, off isolation
is about 50dB in 50Ω systems, decreasing approximately
20dB per decade as frequency increases. Higher load
impedances decrease off isolation rejection due to the voltage
divider action of the switch OFF impedance and the load
impedance.
added in series with the supply pins to provide overvoltage
protection for all pins (see Figure 8). These additional diodes
limit the analog signal from 1V below V+ to 1V above GND. The
low leakage current performance is unaffected by this
approach, but the switch resistance may increase, especially
at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
Leakage Considerations
Reverse ESD protection diodes are internally connected between
each analog-signal pin and both V+ and GND. One of these diodes
conducts if any analog signal exceeds V+ or GND.
IN
V
X
OR
V
NO
NC
COM
GND
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given signal
pin are identical and therefore fairly well balanced, they are
reverse biased differently. Each is biased by either V+ or GND and
the analog signal. This means their leakages will vary as the
signal varies. The difference in the two diode leakages to the V+
and GND pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and one of the
supply terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the same or
opposite polarity. There is no connection between the analog
signal paths and V+ or GND.
OPTIONAL PROTECTION
DIODE
FIGURE 8. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL43210A construction is typical of most CMOS analog
switches, except that it has only two supply pins: V+ and GND.
V+ and GND drive the internal CMOS switches and set their
analog voltage limits. Unlike switches with a 13V absolute
maximum voltage, the ISL43210A 16.5V absolute maximum
supply voltage provides plenty of room for the 10% tolerance
of 15V supplies, as well as room for overshoot and noise
spikes.
FN7876.0
June 24, 2011
8
ISL43210A
Typical Performance Curves
T
= +25°C, Unless Otherwise Specified.
A
40
45
40
35
V+ = 3.3V
35
30
25
20
+85°C
+25°C
-40°C
30
+85°C
25
20
15
30
25
20
15
V+ = 5V
+85°C
+25°C
-40°C
+25°C
15
10
20
-40°C
10
+85°C
-40°C
V+ = 12V
+25°C
15
10
5
5
3
0
2
4
5
6
7
8
9
10
11
12
13
0
2
4
6
8
10
12
V
(V)
V+ (V)
COM
FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE
FIGURE 10. ON-RESISTANCE vs SWITCH VOLTAGE
0.50
0.40
0.30
0.20
60
V+ = 3.3V
+25°C
50
40
30
20
10
0
+85°C
0.10
0
-40°C
0.25
0.20
0.15
V+ = 5V
+25°C
+85°C
V+ = 5V
+85°C
-40°C
V+ = 12V
0.10
0.05
0
V+ = 3.3V
0.15
V+ = 12V
+25°C
+25°C
0.10
0.05
0
-10
-20
-40°C
+85°C
-40°C
0
2
4
6
8
10
12
2
4
6
8
10
12
V
(V)
V
(V)
COM
COM
FIGURE 11. r MATCH vs SWITCH VOLTAGE
ON
FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE
100
90
80
70
60
50
40
30
20
35
30
25
20
15
+85°C
+85°C
-40°C
-40°C
-40°C
+25°C
+25°C
11
3
4
5
6
7
8
9
10
11
12
2
3
4
5
6
7
8
9
10
12
V+ (V)
V+ (V)
FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE
FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE
FN7876.0
June 24, 2011
9
ISL43210A
Typical Performance Curves
T
= +25°C, Unless Otherwise Specified. (Continued)
A
3.0
V+ = 3.3V TO 12V
GAIN
0
-3
-6
2.5
V
INH
-40°C
+85°C
2.0
1.5
1.0
0.5
0
PHASE
20
40
60
80
100
+85°C
-40°C
V
+25°C
R
V
= 50Ω
= 0.2V
= 0.2V
= 0.2V
L
TO 2.5V (V+ = 3.3V)
P-P
INL
IN
IN
IN
P-P
P-P
P-P
V
V
TO 4V
TO 5V
(V+ = 5V)
P-P
P-P
+85°C
4
(V+ = 12V)
1
10
FREQUENCY (MHz)
100
600
2
3
5
6
7
8
9
10
11
12
13
V+ (V)
FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 16. FREQUENCY RESPONSE
10
R
= 50Ω
V+ = 3V TO 13V
L
0
20
30
40
50
10
20
30
40
50
60
70
80
V+ = 3.3V, SWITCH OFF
V+ = 12V, SWITCH OFF
60
ISOLATION
V+ = 12V, SWITCH ON
70
80
90
V+ = 3.3V, SWITCH ON
100
110
0.3
1
10
100
1000
1k
10k
100k
1M
10M
100M 500M
FREQUENCY (MHz)
FREQUENCY (Hz)
FIGURE 17. OFF ISOLATION
FIGURE 18. ±PSRR vs FREQUENCY
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ISL43210A: 58
PROCESS:
Si Gate CMOS
FN7876.0
June 24, 2011
10
ISL43210A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
FN7876.0
CHANGE
June 24, 2011
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL43210A
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7876.0
June 24, 2011
11
ISL43210A
Package Outline Drawing
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 4, 2/10
0-8°
0.08-0.22
1.90
0.95
D
A
6
5
4
1.60 +0.15/-0.10
3
2.80
3
(0.60)
PIN 1
INDEX AREA
1
2
3
0.20
2x
C
SEE DETAIL X
END VIEW
B
0.40 ±0.10
0.20 M
3
A-B
C
D
TOP VIEW
10° TYP
(2 PLCS)
3
2.90 ±0.10
(0.25)
GAUGE
PLANE
1.45 MAX
1.15 +0.15/-0.25
C
0.10
C
SEATING PLANE
0.00-0.15
0.45±0.1
4
SIDE VIEW
DETAIL "X"
(0.95)
(0.60)
(1.20)
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
(2.40)
2. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3. Dimension is exclusive of mold flash, protrusions or gate burrs.
4. Foot length is measured at reference to guage plane.
Package conforms to JEDEC MO-178AB.
5.
TYPICAL RECOMMENDED LAND PATTERN
FN7876.0
June 24, 2011
12
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