ISL54217_09 [INTERSIL]
USB 2.0 High-Speed x 2Channels/Stereo Audio Dual SP3T (Dual 3-to-1 Multiplexer); USB 2.0高速X 2通道/立体声音频双SP3T （双3比1多路复用器）
| 型号： | ISL54217_09 |
| 厂家： | 
Intersil |
| 描述： | USB 2.0 High-Speed x 2Channels/Stereo Audio Dual SP3T (Dual 3-to-1 Multiplexer) |
| 文件： | 总21页 (文件大小：1315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL54217
®
Data Sheet
May 4, 2009
FN6817.3
USB 2.0 High-Speed x 2Channels/Stereo
Audio Dual SP3T (Dual 3-to-1 Multiplexer)
Features
• High Speed (480Mbps) and Full Speed (12Mbps)
Signaling Capability per USB 2.0
The Intersil ISL54217 is a single supply dual SP3T analog
switch that operates from a single supply in the range of 2.7V
to 4.6V. It was designed to multiplex between audio stereo
signals and two different USB 2.0 high speed differential data
signals. The audio channels allow signal swings below
ground, allowing the multiplexing of voice and data signals
through a common headphone connector in Personal Media
Players and other portable battery powered devices.
• Low Distortion Negative Signal Capability Audio Switches
• Clickless/Popless Audio Switches
• Power OFF Protection
• COM Pins Overvoltage Tolerant to 5.5V
• Low Distortion Headphone Audio Signals
- THD+N at 5mW into 32Ω Load . . . . . . . . . . . . . <0.03%
The audio switch cells can pass ±1V ground referenced audio
signals with very low distortion (<0.03% THD+N when driving
5mW into 32Ω loads). The USB switch cells have very low
ON-capacitance (8pF) and high bandwidth to pass USB high
speed signals (480Mbps) with minimal edge and phase
distortion.
• Crosstalk (100kHz) . . . . . . . . . . . . . . . . . . . . . . . . . -98dB
• OFF-Isolation (100kHz) . . . . . . . . . . . . . . . . . . . . . 95.5dB
• Single Supply Operation (V ) . . . . . . . . . . . . 2.7V to 4.6V
DD
• -3dB Bandwidth USB Switches . . . . . . . . . . . . . . . 700MHz
• Available in Tiny 12 Ld µTQFN and TQFN Packages
The ISL54217 is available in a tiny 12 Ld 2.2mmx1.4mm ultra
thin QFN and a 12 Ld 3mmx3mm TQFN package. It operates
over a temperature range of -40°C to +85°C.
• Compliant with USB 2.0 Short Circuit Requirements
Without Additional External Components
Related Literature
• Pb-Free (RoHS Compliant)
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Applications
• MP3 and other Personal Media Players
• Cellular/Mobile Phone
Application Block Diagram
3.3V
µCONTROLLER
VDD
ISL54217
C0
C1
LOGIC CONTROL
4M
Ω
V
BUS
2D-
USB
HIGH-SPEED
TRANSCEIVER
COM -
COM +
2D+
L
AUDIO
CODEC
CLICK/
POP
R
1D-
USB
1k
Ω
1k
Ω
1D+
HIGH-SPEED
TRANSCEIVER
50k
Ω
50k
Ω
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL54217
State Diagram
0
ALL
00
00
SWITCHES
OFF
10
01
00
00
0
1
0
01
USB2
10
00
11
USB1
01
AUDIO
MUTE
INTERNAL REGISTER VALUE
WHEN TRANSISTIONED
INTO THIS STATE
11
10
11
1
11
01
AUDIO
11
Pinout (Note 1)
ISL54217
(12 Ld 2.2mmx1.4mm µTQFN, 12 Ld 3mmx3mm TQFN)
TOP VIEW
12
11
10
LOGIC
CONTROL
2D+
1
2
9
8
7
C1
L
C/P
C/P
COM -
COM +
R
3
4
5
6
NOTE:
1. ISL54217 Switches Shown for C1 = Logic “1” and C0 = Logic “1”. R and L 50kΩ pull-down resistors and COM- and COM+ 1kΩ Shunts not shown.
FN6817.3
May 4, 2009
2
ISL54217
Truth Table
CURRENT
CODE
LAST CODE
SHUNT SWITCHES
CLICK/POP AUDIO
SHUNTS
C1
0
C0
0
C1
X
X
0
C0
X
X
0
MODE
ALL SWITCHES OFF
USB1
1kΩ COM SHUNTS
INTERNAL REGISTER
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
0
0
0
0
0
1
1
1
0
1
1
0
USB2
ON
1
0
0
1
USB2
ON
1
0
1
0
USB2
ON
1
1
X
1
X
0
AUDIO
OFF
OFF
OFF
1
0
MUTE
1
0
1
1
MUTE
ON
NOTE: C0, C1: Logic “0” when ≤ 0.5V, Logic “1” when ≥ 1.4V with V
in the range of 2.7V to 3.6V.
DD
Pin Descriptions
PIN
NUMBER
NAME
2D+
L
FUNCTION
USB2 Differential Input
1
2
Audio Left Input
3
R
Audio Right Input
4
1D-
USB1 Differential Input
USB1 Differential Input
Ground Connection
Voice and Data Common Pin
Voice and Data Common Pin
Digital Control Input
Digital Control Input
Power Supply
5
1D+
GND
COM+
COM-
C1
6
7
8
9
10
11
12
C0
V
DD
2D-
USB2 Differential Input
Ordering Information
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
PART NUMBER
ISL54217IRUZ-T* (Note 2)
ISL54217IRTZ (Note 3)
ISL54217IRTZ-T* (Note 3)
ISL54217EVAL1Z
GP
4217
-40 to +85
-40 to +85
-40 to +85
12 Ld 2.2mmx1.4mm µTQFN (Tape and Reel)
12 Ld 3mmx3mm TQFN
L12.2.2x1.4A
L12.3x3A
4217
12 Ld 3mmx3mm TQFN (Tape and Reel)
L12.3x3A
Evaluation Board
*Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
FN6817.3
May 4, 2009
3
ISL54217
Absolute Maximum Ratings
Thermal Information
V
to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V
Thermal Resistance (Typical)
θ
(°C/W)
θ (°C/W)
JC
DD
JA
Input Voltages
12 Ld µTQFN Package (Note 5) . . . . .
12 Ld TQFN Package (Notes 6, 7). . . .
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
155
58
N/A
1.0
1D+, 1D-, L, R, 2D+, 2D- . . . . . . . . . . . . . . . . . . . . . . -2V to 5.5V
C0, C1 (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V
Output Voltages
COM-, COM+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 5.5V
Continuous Current (L, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
Peak Current (L, R)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±120mA
Continuous Current (1D-, 1D+, 2D-, 2D+) . . . . . . . . . . . . . . . ±40mA
Peak Current (1D-, 1D+, 2D-, 2D+)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±100mA
ESD Rating:
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 4.6V
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>5kV
Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>500V
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4. Signals on C1 and C0 exceeding GND by specified amount are clamped. Limit current to maximum current ratings.
5. θ is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
6. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379.
7. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V = +3.0V, GND = 0V, V
, V
= 1.4V, V
, V
= 0.5V,
DD
C0H C1H
C0L C1L
(Note 8), Unless Otherwise Specified.
TEMP
MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 9, 10) TYP (Notes 9, 10) UNITS
ANALOG SWITCH CHARACTERISTICS
Audio Switches (L, R)
Analog Signal Range, V
ANALOG
V
= 3.0V to 3.6V, Audio Mode (C0 = V , C1 = V
DD
)
DD
Full
+25
Full
-1.5
-
2.3
-
1.5
2.8
3.4
V
Ω
Ω
DD
ON-Resistance, r
V
= 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
-
-
ON
DD
I
= 60mA, V or V = -0.85V to 0.85V, (see Figure 3,
COMx
L R
Note 12)
r
Matching Between Channels,
V
= 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
+25
Full
-
-
0.04
-
0.25
0.26
Ω
Ω
ON
Δr
DD
I
= 60mA, V or V = Voltage at max r
over signal
ON
ON
COMx
L
R
range of -0.85V to 0.85V, (Notes 12, 13)
r
Flatness, r
FLAT(ON)
V
= 3.0V, Audio Mode (C0 = 1.4V, C1 = 1.4V),
= 60mA, V or V = -0.85V to 0.85V, (Notes 11, 12)
L R
+25
Full
+25
-
-
-
0.03
-
0.05
0.07
-
Ω
Ω
Ω
ON
DD
I
COMx
Click/Pop Shunt Resistance, R , R
V
V
= 3.6V, ALL OFF Mode (C0 = 0.5V, C1 = 0.5V),
28
L
R
DD
or V
= -0.85V, 0.85V, V or V = -0.85V,
COM-
COM+
L R
0.85V, Measure current into L or R pin and calculate
resistance value.
USB/DATA Switches (1D+, 1D-, 2D+, 2D-)
Analog Signal Range, V = 2.7V to 4.6V, USB1 mode (C0 = 0V, C1 = V ) or Full
V
-1
-
V
V
ANALOG DD
DD
DD
8
USB2 Mode (C0 = V , C1 = 0V)
DD
= 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
ON-Resistance, r
V
25
-
-
6.2
-
Ω
Ω
ON
DD
Mode (C0 = 1.4V, C1 = 0.5V), I
= 40mA, V or
D+
COMx
= 0V to 400mV (see Figure 4, Note 12)
Full
10
V
D
r
Matching Between Channels,
V
= 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
25
-
-
0.08
-
0.5
Ω
Ω
ON
Δr
DD
Mode (C0 = 1.4V, C1 = 0.5V), I
= 40mA, V or
ON
COMx
D+
Full
0.55
V
V
= Voltage at max r , (Notes 12, 13)
ON
D-
r
Flatness, R
= 2.7V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
25
-
-
0.26
-
1
Ω
Ω
ON
FLAT(ON)
DD
Mode (C0 = 1.4V, C1 = 0.5V), I
V
= 40mA, V or
COMx
D+
Full
1.2
= 0V to 400mV, (Notes 11, 12)
D-
FN6817.3
May 4, 2009
4
ISL54217
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V = +3.0V, GND = 0V, V
, V
C0H C1H
= 1.4V, V
, V
= 0.5V,
DD
C0L C1L
(Note 8), Unless Otherwise Specified. (Continued)
TEMP MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 9, 10) TYP (Notes 9, 10) UNITS
ON-Resistance, r
V
= 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2 +25
-
-
9.8
-
20
25
Ω
Ω
ON
DD
Mode (C0 = 1.4V, C1 = 0.5V), I
= 40mA,
COMx
Full
V
or V = 3.3V (see Figure 4, Note 12)
D+
D-
OFF Leakage Current, I
or
V
or V
= 3.6V, All OFF Mode (C0 = 0.5V, C1 = 0.5V), V
COM-
25
Full
25
-15
-20
-20
-25
0.11
15
20
20
25
nA
nA
nA
nA
D+(OFF)
DD
I
= 0.5V, 0V, V or V = 0V, 0.5V, L = R = float
D-(OFF)
COM+
D+ D-
-
2.4
-
ON Leakage Current, I
V
= 3.3V, USB1 mode (C0 = 0.5V, C1 = 1.4V) or USB2
DD
DX
Mode (C0 = 1.4V, C1 = 0.5V), V or V = 2.7V,
COM- = COM+ = Float, L and R = float
D+
D-
Full
DPDT DYNAMIC CHARACTERISTICS
ALL OFF to USB or USB to All OFF
Address Transition Time, t
V
= 2.7V, R = 50Ω, C = 10pF, (see Figure 1)
25
25
-
-
175
12
-
-
ns
µs
DD
DD
L
L
TRANS
Audio to USB1 Address Transition
Time, t
V
= 2.7V, R = 50Ω, C = 10pF, (see Figure 1)
L L
TRANS
Break-Before-Make Time Delay, t
V
V
= 3.6V, R = 50Ω, C = 10pF, (see Figure 2)
25
-
52
-
ns
D
DD
DD
L
L
Skew, (t
t
)
= 3.0V, USB1 mode (C0 = 0V, C1 = V ) or USB2
DD
25
-
75
-
ps
SKEWOUT - SKEWIN
Mode (C0 = V , C1 = 0V), R = 45Ω, C = 10pF,
DD
L
L
t
= t = 500ps at 480Mbps, (Duty Cycle = 50%)
R
F
(see Figure 7)
Total Jitter, t
V
=3.0V, USB1 mode (C0 = 0V, C1 = V ) or USB2
25
25
25
25
-
-
-
-
210
250
-88
-98
-
-
-
-
ps
ps
J
DD
DD
Mode (C0 = V , C1 = 0V), R = 45Ω, C = 10pF,
DD
= t = 500ps at 480Mbps
L
L
t
R
F
Rise/Fall Degradation (Propagation
Delay), t
V
= 3.0V, USB1 mode (C0 = 0V, C1 = V ) or USB2
DD
DD
Mode (C0 = V , C1 = 0V), R = 45Ω, C = 10pF,
(see Figure 7)
PD
DD
L
L
Audio Crosstalk
R to COM-, L to COM+
V
R
= 3.0V, Audio Mode (C0 = V , C1 = V ),
dB
dB
DD
DD DD
= 32Ω, f = 20Hz to 20kHz, V or V = 0.707V
,
RMS
L
R
L
(see Figure 6)
Crosstalk
V
= 3.0V, R = 50Ω, f = 100kHz
DD L
(Audio to USB, USB to Audio)
OFF-Isolation
V
V
= 3.0V, R = 50Ω, f = 100kHz
25
25
-
-
95.5
115
-
-
dB
dB
DD
DD
L
Audio OFF-Isolation
(All OFF Mode)
= 3.0V, C0 = 0V, C1 = 0V, R = 32Ω, f = 20Hz to
L
20kHz
Audio OFF-Isolation
(Mute Mode)
V
= 3.0V, C1 = V
, C0 = 0V, R = 32Ω, f = 20Hz to
25
25
25
25
25
-
-
-
-
-
105
77
-
-
-
-
-
dB
dB
%
DD
20kHz
DD
DD
L
Audio OFF-Isolation
(Mute Mode)
V
= 3.0V, C1 = V
, C0 = 0V, R = 20kΩ, f = 20Hz to
L
DD
20kHz
Total Harmonic Distortion
Total Harmonic Distortion
Click and Pop
f = 20Hz to 20kHz, V
= 3.0V, C0 = V , C1 = V
DD
,
0.045
0.025
75
DD
(2V
DD
DD
L or R = 0.707V
), R = 32Ω
RMS
f = 20Hz to 20kHz, V
P-P
L
= 3.0V, C0 = V , C1 = V
DD
,
%
DD
5mW into R = 32Ω
L
V
= 3.3V, Audio Mute (C0 = 0V, C1 = 0V), R =1kΩ,
µVp
DD
L
L or R = 0 to 1.25V DC step or 1.25V to 0V DC step,
(see Figure 8)
Click and Pop
V
= 3.3V, C0, C1 = 0.5Hz Square Wave, R = 1kΩ,
25
-
520
-
µVp
DD
L
L or R = AC coupled to ground, (see Figure 9)
USB Switch -3dB Bandwidth
Audio Switch -3dB Bandwidth
1D+/1D- OFF Capacitance,
Signal = 0dBm, 0.2VDC offset, R = 50Ω, C = 5pF
25
25
25
-
-
-
700
330
3
-
-
-
MHz
MHz
pF
L
L
Signal = 0dBm, R = 50Ω, C = 5pF
L
L
f = 1MHz, V
= 3.0V, C0 = V , C1 = V , V or
DD DD D-
DD
= 0V (see Figure 5)
C
, C
V
= V
1D+OFF 1D-OFF
D+
f = 1MHz, V
COMx
L/R OFF Capacitance, C
,
= 3.0V, C0 = 0V, C1 = V
,
25
-
5
-
pF
LOFF
DD
L or R = COMx = 0V (see Figure 5)
DD
C
ROFF
FN6817.3
May 4, 2009
5
ISL54217
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V = +3.0V, GND = 0V, V
, V
C0H C1H
= 1.4V, V
, V
= 0.5V,
DD
C0L C1L
(Note 8), Unless Otherwise Specified. (Continued)
TEMP MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 9, 10) TYP (Notes 9, 10) UNITS
2D+/2D- OFF Capacitance,
f = 1MHz, V
= 3.3V, C0 = V , C1 = V , Tx or
25
-
3
-
pF
DD
DD DD
C
, C
Rx = COMx = 0V (see Figure 5)
2D+OFF 2D-OFF
COM ON Capacitance, C
,
f = 1MHz, V = 3.0V, USB1 mode (C0 = 0V, C1 = V
)
DD
25
-
8
-
pF
COM-(ON)
DD
or USB2 Mode (C0 = V , C1 = 0V) (see Figure 5)
C
COM+(ON)
POWER SUPPLY CHARACTERISTICS
Power Supply Range, V
DD
Full
25
2.7
4.6
8
V
DD
Positive Supply Current, I
(ALL OFF Mode)
V
V
V
V
V
= 3.6V, C1 = GND, C0 = GND
-
-
-
-
-
-
-
-
-
-
-
-
-
6.2
-
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Full
25
15
8
Positive Supply Current, I
(USB1 Mode)
= 3.6V, C1 = GND, C0 = V
6.5
-
DD
Full
25
15
8
Positive Supply Current, I
(USB2 Mode)
= 3.6V, C1 = V , C0 = GND
DD
6.2
-
Full
25
15
14
20
8
Positive Supply Current, I
(Audio Mode)
= 3.6V, C0 = C1 = V
)
9
DD
Full
25
-
Positive Supply Current, I
(MUTE Mode)
= 3.6V, C1 = V , C0 = GND
DD
6.6
-
Full
25
15
1
Power OFF COMx Current, I
V
V
= 0V, C0 = C1 = Float, COMx = 5.25V
= 0V, C0 = C1 = 5.25V
-
COMx
DD
DD
Power OFF Logic Current, I ,I
25
11
5
-
C0 C1
Power OFF D+/D- Current, I , I
V
= 0V, C0 = C1 = Float, XD- = XD+ = 5.25V
25
-
XD+ XD- DD
DIGITAL INPUT CHARACTERISTICS
C0, C1 Voltage Low, V , V
V
V
V
V
V
= 2.7V to 3.6V
Full
Full
Full
Full
-
-
-
0.5
5.25
50
2
V
V
C0L C1L
C0, C1 Voltage High, V , V
DD
DD
DD
DD
DD
= 2.7V to 3.6V
1.4
-50
-2
C0H C1H
C0, C1 Input Current, I
C0, C1 Input Current, I
, I
= 3.6V, C0 = C1= 0V or Float
= 3.6V, C0 = C1= 3.6V
6.2
1.6
4
nA
µA
MΩ
C0L C1L
, I
C0H C1H
C0, C1 Pull-Down Resistor, R
= 3.6V, C0 = C1= 3.6V, Measure current into C0 or C1 Full
-
-
Cx
pin and calculate resistance value.
NOTES:
8. V
= Input voltage to perform proper function.
LOGIC
9. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
11. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
12. Limits established by characterization and are not production tested.
13. r
matching between channels is calculated by subtracting the channel with the highest max r
value from the channel with lowest max r
ON ON
ON
value, between L and R or between 1D+ and 1D- or between 2D+ and 2D-.
FN6817.3
May 4, 2009
6
ISL54217
Test Circuits and Waveforms
C
V
DD
V
t < 20ns
r
t < 20ns
f
C0,C1
LOGIC
INPUT
V
50%
C0,C1
V
INPUT
V
t
OUT
OFF
SWITCH
INPUT
COMx
SWITCH
INPUT
V
INPUT
0V
C0,C1
V
OUT
90%
90%
C
L
10pF
R
50Ω
LOGIC
INPUT
L
GND
SWITCH
OUTPUT
t
ON
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. C includes fixture and stray
L
capacitance.
R
L
-----------------------
V
= V
OUT
(INPUT)
R
+ r
ON
L
FIGURE 1A. ADDRESS t
TRANS
MEASUREMENT POINTS
FIGURE 1B. ADDRESS t
TEST CIRCUIT
TRANS
FIGURE 1. SWITCHING TIMES
V
DD
C
2D- OR 2D+
1D- OR 1D+
V
V
C0
C1
LOGIC
INPUT
V
V
OUT
INPUT
COMx
L OR R
C0, C1
C
R
50Ω
L
L
10pF
V
OUT
0V
90%
SWITCH
OUTPUT
GND
LOGIC
INPUT
t
D
Repeat test for all switches. C includes fixture and stray
L
FIGURE 2A. MEASUREMENT POINTS
capacitance.
FIGURE 2B. TEST CIRCUIT
FIGURE 2. BREAK-BEFORE-MAKE TIME
V
DD
V
DD
C
C
r
= V /40mA
1
ON
r
= V /60mA
ON
1
D- OR D+
COMx
V
D- OR D+
V
L OR R
V
AND
C0
C1
C0L
C0
C1
V
COH
V
1
V
V
OR
1
C1H
V
C1H
40mA
V
AND
C0H
60mA
COMx
L OR R
V
C1L
GND
GND
Repeat test for all switches.
Repeat test for all switches.
FIGURE 3. AUDIO r
FIGURE 4. USB r
TEST CIRCUIT
TEST CIRCUIT
ON
ON
FN6817.3
May 4, 2009
7
ISL54217
Test Circuits and Waveforms (Continued)
V
DD
C
V
DD
C
CTRL
L OR R
CTRL
SIGNAL
GENERATOR
32Ω
COMx
AUDIO OR USB
V
Cx
V
Cx
IMPEDANCE
ANALYZER
0V OR FLOAT
V
OR
CxL
V
CxH
COMx
GND
R or L
COMx
ANALYZER
NC
GND
32Ω
Repeat test for all switches.
FIGURE 5. CAPACITANCE TEST CIRCUIT
FIGURE 6. AUDIO CROSSTALK TEST CIRCUIT
V
DD
t
C
ri
90%
50%
10%
V
DD
DIN+
0V
DD
C0
C1
t
skew_i
V
DIN-
90%
50%
10%
15.8Ω
OUT+
D+
D-
COM+
DIN+
DIN-
45Ω
143Ω
15.8Ω
C
L
t
fi
t
ro
OUT-
COM-
90%
45Ω
C
143Ω
L
10%
90%
50%
50%
10%
OUT+
OUT-
t
skew_o
GND
|tro - tri| Delay Due to Switch for Rising Input and Rising Output Signals.
|tfo - tfi| Delay Due to Switch for Falling Input and Falling Output Signals
|tskew_0| Change in Skew through the Switch for Output Signals.
|tskew_i| Change in Skew through the Switch for Input Signals.
t
f0
FIGURE 7A. MEASUREMENT POINTS
FIGURE 7B. TEST CIRCUIT
FIGURE 7. SKEW TEST
3.3V
AUDIO PRECISION
SYSTEM II CASCADE
ANALYZER
CHA
CHB
V
DD
COM-
COM+
L
CLICK
AND
POP
R
R
LOAD
0V TO 1.25V
DC STEP
OR
R
LOAD
1.25V TO 0V
DC STEP
C0
0V
C1
0V
GND
ALL OFF MODE
Set Audio Analyzer for Peak Detection, 32 Samples/Sec, Aweighted Filter, Manual Range 1X/Y, Units to dBV
FIGURE 8. CLICK AND POP TEST CIRCUIT
FN6817.3
May 4, 2009
8
ISL54217
Test Circuits and Waveforms (Continued)
3.3V
AUDIO PRECISION
C
SYSTEM II CASCADE
ANALYZER
V
DD
CHA
CHB
COM-
COM+
L
CLICK
AND
POP
R
R
LOAD
R
LOAD
GND
C0, C1
0V TO V
DD
SQUARE WAVE
Set Audio Analyzer for Peak Detection, 32 Samples/Sec, Aweighted Filter, Manual Range 1X/Y, Units to dBV
FIGURE 9. CLICK AND POP TEST CIRCUIT
Block Diagram
3.3V
µCONTROLLER
VDD
ISL54217
C0
LOGIC CONTROL
C1
4MΩ
V
BUS
2D-
USB
HIGH-SPEED
TRANSCEIVER
#2
COM -
COM +
2D+
L
CLICK/
POP
AUDIO
CODEC
R
1D-
USB
1kΩ
1D+
HIGH-SPEED
50kΩ
50kΩ
GND
TRANSCEIVER
#1
OR
UART
TRANSCEIVER
A device consists of two 2.3Ω audio switches and four 6.2Ω
USB switches. The audio switches can accept signals that
swing below ground. They were designed to pass audio left
and right stereo signals, that are ground referenced, with
minimal distortion. The USB switches were designed to pass
high-speed USB differential data signals with minimal edge
and phase distortion.
Detailed Description
The ISL54217 device consists of dual SP3T (single
pole/triple throw) analog switches. It operates from a single
DC power supply in the range of 2.7V to 4.6V. It was
designed to function as differential 3-to-1 multiplexer to
select between two different USB differential data signals
and audio L and R stereo signals. It comes in a tiny µTQFN
and TQFN packages for use in MP3 players, PDAs, cell
phones, and other personal media players.
The ISL54217 was specifically designed for MP3 players,
personal media players and cellphone applications that need
FN6817.3
May 4, 2009
9
ISL54217
to combine the stereo audio and USB data channels into a
single shared connector, thereby saving space and
component cost. The Typical application block diagram of
this functionality is previously shown.
minimum edge and phase distortion to meet USB 2.0 signal
quality specifications. See Figures 27 and 28 for High-speed
Eye Pattern taken with switch in the signal path.
These switches can also swing rail to rail and pass USB
full-speed signals (12Mbps) with minimal distortion. See Figure
29 for Full-speed Eye Pattern taken with switch in the signal
path.
The ISL54217 contains two logic control pins (C1 and C0)
that determine the state of the device. The part has the
following five states or modes of operation: All SWITCHES
OFF; USB1; USB2; Audio; and Audio Mute. These states
are discussed in detail in “Logic Control” on page 10.
The maximum normal operating signal range for the USB
switches is from -1V to V . The signal voltage at D- and D+
DD
A detailed description of the various types of switches are
provided in “Audio Switches” beginning on page 10.
should not be allow to exceed the V
voltage rail or go
DD
below ground by more than -1V for normal operation.
However in the event that the USB 5.25V V voltage were
Audio Switches
BUS
shorted to one or both of the COM pins, the ISL54217 has
fault protection circuitry to prevent damage to the ISL54217
part. The fault circuitry allows the signal pins (COM-, COM+,
1D-, 1D+, 2D-, 2D+, L and R) to be driven up to 5.25V while
The two audio switches (L, R) are 2.3Ω switches that can
pass signals that swing below ground.
Over a signal range of ±1V (0.707Vrms) with VDD > 2.7V,
these switches have an extremely low r
resistance
ON
the V
supply voltage is in the range of 0V to 4.6V. This
DD
fault condition causes no stress to the IC. In addition, when
is at 0V (ground) all switches are OFF and the fault
variation. They can pass ground referenced audio signals with
very low distortion (<0.05% THD+N) when delivering 15.6mW
into a 32Ω headphone speaker load. See Figures 20, 21, 22,
23 and 24 THD+N performance curves.
V
DD
voltage is isolated from the other side of the switch. When
is in the range of 2.7V to 4.6V the fault voltage will pass
V
DD
through to the output of an active switch channel.
Note: During the fault condition normal operation is not
guaranteed until the fault condition is removed.
Crosstalk between the L and R audio switches over the
frequency range of 20Hz to 20kHz when driving a 32Ω load
is < -88dB. These switches have excellent off-isolation >
105dB over the audio band when connected to 32Ω loads
and 77dB when connected to 20kΩ loads (In Audio Mute
mode). See Figures 25 and 26 in “Typical Performance
Curves” section beginning on page 12.
The USB (1D+ and 1D-) switches are active (turned ON)
whenever the C1 is logic “0” (Low) and C0 is logic “1” (High).
The USB (2D+ and 2D-) switches are active (turned ON)
whenever the C1 is logic “1” (High) and C0 is logic “0” (Low)
provided the last state was not the Audio or Audio Mute
state.
The audio drivers should be connected at the L and R side of
the switch (pins 2 and 3) and the speaker loads should be
connected at the COM side of the switch (pins 7 and 8).
ISL54217 Operation
The switches have click and pop circuitry on the L and R
side that is activated when the part comes out of Audio mode
by taking the C1 and C0 logic pins low (All OFF mode). The
ISL54217 should be put in this mode before powering down
or powering up of the audio CODEC drivers. In this mode the
audio, USB1, USB2 switches will be OPEN (OFF) and the
audio click and pop circuitry will be ON. The high off-isolation
of the audio switches along with the click and pop circuitry
will isolate the transients generated during power-up and
power down of the audio CODECs from getting through to
the headphones thus eliminating click and pop noise in the
headphones. See the “AC Coupled click and pop operation”
on page 12.
The discussion that follows will discuss using the ISL54217 in
the “Block Diagram” on page 9.
LOGIC CONTROL
The state of the ISL54217 device is determined by the
voltage at the C1 pin (pin 9) and the C0 pin (pin 10). The part
has five states or modes of operation. The All SWITCHES
OFF mode, USB1 mode, USB2 mode, Audio mode and
Audio Mute mode. Refer to “Truth Table” on page 3 and
“State Diagram” on page 2 of data sheet.
The C1 pin and C0 pin are internally pulled low through 4MΩ
resistors to ground and can be tri-stated or left floating.
The C1 pin and C0 pin can be driven with a voltage that is
The audio switches are active (turned ON) whenever the C1
and C0 logic pins are logic “1” (High).
higher than the V
supply voltage. They can be driven up
supply in the range of 2.7V to 4.6V.
DD
to 5.25V with the V
DD
Driving the logic higher than the supply rail will cause the
logic current to increase. With V = 2.7V and V
USB Switches
=
DD LOGIC
The four USB switches (1D+, 1D-, 2D+, 2D-) are 6.2Ω
bidirectional switches that were specifically designed to pass
high-speed USB differential data signals in the range of 0V
to 400mV. The switches have low capacitance and high
bandwidth to pass USB high-speed signals (480Mbps) with
5.25V, I
current is approximately 5.5µA.
LOGIC
FN6817.3
May 4, 2009
10
ISL54217
Logic Control Voltage Levels
cellphone USB transceiver #1 are connected and digital data
will be able to be transmit back and forth.
With VDD in the range of 2.7V to 3.6V the logic levels are:
C1, C0 = Logic “0” (Low) when ≤ 0.5V or Floating.
C1, C0 = Logic “1” (High) when ≥ 1.4V
USB2 Mode
If the C1 pin = Logic “1” and C0 pin = Logic “0” the part will
be in the USB2 mode provided that the last state was not the
Audio or Audio Mute state. In the USB2 mode the 2D- and
2D+ 6.2Ω USB switches will be ON and audio switches and
the 1D- and 1D+ USB switches will be OFF (high
impedance).
ALL SWITCHES OFF Mode
If the C1 pin = Logic “0” and C0 pin = Logic “0” the part will
be in the ALL SWITCHES OFF mode. In this mode the 2D-
and 2D+ USB switches, the L and R audio switches and the
1D- and 1D+ USB switches will be OFF (high impedance).
The audio L and R click and pop shunt circuitry will be
activated and the 1kΩ COM shunt resistors will be
disconnected (OFF).
The audio click and pop shunt circuitry will be activated (ON)
and the 1kΩ COM shunt resistors will be disconnected
(OFF).
When a USB cable from a computer or USB hub is
connected at the common connector, the μcontroller will
Before powering down or powering up of the audio CODECs
drivers the ISL54217 should be put in the ALL SWITCHES
OFF mode. In this mode transients present at the L and R
signal pins due to the changing DC voltage of the audio
drivers will not pass to the headphones, preventing clicks
and pops in the headphones. See the “AC Coupled click and
pop operation” on page 12.
route the incoming USB signal to USB transceiver section #2
by taking the C1 pin “High” and the C0 pin “Low” putting the
ISL54217 part into the USB2 mode. In USB2 mode the
computer or USB hub transceiver and the MP3 player or
cellphone USB transceiver #2 are connected and digital data
will be able to be transmit back and forth.
It is recommended that when transitioning from USB1 to
USB2 or from USB2 to USB1 that you always pass through
the All Switches OFF state.
Audio MUTE Mode
If the C1 pin = Logic “1” and C0 pin = Logic “0” the part will
be in the Audio MUTE mode provided that the last state was
the Audio state. In the audio MUTE mode the 2D- and 2D+
USB switches, the L and R audio switches and the 1D- and
1D+ USB switches will be OFF (high impedance).
Audio Mode
If the C1 pin = Logic “1” and C0 pin = Logic “1” the part will
be in the Audio mode. In Audio mode the L (left) and R (right)
2.3Ω audio switches are ON. The 1D- and 1D+ 6.2Ω USB
switches and 2D- and 2D+ 6.2Ω USB switches will be OFF
(high impedance).
The audio click and pop shunt circuitry will be de-activated
and the 1kΩ COM shunt resistors will be connected (ON).
Note: 1kΩ COM shunt resistors are only ON when in Audio
MUTE mode.
The audio click and pop circuitry is de-activated. The 1kΩ
shunts on the COM side of the switch will be disconnected
(OFF).
The 1kΩ shunts provide 77dB of off-isolation when driving
10kΩ to 20kΩ amplifier inputs.
When a headphone is plugged into the common connector,
the µcontroller will drive the C1 and C0 logic pins “High”
Logic Control Timing Between C1 and C0
putting the part in the audio mode. In the audio mode, the
audio drivers of the player can drive the headphones and
play music.
The ISL54217 has a unique logic control architecture. The
part has five different logic states but only two external logic
control pins, C1 and C0. Refer to “State Diagram” on page 2
and “Truth Table” on page 3.
USB1 Mode
The following state transitions require both C1 and C0 logic
control bits to change their logic levels in unison:
All OFF(C1 = 0, C0 = 0) -----> Audio (C1 = 1, C0 =1)
Audio (C1 = 1, C0 = 1) -----> All OFF (C1 = 0, C0 = 0)
Audio Mute (C1 = 1, C0 = 0) -----> USB1 (C1 = 0, C0 = 1)
If the C1 pin = Logic “0” and C0 pin = Logic “1” the part will
go into USB1 mode. In USB1 mode the 1D- and 1D+ 6.2Ω
switches are ON. The L and R 2.3Ω audio switches and 2D-
and 2D+ 6.2Ω USB switches will be OFF (high impedance).
The audio L and R click and pop shunt circuitry will be
activated and the 1kΩ COM shunt resistors will be
disconnected (OFF).
The delay time between transition of these bits must be
< 100ns to ensure that you directly move between these
states without momentarily transitioning to one of the other
states.
When a USB cable from a computer or USB hub is
connected at the common connector, the µcontroller will
For example, if you are going from the “All OFF” state to the
“Audio” state and C0 does not go high until 100ns after C1
went high you will momentarily transition to the “USB2” state.
route the incoming USB signal to USB transceiver section #1
by taking the C1 pin “Low” and the C0 pin “High” putting the
ISL54217 part into the USB1 mode. In USB1 mode the
computer or USB hub transceiver and the MP3 player or
FN6817.3
May 4, 2009
11
ISL54217
Any signals connected at the USB2 signal lines will
momentarily get passed through to the COM outputs.
be coupled into the speaker load through the DC blocking
capacitor (see the “Block Diagram” on page 9).
Delay time between C1 and C0 must be < 100ns and should
be controlled by logic control drivers with well behaved
monotonic transitions from High to Low and Low to High and
with typical logic family rise and fall times of 1ns to 6ns.
When a driver is OFF and suddenly turned ON the rapidly
changing DC bias voltage at the output of the driver will
cause an equal voltage at the input side of the switch due to
the fact that the voltage across the blocking capacitor cannot
change instantly. If the switch is in the Audio mode or there is
no low impedance path to discharge the blocking capacitor
voltage, before turning the audio switch ON, a transient
discharge will occur in the speaker, generating a click/pop
noise.
POWER
The power supply connected at VDD (pin 11) provides power
to the ISL54217 part. Its voltage should be kept in the range
of 2.7V to 4.6V. In a typical application V
will be in the
DD
range of 2.7V to 4.3V and will be connected to the battery or
LDO of the MP3 player or cellphone.
Proper elimination of a click/pop transient at the speaker
loads while powering up or down of the audio drivers
requires that the ISL54217 have its click/pop circuitry
activated by putting the part in the ALL SWITCHES OFF
mode. This allows the transients generated by the audio
drivers to be discharged through the click and pop shunt
circuitry.
A 0.01µF or 0.1µF decoupling capacitor should be
connected from the VDD pin to ground to filter out any power
supply noise from entering the part. The capacitor should be
located as close to the VDD pin as possible.
Before power-up and power-down of the ISL54217 part the
C1 and C0 control pins should be driven to ground or
tri-stated. This will put the switch in the ALL SWITCHES
OFF state, which turns all switches OFF and activate the
click and pop circuitry. This will minimize transients at the
speaker loads during power-up and power-down of the
ISL54217 device. See Figure 32 in the “Typical Performance
Curves” section.
Once the driver DC bias has reached VDD/2 and the
transient on the switch side of the DC blocking capacitor has
been discharged to ground through the click/pop shunt
circuitry, the audio switches can be turned ON and
connected through to the speaker loads without generating
any undesirable click/pop noise in the speakers.
With a typical DC blocking capacitor of 220µF and the
click/pop shunt circuitry designed to have a resistance of
20Ω to 70Ω, allowing a 100ms wait time to discharge the
transient before placing the switch in the Audio mode will
prevent the transient from getting through to the speaker
load. See Figures 30 and 31 in the “Typical Performance
Curves” section.
AC COUPLED CLICK AND POP OPERATION
Single supply audio drivers have their signal biased at a DC
offset voltage, usually at 1/2 the DC supply voltage of the
driver. As this DC bias voltage comes up or goes down
during power-up or power-down of the driver, a transient can
Typical Performance Curves T = +25°C, Unless Otherwise Specified
A
2.95
2.90
2.85
2.80
2.75
2.70
2.65
2.60
2.55
2.50
2.45
2.60
2.58
2.56
2.54
2.52
2.50
2.48
I
= 60mA
I
= 60mA
COM
COM
V
= 3.0V
DD
V
= 3.3V
= 3.6V
DD
DD
V
V
V
= 2.7V
DD
V
= 4.0V
DD
= 3.6V
= 4.6V
DD
V
= 4.6V
DD
V
DD
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
V
(V)
V
(V)
COM
COM
FIGURE 10. AUDIO ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 11. AUDIO ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FN6817.3
May 4, 2009
12
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
18
16
14
12
10
8
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I
= 60mA
COM
+85°C
V
= 3.0V
DD
V
= 3.6V
DD
+25°C
-40°C
6
4
V
= 3.0V
= 60mA
2
DD
V
= 4.6V
DD
I
COM
0
-1.5
-0.5
0.5
1.5
2.5
3.5
4.6
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
V
(V)
COM
V
(V)
COM
FIGURE 12. AUDIO ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FIGURE 13. AUDIO ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
18
18
V
= 3.3V
= 60mA
DD
V
= 3.0V
= 60mA
DD
I
16
14
12
10
8
16
14
12
10
8
COM
I
COM
6
6
+85°C
+85°C
+25°C
4
4
+25°C
0
2
2
-40°C
-0.5
-40°C
0
-1.5
0
-0.5
0.5
1.5
2.5
3.6
-1.5
-1.0
0.5
V
1.0
(V)
1.5
2.0
2.5
3.0
V
(V)
COM
COM
FIGURE 14. AUDIO ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
FIGURE 15. AUDIO ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
6.7
9
V
I
= 2.7V
DD
I
= 40mA
COM
+85°C
= 40mA
6.6
6.5
6.4
6.3
6.2
6.1
6.0
5.9
5.8
V
= 2.7V
COM
DD
8
7
6
5
4
3
V
= 3.3V
+25°C
-40°C
DD
V
= 3.0V
DD
V
= 3.3V
DD
V
= 4.6V
V
= 4.0V
0.35
DD
DD
0
0.05
0.10
0.15
0.20
V (V)
COM
0.25
0.30
0.35
0.40
0
0.05
0.10
0.15
0.20
V
0.25
(V)
0.30
0.40
COM
FIGURE 17. USB ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
FIGURE 16. USB ON-RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
FN6817.3
May 4, 2009
13
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
9
8
7
6
5
4
3
16
14
12
10
8
V
I
= 3.3V
V
I
= 3.3V
DD
DD
= 40mA
= 40mA
COM
COM
+85°C
+85°C
+25°C
+25°C
-40°C
6
-40°C
4
2
0
0.05
0.10
0.15
0.20
(V)
0.25
0.30
0.35
0.40
3.3
0
0.5
1.0
1.5
V
2.0
(V)
2.5
3.0
V
COM
COM
FIGURE 18. USB ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
FIGURE 19. USB ON-RESISTANCE vs SWITCH VOLTAGE vs
TEMPERATURE
0.032
0.056
R
P
= 32Ω
= 5mW
LOAD
LOAD
R
V
= 32Ω
= 0.707V
LOAD
LOAD
0.055
0.054
0.053
0.052
0.051
0.050
0.049
0.048
0.047
0.046
0.031
0.030
0.029
0.028
0.027
0.026
0.025
0.024
RMS
V
= 3.0V
= 3.6V
DD
V
= 2.7V
DD
V
V
V
= 3.3V
= 3.6V
DD
DD
DD
V
= 4V
DD
V
= 4.0V
= 4.6V
DD
V
V
= 4.6V
DD
DD
20
50
100 200
500 1k
2k
5k
10k 20k
20
50
100 200 500
1k
2k
5k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
FIGURE 20. THD+N vs SUPPLY VOLTAGE vs FREQUENCY
0.070
0.065
R
= 32Ω
PEAK-TO-PEAK VOLTAGES AT LOAD
LOAD
= 3V
R
= 32Ω
LOAD
FREQ = 1kHz
= 3V
0.060
0.055
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0
0.065
0.060
0.055
0.050
0.045
0.040
0.035
0.030
0.025
0.020
0.015
0.010
V
DD
2.5V
P-P
V
DD
2V
P-P
1.5V
P-P
1.13V
P-P
1V
P-P
510mV
P-P
20
50
100 200 500
1k
2k
5k
10k 20k
0.5
1.0
1.5
2.0
2.5
FREQUENCY (Hz)
OUTPUT VOLTAGE (V
)
P-P
FIGURE 22. THD+N vs SIGNAL LEVELS vs FREQUENCY
FIGURE 23. THD+N vs OUTPUT VOLTAGE
FN6817.3
May 4, 2009
14
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
-60
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
-70
V
= 3V
R
= 32Ω
DD
LOAD
FREQ = 1kHz
= 3V
R
V
= 32Ω
= 0.707V
LOAD
SIGNAL
-80
V
RMS
DD
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
0
5
10
15
20
25
30
20
50
100
200
500
1k
2k
5k
10k
20k
FREQUENCY (Hz)
OUTPUT POWER (mW)
FIGURE 25. AUDIO CHANNEL-TO-CHANNEL CROSSTALK
FIGURE 24. THD+N vs OUTPUT POWER
-60
V
V
= 3.3V
DD
SIGNAL
-65
-70
= 0.707V
RMS
AUDIO MUTE MODE
R
R
= 20kΩ
L
-75
-80
= 1k
Ω
L
-85
-90
-95
-100
-105
-110
-115
-120
-125
-130
R
= 32
Ω
L
20
50
100
200
500
1k
2k
5k
10k
20k
FREQUENCY (Hz)
FIGURE 26. OFF-ISOLATION AUDIO SWITCH vs LOADING vs FREQUENCY
FN6817.3
May 4, 2009
15
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
V
= 2.7V
DD
USB NEAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 27. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
FN6817.3
May 4, 2009
16
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
V
= 2.7V
DD
FAR END MASK
TIME SCALE (0.2ns/DIV)
FIGURE 28. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH
FN6817.3
May 4, 2009
17
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
V
= 2.7V
DD
TIME SCALE (10ns/DIV)
FIGURE 29. EYE PATTERN: 12Mbps USB SIGNAL WITH USB SWITCHES IN THE SIGNAL PATH
2V/DIV
C1, C0
2V/DIV
C1, C0
VDD/2 2V/DIV
VDD/2 2V/DIV
L
200mV/DIV
R
200mV/DIV
IN
IN
L
50mV/DIV
OUT
R
50mV/DIV
OUT
TIME (s) 100ms/DIV
TIME (s) 100ms/DIV
FIGURE 31. 1kΩ AC COUPLED CLICK/POP REDUCTION
FIGURE 30. 32Ω AC COUPLED CLICK/POP REDUCTION
FN6817.3
May 4, 2009
18
ISL54217
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
1
V
1V/DIV
DD
USB SWITCH
0
-1
-2
-3
-4
-5
V
= 1.5V OR 0V
IN
C1 = C0 = 0V
V
10mV/DIV
OUT
R
= 50Ω
L
V
= 0.2V
TO 2V
P-P
IN
P-P
10M
FREQUENCY (Hz)
1M
100M
1G
TIME (s) 200ms/DIV
FIGURE 32. POWER-UP/POWER-DOWN CLICK AND POP
TRANSIENT
FIGURE 33. FREQUENCY RESPONSE
-10
-30
-20
R
V
= 50Ω
= 0.2V
R
= 50Ω
= 0.2V
L
L
to 2V
P-P
V
to 2V
P-P P-P
IN
P-P
IN
-40
-60
-50
-70
-80
-90
-100
-120
-140
-110
-130
0.001
0.01
0.10
1M
10M
100M 500M
0.001
0.01
0.10
1M
10M
100M 500M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 35. OFF-ISOLATION AUDIO SWITCHES
FIGURE 34. OFF-ISOLATION USB SWITCHES
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up)
GND (Tie TQFN paddle to ground or float)
TRANSISTOR COUNT
837
PROCESS
Submicron CMOS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN6817.3
May 4, 2009
19
ISL54217
Package Outline Drawing
L12.3x3A
12 LEAD THIN QUAD FLAT NO LEAD PLASTIC PACKAGE
Rev 0, 09/07
3.00
0 . 5
BSC
A
6
B
12
10
PIN #1 INDEX AREA
6
PIN 1
INDEX AREA
9
1
7
3
0.10
M C A B
0.15
(4X)
4
0.25 +0.05 / -0.07
6
4
12X 0 . 4 ± 0 . 1
TOP VIEW
BOTTOM VIEW
SEE DETAIL "X"
C
0.10
C
0 . 75
BASE PLANE
SEATING PLANE
0.08
( 2 . 8 TYP )
C
SIDE VIEW
0 . 6
5
C
0 . 2 REF
0 . 50
0 . 25
0 . 00 MIN.
0 . 05 MAX.
TYPICAL RECOMMENDED LAND PATTERN
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension b applies to the metallized terminal and is measured
between 0.18mm and 0.30mm from the terminal tip.
Tiebar shown (if present) is a non-functional feature.
5.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 indentifier may be
either a mold or mark feature.
FN6817.3
May 4, 2009
20
ISL54217
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)
L12.2.2x1.4A
D
A
B
12 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC
PACKAGE
6
MILLIMETERS
INDEX AREA
N
E
SYMBOL
MIN
0.45
-
NOMINAL
MAX
0.55
0.05
NOTES
2X
0.10 C
A
A1
A3
b
0.50
-
1
2
2X
0.10 C
-
-
0.127 REF
-
TOP VIEW
0.15
2.15
1.35
0.20
0.25
2.25
1.45
5
D
2.20
-
0.10 C
E
1.40
-
e
0.40 BSC
-
C
k
0.20
0.35
-
0.40
12
3
-
-
L
0.45
-
A
A1
N
2
0.05 C
LEADS COPLANARITY
Nd
Ne
θ
3
3
3
SIDE VIEW
0
-
12
4
Rev. 0 12/06
NOTES:
(DATUM A)
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
PIN #1 ID
NX L
1
2
3. Nd and Ne refer to the number of terminals on D and E side, re-
spectively.
e
Ne
4. All dimensions are in millimeters. Angles are in degrees.
(DATUM B)
NX b
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5
0.10 M C A B
0.05 M C
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be ei-
ther a mold or mark feature.
Nd
3
7. Maximum package warpage is 0.05mm.
8. Maximum allowable burrs is 0.076mm in all directions.
BOTTOM VIEW
9. Same as JEDEC MO-255UABD except:
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm
"L" MAX dimension = 0.45 not 0.42mm.
C
L
10. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
(A1)
NX (b)
5
L
1.50
e
SECTION "C-C"
TERMINAL TIP
C C
1
2
2.30
0.40
0.45 (12x)
0.25 (12x)
3
0.40
TYPICAL RECOMMENDED LAND PATTERN
10
FN6817.3
May 4, 2009
21
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