ISL5571AIB_技术文档

ISL5571A

®

Data Sheet

J anuary 2004

FN4920.4

Acces s High Voltage Switch

Features

The ISL5571A is a solid state device designed to replace the

electromechanical relay used on Subscriber Line Cards. The

device contains two Line Break MOSFET switches, one Ring

Return MOSFET switch and one Ring Access SCR switch.

• Small Size/Surface-Mount Packaging

• Low Impulse Noise, Low EMI

• Clean, Bounce-Free Switching

• Line Break Switches

The ISL5571A is pin-for-pin compatible with the Lucent

L7581AAE LCAS and Clare CPCL7581A Products.

- 0.5Ω Max r

Match

ON

Improvements include: line break switches r

Max) higher dV/dt sensitivity (5000V/µs), protection SCR

match (0.5Ω

ON

- 28Ω Max r

ON

• Built-In Current Limiting, Thermal Shutdown and

Secondary Protection for the SLIC

hold current set to 110mA.

The line break MOSFETs have very low on resistance

(<16.0Ω Typ) and Ron match (<0.05Ω Typ, 0.5Ω Max) and a

blocking voltage >330V. The Ring Return MOSFET has a

typical Ron of 50Ω and a blocking voltage >330V. The

Ringing Access switch is implemented with a SCR device

with a blocking voltage >480V. The SCR switch inherently

offers low EMI connect and disconnect circuitry. All control

I/Os use TTL thresholds making the device compatible with

3V logic.

• Optimized for Short Loop High REN Applications

• 3V/5V Logic-Capable I/O

Applications

•

Central Office

PBX

• HFC

• FITL

• DAML

DLC

The ISL5571A also includes on-chip protection in the form of

an over-voltage clamping circuit, current-limited MOSFET

switches, and thermal shutdown circuitry. The over-voltage

clamping circuit consists of a diode bridge and SCR.

Related Literature

• Technical Brief TB363 “Guidelines for Handling and

Processing Moisture Sensitive Surface Mount Devices

(SMDs)”

Ordering Information

• Technical Brief TB379 “Thermal Characterization of

Packages for ICs”

TEMP

PART

NUMBER

PROT

SCR

RANGE

( C)

PACKAGE PKG.DWG.

TYPE

• Texas Instruments TISPL758LF3D Data Sheet

• Teccor Electronics Document DO-214AA

o

#

ISL5571AIB

Yes

-40 to 85 16 Ld SOIC

M16.3

Pinout

ISL5571A

TOP VIEW

F

1

2

3

4

5

6

7

8

16 V

15 R

14 R

GND

BAT

LINE

T

BAT

T

LINE

NC

13 NC

12 R

NC

RING

T

11 LATCH

10 INPUT

RING

V

DD

9

D

GND

T

SD

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

All other trademarks mentioned are the property of their respective owners.

ISL5571A

Block Diagram

ISL5571A - 16 LEAD SOIC

V

T

BAT

16

RING

6

LINE BREAK

SW1

2

1

T

F

T

BAT

GND

LINE

3

RING

RETURN

SW3

D1

D3

D4

SCR

RING

SW4

ACCESS

D2

R

15

7

R

V

LINE

14

BAT

LINE BREAK

SW2

DD

CONTROL LOGIC

12

11

10

9

8

R

LATCH INPUT D

TSD

RING

GND

2

ISL5571A

o

Absolute Maximum Ratings T = 25 C

Thermal Information

A

o

Maximum Supply Voltages

Thermal Resistance (Typical, Note 1)

θ

( C/W)

JA

(V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7V

DD

SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature Plastic . . . . . . . . . . . . . . . . .150 C

Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300 C

100

o

(V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-19V to -100V

BAT

o

ESD Rating (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . .500V

o

(SOIC - Lead Tips Only)

Die Characteristics

Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

BAT

Process . . . . . . . . . . . . . . . . . . . . . . . .6-inch BIMOS Bonded Wafer

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

JA

o

Electrical Specifications

T

= -40 C to 85 C, Unless Otherwise Specified

A

TABLE 1. BREAK SWITCHES - ISL5571A - SW1, SW2

PARAMETER

TEST CONDITION

MEASURE

MIN

TYP

MAX

UNITS

OFF-State Leakage Current:

o

-40 C

V

= -310V to GND

= -60V to +250V

= -320V to GND

= -60V to +260V

= -330V to GND

= -60V to +270V

I

-

1

µA

SWITCH (DIFFERENTIAL)

SWITCH

o

25 C

SWITCH

o

85 C

ON-Resistance:

o

-40 C

T

= ±10mA, ±40mA, T

= -2V

∆V

-

12

16

-

28

Ω

LINE

BAT

ON

o

25 C

o

85 C

ON-Resistance Match

ON-State Voltage (Note 2)

DC Current Limit:

Per ON-resistance Test Condition of SW1, SW2 Magnitude

SW1 - r

0.05

0.5

Ω

r

SW2

ON

Break Switches in ON-State; I

50/60Hz

= I

at

V

-

220

V

Peak

switch

LIMIT

ON

o

-40 C

V

= ±10V

I

-

80

-

125

-

250

-

mA

SWITCH (ON)

SWITCH

o

25 C

o

85 C

Dynamic Current Limit

(t = <0.5µs)

Break Switches in ON-state; Ringing Access

Switches OFF; Apply ±1000V at 10/1000µs

Pulse; Appropriate External Secondary

Protection in Place

I

-

1.5

2.0

A

SWITCH

Isolation:

o

-40 C

V

(Both Poles) = ±310V

I

-

1

µA

SWITCH

Logic Inputs = GND

V (Both Poles) = ±320V

SWITCH

o

25 C

SWITCH

Logic Inputs = GND

V (Both Poles) = ±330V

o

85 C

SWITCH

Logic Inputs = GND

dV/dt Sensitivity (Note 3)

NOTES:

-

5000

-

V/µs

2. Choice of secondary protection should ensure this rating is not exceeded.

3. Applied voltage is 100V

square wave at 100Hz.

P-P

3

ISL5571A

TABLE 2. RING RETURN SWITCH - ISL5571A - SW3

UNIT

S

PARAMETER

TEST CONDITION

MEASURE

MIN

TYP

MAX

OFF-State Leakage Current:

o

-40 C

V

= -310V to GND

= -60V to +250V

= -320V to GND

= -60V to +260V

= -330V to GND

= -60V to +270V

I

-

1

µA

SWITCH (DIFFERENTIAL)

SWITCH

o

25 C

o

85 C

DC Current Limit

o

-40 C

V

I

-

200

-

350

mA

SWITCH (ON)

SWITCH

o

25 C

V

-

SWITCH (ON)

o

85 C

120

Dynamic Current Limit

(t = <0.5µs)

Break Switches in OFF-State; Ringing Access Switches ON;

Apply ±1000V at 10/1000µs Pulse; Appropriate External

Secondary Protection in Place

I

-

1.5

2.0

A

SWITCH

ON-Resistance

T

= 0, ±10mA

∆V

-

100

130

Ω

LINE

ON

ON-State Voltage (Note 4)

Ring Return Switch in ON-State; I

= I

at 50/60Hz

V

Peak

switch

LIMIT

ON

Isolation:

o

-40 C

V

(Both Poles) = ±310V

I

-

1

µA

SWITCH

Logic Inputs = GND

V (Both Poles) = ±320V

SWITCH

o

25 C

SWITCH

Logic Inputs = GND

V (Both Poles) = ±330V

o

85 C

SWITCH

Logic Inputs = GND

dV/dt Sensitivity (Note 5)

NOTES:

-

5000

-

V/µs

4. Choice of secondary protection should ensure this rating is not exceeded.

5. Applied voltage is 100V

square wave at 100Hz.

P-P

TABLE 3. RING ACCESS SWITCH - ISL5571A - SW4

TEST CONDITION MEASURE

PARAMETER

MIN

TYP

MAX

UNITS

OFF-State Leakage Current:

o

-40 C

V

= -245V to +210V

I

-

1

µA

SWITCH (DIFFERENTIAL)

SWITCH

= +245V to -210V

= -255V to +210V

= +255V to -210V

= -270V to +210V

= +270V to -210V

o

25 C

SWITCH

o

85 C

ON-Resistance

ON Voltage

I

= ±70mA, ±80mA

∆V

-

12

3

Ω

V

SWITCH (ON)

(ON) = ±1mA

ON

I

V

ON

SWITCH

Ring Access Switch Quiescent

Current During Ringing

V

= 5V, Ring Access Switches On, All Other

I

2.0

-

mA

CC

RING QUIESCENT

(Note 6)

Switches Off

Steady State Current (Note 7)

Surge Current (Note 7)

Release Current

-

150

2

mA

A

Ring Access Switch On, Time Duration = 100µs

200

1000

µA

Isolation:

o

-40 C

V

(Both Poles) = ±310V

I

-

1

µA

SWITCH

Logic Inputs = GND

V (Both Poles) = ±320V

SWITCH

o

25 C

SWITCH

Logic Inputs = GND

V (Both Poles) = ±330V

o

85 C

SWITCH

Logic Inputs = GND

dV/dt Sensitivity (Note 8)

NOTES:

-

5000

-

V/µs

6. Magnitude of the ring generator current not supplied to the ring load. I

7. Choice of secondary protector and series current-limit resistor should ensure these ratings are not exceeded.

= I .

- I

RING QUIESCENT RING GEN RING LOAD

8. Applied voltage is 100V

square wave at 100Hz.

P-P

4

ISL5571A

TABLE 4. LOGIC I/O ELECTRICAL CHARACTERISTICS - ISL5571A

PARAMETER

TEST CONDITION

MEASURE

MIN

TYP

MAX

UNITS

Digital Input Characteristics:

Input Low Voltage

Input High Voltage

Input Leakage Current (High)

Input Leakage Current (Low)

-

V

-

2.4

-

0.8

-

1

V

µA

= 5.5V, V

= -75V, V

= 5V

= 0V

I

DD

BAT

LOGIC-IN

-

1

TABLE 5. LOGIC I/O POWER REQUIREMENTS - ISL5571A

TEST CONDITION MEASURE

PARAMETER

MIN

TYP

MAX

UNITS

Power Requirements:

Power Dissipation

V

= 5.5V, V

= -48V,

BAT

DD

Idle/Talk State

All OFF-State

Ringing State

I

, I

DD BAT

-

6.6

8.8

11.0

8.5

11.5

18.2

mW

, I

DD BAT

DD

V

Current

V

= 5.5V,

DD

Idle/Talk State

All OFF-State

Ringing State

I

-

1.2

1.6

2.0

2.1

3.3

mA

DD

Current

V

= -48V,

BAT

Idle/Talk State

All OFF-State

Ringing State

I

-

1.0

10

µA

BAT

Temp. Shutdown Requirements (Note 9)

Shutdown Activation Temperature

Shutdown Circuit Hysteresis

o

T

115

7

125

14

135

21

C

J

o

C

NOTE:

9. The Temperature Shutdown logic pin (TSD) will be high during normal operation and low during temperature shutdown state.

TABLE 6. ELECTRICAL SPECIFICATION - PROTECTION CIRCUITRY - ISL5571A

PARAMETER

TEST CONDITION

MEASURE

MIN

TYP

MAX

UNITS

PARAMETERS RELATED TO DIODES

Voltage Drop at Continuous

Current (50Hz/60Hz)

Apply ±DC Current Limit of Break Switches

Forward Voltage

-

3

-

V

Voltage Drop at Surge Current Apply ±Dynamic Current Limit of Break Switches Forward Voltage

5

PARAMETERS RELATED TO PROTECTION SCR

Surge Current

Twice ±Dynamic Current Limit of Break Switches

-

50

-

4

-

A

Gate Trigger Current

Hold Current

-V

Current

mA

V

BAT

110

Gate Trigger Voltage

Reverse Leakage Current

ON-state Voltage (Note 10)

Trigger Current

V

- 4V

-

V

- 2V

BAT

V

-

1.0

µA

BAT

0.5A, t = 0.5µs

2.0A, t = 0.5µs

-

-3

-5

-

V

NOTES:

10. In some instances, the typical ON-state voltage can range as low as -25V.

TABLE 7. POWER SUPPLY SPECIFICATIONS

SUPPLY

MIN

4.5

TYP

MAX

UNITS

V

-

5.5

-72

V

DD

-19

BAT

5

ISL5571A

TABLE 8. PIN DESCRIPTIONS - ISL5571A

NO.

NAME

NO.

NAME

DESCRIPTION

1

F

Fault Ground. Internally, this pin is electrically isolated

16

V

Battery Voltage. Used as a reference for

protection circuit. Provides Trigger

current for the protection SCR.

GND

BAT

from D

GND.

2

3

4

5

6

T

Connect to TIP on SLIC side.

Connect to TIP on line or phone side.

No Connection.

15

14

13

12

11

R

Connect to RING on SLIC side.

Connect to RING on line or phone side.

No Connection.

BAT

T

R

LINE

NC

No Connection.

R

Connect to ringing generator.

RING

T

Connect to Return Ground for Ringing Generator.

LATCH

Logic State Latch Control, active-high,

transparent low.

RING

7

8

V

T

+5V supply.

10

9

INPUT

Logic Level Input Switch Control.

DD

Temperature Shutdown Pin. Can be used as a logic level

input or output. See Truth Table. As an output, will read

+5V when device is in its operational mode and 0V in the

thermal shutdown mode. In the ISL5571A, the thermal

shutdown mechanism cannot be disabled.

D

GND

Digital Ground. Internally, this pin is

SD

electrically isolated from F

.

GND

Pinout

ISL5571A

TOP VIEW

- 48 V

DC

T

V

RING

BAT

16

6

V

BAT

RING

RETURN

T

F

BAT

GND

T

LINE

R1

SW3

TIP

2

1

3

TIP LINE BREAK

SW1

D1

D3

EXTERNAL

CROWBAR

SLIC

SCR

^PROTECTION†

R

D2

D4

BAT

RING

15

14

RING LINE BREAK

SW2

RING

R

R2

LINE

RING

ACCESS

SW4

7

CONTROL LOGIC

GND

V

DD

RRLY

12

11

10

INPUT

9

8

R

RING

LATCH

D

TSD

GND

R

GEN

+ 5 V

† ^{TLINE EXTERNAL PROTECTOR MAXIMUM}

VOLTAGE PRIOR TO SWITCHING TO THE

ON STATE SHOULD NOT EXCEED 130V.

DC

RING

RLINE EXTERNAL PROTECTOR MAXIMUM

VOLTAGE PRIOR TO SWITCHING TO

†

GENERATOR

BATTERY

THE ON STATE SHOULD NOT EXCEED 220V.

FIGURE 1. APPLICATION CIRCUIT

6

ISL5571A

TABLE 9. TRUTH TABLE - ISL5571A

LOGIC INPUTS

SWITCH CONDITION

RINGING

TIP LINE BREAK RING LINE BREAK

RETURN RINGACCESS

LOGIC STATE

IDLE / TALK

LATCH INPUT

T

SWITCH

SD

0

1

0

1

0

1 or Floating (Note 11)

ON

OFF

POWER RINGING

OFF

ON

IDLE / TALK

ON

OFF

LATCHED (Note 12)

POWER RINGING

LATCHED (Note 12)

1

1 or Floating (Note 11)

0 (Note 13)

OFF

ON

All OFF

X

OFF

NOTES:

11. Thermal shutdown mechanism is active with TSD floating or equal to 5V.

12. If the LATCH pin is low, the logic state of the device is controlled by the INPUT pin. When the LATCH pin goes high, the current logic state is

latched. As long as the LATCH pin is held high, the device will no longer respond to any changes applied to the INPUT control pin. The state of

the device will be permanently latched until the LATCH pin is taken low.

13. Setting TSD to a logic low overrides the LATCH and INPUT logic pins and forces all switches to turn OFF.

Circuit Operation and Design Information

short loop, high Ringer Equivalency Number applications)

and with 3V TTL logic controlled inputs.

Introduction

The ISL5571A was designed to be used in subscriber line

card applications. A typical application circuit is shown in

Figure 1. Its main purpose is to momentarily disconnect the

voice circuit (SLIC and CODEC) and connect an external

From the application circuit shown in Figure 1, the ISL5571A

ring generator to ring the phone. This function has been

traditionally done by electromechanical relays. The

SW2), the Ring Return switch (SW3), and the Ring Access

ISL5571A offers the system designer a solid-state switching

solution with distinct advantages over the electromechanical

open and close in unison to connect and disconnect the

relay. These advantages are as follows:

Bas ic Functional Des cription

This section describes the basic operation of the ISL5571A.

consists of four switches, the Line Break switches (SW1,

switch (SW4). The Line Break switches (SW1 and SW2)

voice / data signal from the phone. The Ring Access switch

and the Ring Return switch (SW3 and SW4) open and close

in unison, to connect and disconnect the external ring

• Lower power consumption (20mW vs. 150mW for the

relay)

• Smaller size, surface mounted package

• Bounce-Free switching

generator to the phone.

The ISL5571A has three possible operating states: the Idle /

Talk state, the Power Ringing state, and the All OFF state. It

also has a built in Logic State Latch. The Logic State Latch

enables the user to latch the logic state of the ISL5571A in

either the Idle / Talk state or the Power Ringing state.

• Lower impulse noise, Low EMI

• Longer life

• Provides current limiting, thermal shutdown, and over-

voltage protection for the SLIC and CODEC

Their bounce-free operation, long lifetime, small size, and

low power consumption make the solid-state access switch

the preferred choice over electromechanical relays

whenever board area, high reliability, and heat reduction are

primary concerns.

The three control logic pins for the ISL5571A are the INPUT

pin, the TSD pin and the LATCH pin. These logic pins are

controlled by TTL logic levels (0V - 0.8V for logic low and

2.4V - 5.0V for logic high). The combination of the logic

levels applied at these pins determine which of the three

logic states the device will be in and whether the Logic State

Latch is active. The truth table for the ISL5571A is shown in

Table 9. A description of each operating state and the

control logic pins follows:

The ISL5571A was designed to be a drop in replacement for

the Lucent ATTL7581AAE LCAS device. The Intersil

ISL5571A offers superior r

matching between the line

ON

break switches for optimal longitudinal balance, higher

temperature operation (enabling continuous operation in

7

ISL5571A

the LATCH pin is taken low the device will again be under

Idle / Talk State (LATCH = 0, INPUT = 0, TSD = 1 or

the control of the INPUT pin and the switches will

immediately go to the state specified by the logic level at the

INPUT pin. (Note: The TSD pin overrides the LATCH pin and

the INPUT pin. When the TSD pin is low the ISL5571A goes

to the ALL OFF state regardless of the logic levels applied at

the LATCH pin and the INPUT pin.)

Floating)

In this state the Line Break switches (SW1 and SW2) are

closed (on) and the Ring Return and Ring Access switches

(SW3 and SW4) are open (off). The subscriber line circuit is

either on-hook or off-hook:

1. In the on-hook condition, the SLIC is monitoring the Tip

and Ring lines through the Line Break switches for an off-

hook condition. This is called the Idle state.

ISL5571A

2. In the off-hook condition, a telephone conversation

between two or more parties is in progress or data is

being transferred between modems. This is called the

Talk state. The SLIC is providing DC power through the

Line Break switches to the telephone handset for

modulation. Modulated AC voice signals or data are

traveling through the Line Break switches SW1 and SW2.

LOGIC

STATE

LATCH

10 INPUT

LOGIC

CONTROL

CIRCUITRY

SWITCHES

8

TSD

Power Ringing State (LATCH = 0, INPUT = 1, TSD = 1

11

LATCH

or Floating)

In this state the Line Break switches (SW1 and SW2) are

open (off) and the Ring Return and Ring Access switches

(SW3 and SW4) are closed (on). For ring injected ringing as

shown in Figure 1, a ring generator is connected to the

phone through the Ring Access switch (SW4) and returned

to ground through the Ring Return switch (SW3).

FIGURE 2. BLOCK DIAGRAM OF LOGIC CONTROL

INPUT Pin

The INPUT pin (pin 10) is the main logic input control pin.

Reference Table 9 for logic state table. When the LATCH pin

is low and the TSD pin is high or floating, you can toggle

back and forth between the Idle / Talk state and the Power

Ringing state by changing the logic level at the INPUT pin.

This is the normal operating mode of the device.

All OFF State (LATCH = X, INPUT = X, TSD = 0)

In this state both the Line Access switches (SW1 and SW2)

and the Ring Return and Ring Access switches (SW3 and

SW4) are open (off). The ISL5571A will enter the All Off

state when the following conditions occur:

NOTE:

If the LATCH pin is high, the INPUT pin is no

longer active and the device will no longer

respond to logic changes at the INPUT pin.

1. The TSD pin is used as a control input and is

programmed to logic low.

The TSD pin overrides all other logic pins. If the

TSD pin is low, the device will enter an All OFF

state and will no longer respond to logic

changes at the INPUT pin.

2. The device has enter thermal shutdown due to a fault

condition. (Thermal Shutdown is described in the

Auxiliary Functions and Features section below.)

3. If V

BAT

rises above -10V or disappears.

Latch Pin

While in the All OFF state, communication and power ringing

are inoperable because all the ISL5571A switches are open

(off).

The LATCH pin (pin 11) is the control for the Logic State

Latch. Reference Table 9 for logic state table. When the

LATCH pin is low, the latch is disabled and the state of the

ISL5571A will be determined by the logic level applied at the

other logic inputs.

Logic State Latch (LATCH = 1, TSD = 1 or floating,

INPUT = 0 or 1)

A Logic State Latch is Integrated into the ISL5571A, see

Figure 2. If the LATCH control pin is high and the TSD pin is

high or floating, the device will no longer respond to logic

level changes at the INPUT pin. The state of the switches

will be determined by the logic level of the INPUT pin at the

time the LATCH pin transitions from logic low to logic high.

The state of the switches at the time of this transition will be

permanently held as long as the LATCH pin is high. When

When the LATCH pin is high, the latch is active and the logic

state of the switches at the time the LATCH pin went high

will be latched. As long as the LATCH pin is held high the

switches will not respond to logic changes at the INPUT

control pin.

8

ISL5571A

TSD Pin

+I

CURRENT

LIMITING

The TSD pin (pin 8) can be used as a logic level input or

I

LIMIT

output. Reference Table 9 for logic state table. The TSD pin

overrides all other logic pins.

2/3 r

ON

As an input, if this pin is driven low, either by external logic

applied to it or by the internal thermal shutdown circuitry, the

ISL5571A device will enter the All OFF state. In the All OFF

state all switches of the ISL5571A are open (off).

r

ON

-1.5

+1.5

-V

+V

As an output, it is capable of driving a TTL input (2.8V at

200µA). The TSD pin will read +5V when the device is in

normal operating mode and 0V when the device is in thermal

shutdown. This pin can be monitored on an oscilloscope to

determine if the ISL5571A device has enter thermal

shutdown. (Thermal Shutdown is described in the Auxiliary

Functions and Features section below.)

r

ON

2/3 r

ON

I

LIMIT

CURRENT

LIMITING

-I

Connecting the TSD pin to 5V will have no effect on the

performance of the ISL5571A device and will not disable the

thermal shutdown circuitry.

FIGURE 3. ON STATE V-I GRAPH OF SW1, SW2 AND SW3

Auxiliary Functions and Features

+I

In addition to the ISL5571A main function of momentarily

connecting and disconnecting an external ring generator to

ring the phone, the ISL5571A device also provides surge

and power-cross protection to the SLIC and CODEC. This

fault protection is provided by a combination of current-

limiting circuitry, a thermal shutdown mechanism and an

over-voltage clamping circuit. Another feature the device

T1

T2

offers is a V

describes each in detail.

fault detection circuit. The following

BAT

-V

+V

T2

T1

Current Limiting

The Line Break switches (SW1 and SW2) and the Ring

Return switch (SW3) are all current-limited. These switches

have a DC current limiting response and a dynamic current

limiting response which were built into the device to provide

protection during lightning and power-cross faults. Each of

these current limiting responses are explained below.

T2 > T1

-I

FIGURE 4. EFFECT OF TEMPERATURE ON DC CURRENT

LIMIT

DC CURRENT LIMITING RESPONSE

The ON state V-I Graph for SW1, SW2, and SW3 is shown

in Figure 3. It represents the DC current limiting response of

the switches. The graph shows that over a certain range of

positive and negative voltages, the current and voltage

relationship is linear and behaves according to Ohms law

(V = IR). Note: At around ±1.5V an inflection point occurs

decreasing the on resistance by 2/3. The on resistance

specified in the data sheet is measured in the region prior to

the inflection point (between ±1.5V).

+I

2A

0

When current through the switch reaches the current limit of

the switch, the current is clamped and held at a constant

value. The switch then operates as a constant current

source. Increasing the voltage beyond this point will not

change the value of the current.

TIME

0.5µs

FIGURE 5. DYNAMIC CURRENT LIMIT RESPONSE

9

ISL5571A

The DC current limiting response has a negative

temperature coefficient. As the temperature of the device

increases the DC current limit of the switch will decrease.

This is illustrated in Figure 4.

condition is still present, the temperature of the die will again

increase and this cycle will be repeated.

Over Voltage Protection Clamping Circuit

The ISL5571A contains an over-voltage clamping circuit on

the SLIC side of the Line Break switches, see Figure 1. This

clamping circuit consists of a diode bridge and SCR. During

lightning surges and power-cross fault conditions this circuit

Figure 4 shows the V-I curves of a switch at two different die

temperatures, T1 and T2. In this illustration T2 is greater in

temperature than T1. This shows that when a switch is

driven into current limit and held there, the current limit will

decrease over time as the switch temperature increases. If

the power through the switch is great enough, the

temperature of the switch will continue to increase until the

switch goes into thermal shutdown (Thermal Shutdown is

described below).

will clamp the voltage at the T

and R terminals of the

BAT

SLIC to a safe level and will shunt harmful currents to

ground away from the SLIC.

The clamping circuit is externally connected to ground

through the F

pin (pin 1) of the device. The battery

GND

voltage of the SLIC is connected to the clamping circuit

through the V pin (pin 16) of the device. The operation of

Dynamic Current Limiting Res pons e

BAT

The DC current limit response described above pertains to

DC and AC voltage sources applied across the switches.

The dynamic response is the response of the current limit

circuit to a fast or high dv/dt pulse. The dynamic response

would be seen, for example, during a lightning surge

diode bridge and the SCR circuit is described below.

DIODE BRIDGE WITH SCR (ISL5571A)

During a positive lightning surge or during the positive cycle

of a power-cross / induction fault, the voltage at the T

BAT

terminals of the SLIC will be clamped to a diode

and R

BAT

Figure 5 shows the dynamic response that is observed when

SW1, SW2 or SW3 is surged with a 1000V at 10/1000µs

telecom surge pulse. (Note: This surge test is done with the

switch in the on state and with the appropriate external

secondary protection in place.) The dynamic current limit of

SW1, SW2 or SW3 will limit the current through the switch to

less than 2.0A for 0.5µs as shown in Figure 5. Once the

drop above ground. The fault current will flow harmlessly

through diodes D1 and D2 of the diode bridge to ground (see

Figure 1).

During a negative lightning surge or during the negative

cycle of a power-cross / induction fault when the voltage at

the T

than the V

and R

terminals reach 2V to 4V more negative

voltage, the protection SCR will trigger and

BAT

turn on. When the SCR turns on and latches, it will crowbar

the voltage at the T and R lines to a low-voltage

switch has turned off, the voltage at the T

and R

Line

terminals will increase to a point where the external

secondary protection device will trigger and crowbar the

voltage at T and R to a low voltage, protecting the

BAT

state, approximately 3 diode drops below ground. This low-

voltage on state will cause the current resulting from the over

voltage to be safely direct to ground through diodes D3 and

D4 of the diode bridge and the SCR (see Figure 1). Once the

fault current decrease below the protection SCR holding

current (110mA) the SCR will turn off and the SLIC will be

able to return to normal operation.

Line

ISL5571A against damage.

Since the Line Break switches (SW1, SW2) have this

dynamic current limit feature, the internal over-voltage

protection clamping circuit of the ISL5571A device will need

to only protect the SLIC against a 2.0A ≤0.5µs pulse during a

lightning surge.

V

Fault Circuit Protection - Los s of Battery

BAT

Thermal Shutdown (TSD)

Voltage

The ISL5571A has a built in thermal shutdown protection

circuit. The thermal shutdown protection mechanism is

invoked if a fault condition causes the junction temperature

of the die to exceed about 150^oC. Once the thermal limit is

exceeded the thermal shutdown circuitry will force the

switches into an All OFF state, regardless of the logic inputs.

While in thermal shutdown the TSD logic pin (pin 11) will be

driven low by the thermal shutdown circuit. (Note: During

normal operation the TSD pin is high.) The thermal

shutdown mechanism was designed to have a thermal

hysteresis of about 12^oC. Once in thermal shutdown the

device will begin to cool down, because all the switches are

off and no current flows. When the temperature of the die

cools to about 138^oC the ISL5571A will cycle out of thermal

shutdown and the switches will close again. If the fault

The ISL5571A device contains a V

fault circuit which

). When this circuit

BAT

monitors the SLIC battery voltage (V

BAT

voltage has risen above -10V, it will

detects that the V

BAT

cause the ISL5571A to enter the All OFF state. All the

switches will remain off (open) until the circuit detects that

the SLIC battery voltage has dropped below -15V.

Des ign Cons iderations

External Protection

Subscriber line card circuits using the ISL5571A require the

use of an external protection circuit on the loop side or

phone side of the device, see Figure 1. This protection is

required to minimize the power stress on the ISL5571A

during overvoltage and overcurrent conditions. When the

proper external protection circuitry is used in conjunction

10

ISL5571A

with the integrated secondary protection, features offered by

Ringing state to the Idle / Talk state. There is a period of time

that can be as much as 25ms (1/2 cycle of the 20Hz ring

signal) when both SW2 and SW4 will both be on (closed).

This occurs because SW4 is an SCR and requires a zero

current crossing to turn off.

the ISL5571A, the application circuit will pass the AC power-

cross and lightning immunity tests of the following regulatory

requirements:

• GR 1089-CORE

• ITU-T K.20

Protection SRC Latch-Up

In the Make-before-Break condition, when transiting from the

Power Ringing state to the Idle/ Talk state, during the negative

cycle of the ring generator it is possible for enough current to

flow that the protection SCR will turn on. This will result in

shorting the ring generator and the Ring terminal of the SLIC

to ground. When either SW2 or SW4 turns off, the Ring

terminal of the SLIC will remain shorted to ground unless the

output current limit of the SLIC is less than the holding current

(110mA) of the protection SCR. The current limit of most

SLICs are set well below the 110mA minimum holding current

of the ISL5571A protection SCR and therefore should not be a

concern. Another method to prevent latch-up of the protection

SCR would be to strobe the TSD pin of the ISL5571A. as

discussed in Break-Before-Make section.

This section will discuss the issues that must be considered

when designing an external protection circuit for use with the

ISL5571A.

The external protection circuitry should be designed to limit

the peak voltages on the T

and R terminals of the

Line

ISL5571A. The most potentially stressful condition concerning

the ISL5571A is low level power-cross when the ISL5571A

switches are closed. Under this condition, the external

protection circuitry limits the voltage and corresponding power

dissipation until the ISL5571A thermal shutdown circuitry

opens the switches.

The external protector chosen for the T

Line

terminal

must limit at a maximum of 130V thereby limiting the

power stress on the Ring Return switch (SW3).

Ring Acces s Switch Quies cent Current During

Ringing

The protector chosen for the R

Line

terminal must limit at a

The Ring Access switch (SW4) is a silicon control rectifier

type switch (SCR). During power ringing, the Ring Access

switch will draw a nominal 2mA of current from the ring

maximum of 220V thereby limiting the power stress on the

Line Break switch (SW2). The 220V break-over voltage of the

protector on RLine is large enough to not interfere with the AC

ring signal during ringing.

generator. This current is called I

equal to:

and is

RING QUIESCENT

Texas Instruments and Teccor Electronics have designed

specific parts to protect solid state line card access switches.

The following protectors are recommended:

I

= I

- I .

RING GEN RING LOAD

RING QUIESCENT

System designers need to ensure that this additional current

can be provided by the ring generator.

Texas Instruments Part Number TISPL758LF3D(T

Line

and R

)

Glos s ary of Acronyms

AC = Alternating Current

BIMOS = Bipolar Metal-Oxide Semiconductor

CO = Central Office

Line

Teccor Electronics Part Number P1200SC (T

P2000SC (R

) and

Line

)

Line

Refer to the above company’s data sheets for information on

their parts and reference designs for protection of solid state

line card access switches, see Related Literature section on

Page One.

CODEC = CODer-DECoder

DC = Direct Current

DLC = Digital Loop Carrier

DAML = Digitally Added Main Line

EMI = Electromagnetic Interference

ESD = Electrostatic Discharge

FITL = Fiber in the Loop

Break-Before-Make Operation

The ISL5571A device inherently has a Break-before-Make

condition between the following switches:

HFC = Hybrid Fiber Coax

ICs = Integrated Circuits

a. Between the Line Break switch SW1 and the Ring

Return switch SW3 during the transition from the Idle

state to the Power Ringing state.

LCAS = Line Card Access Switch

PBX = Private Branch Exchange

REN = Ring Equivalency Number

MOSFET = Metal-Oxide Semiconductor Field-Effect Transistor

SCR = Silicon Control Rectifier

SLIC = Subscriber Line Interface Circuit

SMDs = Surface Mount Devices

SOIC = Small Outline Integrated Circuit

TSD = Thermal ShutDown

b. Between the Line Break switch SW2 and the Ring

Access switch SW4 during the transition from the

Idle state to the Power Ringing state.

Make-Before-Break Operation

The ISL5571A device could exhibit a Make-before-Break

condition between the Line Break switch SW2 and the Ring

Access switch SW4 during the transition from the Power

TTL = Transistor-Transistor Logic

11

ISL5571A

Small Outline Plas tic Packages (SOIC)

N

M16.3 (JEDEC MS-013-AA ISSUE C)

INDEX

AREA

0.25(0.010)

M

B M

H

16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

E

INCHES

MILLIMETERS

-B-

SYMBOL

MIN

MAX

MIN

2.35

0.10

0.33

0.23

MAX

2.65

0.30

0.51

0.32

10.50

7.60

NOTES

A

A1

B

C

D

E

e

0.0926

0.0040

0.013

0.1043

0.0118

0.0200

0.0125

-

1

2

3

L

-

9

SEATING PLANE

A

0.0091

0.3977

0.2914

-

-A-

o

h x 45

D

0.4133 10.10

3

0.2992

7.40

4

-C-

α

µ

0.050 BSC

1.27 BSC

-

e

A1

H

h

0.394

0.010

0.016

0.419

0.029

0.050

10.00

0.25

0.40

10.65

0.75

1.27

-

C

B

0.10(0.004)

5

0.25(0.010) M

C A M B S

L

6

N

α

16

7

NOTES:

o

0

8

0

8

-

1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of

Publication Number 95.

Rev. 0 12/93

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate burrs.

Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006

inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. Interlead

flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual index

feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above

the seating plane, shall not exceed a maximum value of 0.61mm (0.024

inch)

10. Controlling dimension: MILLIMETER. Converted inch dimensions are

not necessarily exact.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

12


型号：	ISL5571AIB
厂家：	Intersil
描述：	Access High Voltage Switch 进入高压开关开关高压
文件：	总12页 (文件大小：163K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ISL5571AIB [INTERSIL]

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