ISL6292-2CR4Z [INTERSIL]
Li-ion/Li Polymer Battery Charger; 锂离子/锂聚合物电池充电器
| 型号： | ISL6292-2CR4Z |
| 厂家： | 
Intersil |
| 描述： | Li-ion/Li Polymer Battery Charger |
| 文件： | 总19页 (文件大小：644K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL6292
®
Data Sheet
July 25, 2005
FN9105.6
Li-ion/Li Polymer Battery Charger
Features
The ISL6292 is an integrated single-cell Li-ion or Li- polymer
battery charger capable of operating with an input voltage as
low as 2.4V. This charger is designed to work with various
types of ac adapters or a USB port.
• Complete Charger for Single-Cell Li-ion Batteries
• Very Low Thermal Dissipation
• Integrated Pass Element and Current Sensor
• No External Blocking Diode Required
• 1% Voltage Accuracy
• Programmable Current Limit up to 2A
• Programmable End-of-Charge Current
• Charge Current Thermal Foldback
• NTC Thermistor Interface for Battery Temperature Monitor
• Accepts Multiple Types of Adapters or USB BUS Power
• Guaranteed to Operate at 2.65V After Start Up
• Ambient Temperature Range: -20°C to 70°C
• Thermally-Enhanced QFN Packages
• Handheld Devices including Medical Handhelds
• PDAs, Cell Phones and Smart Phones
• Portable Instruments, MP3 Players
The ISL6292 operates as a linear charger when the ac
adapter is a voltage source. The battery is charged in a
CC/CV (constant current/constant voltage) profile. The
charge current is programmable with an external resistor up
to 2A. The ISL6292 can also work with a current-limited
adapter to minimize the thermal dissipation, in which case
the ISL6292 combines the benefits of both a linear charger
and a pulse charger.
The ISL6292 features charge current thermal foldback to
guarantee safe operation when the printed circuit board is
space limited for thermal dissipation. Additional features
include preconditioning of an over-discharged battery, an
NTC thermistor interface for charging the battery in a safe
temperature range, automatic recharge, and thermally
enhanced QFN or DFN packages.
• Self-Charging Battery Packs
• Stand-Alone Chargers
• USB Bus-Powered Chargers
Ordering Information
PKG.DWG.
PART # (NOTE) TEMP. RANGE (°C)
ISL6292-1CR3 -20 to 70
ISL6292-1CR3-T 10 Ld 3x3 DFN Tape and Reel
ISL6292-2CR3 -20 to 70 10 Ld 3x3 DFN L10.3x3
ISL6292-2CR3-T 10 Ld 3x3 DFN Tape and Reel
ISL6292-1CR4 -20 to 70 16 Ld 4x4 QFN L16.4x4
ISL6292-1CR4-T 16 Ld 4x4 QFN Tape and Reel
ISL6292-2CR4 -20 to 70 16 Ld 4x4 QFN L16.4x4
ISL6292-2CR4-T 16 Ld 4x4 QFN Tape and Reel
ISL6292-1CR5 -20 to 70 16 Ld 5x5 QFN L16.5x5B
ISL6292-1CR5-T 16 Ld 5x5 QFN Tape and Reel
ISL6292-2CR5 -20 to 70 16 Ld 5x5 QFN L16.5x5B
PACKAGE
#
• Pb-Free Plus Anneal Available (RoHS Compliant)
10 Ld 3x3 DFN L10.3x3
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Pinouts
ISL6292 (16 LEAD QFN)
ISL6292 (10 LEAD DFN)
TOP VIEW
TOP VIEW
ISL6292-2CR5-T 16 Ld 5x5 QFN Tape and Reel
VIN
1
10 VBAT
16 15 14 13
FAULT
STATUS
TIME
2
3
4
5
9
8
7
6
TEMP
IREF
V2P8
EN
ISL6292EVAL1 Evaluation Board for the 3x3 DFN Package Part.
ISL6292EVAL2 Evaluation Board for the 4x4 QFN Package Part.
VIN
FAULT
STATUS
TIME
1
2
3
4
12 VBAT
11 TEMP
10 IMIN
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
GND
9
IREF
5
6
7
8
Add a “Z” to the end of the part # above for lead-free packages, e.g.,
“ISL6292-1CR3Z-T” is the part # for the lead-free ISL6292-1CR3-T.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003-2005. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
ISL6292
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Junction to Ambient)
5x5 QFN Package (Notes 1, 2) . . . . . .
4x4 QFN Package (Notes 1, 2) . . . . . .
3x3 DFN Package (Notes 1, 2) . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 7V
Output Pin Voltage (BAT). . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V
Signal Input Voltage (TOEN, TIME, IREF, IMIN) . . . . . . -0.3 to 3.2V
Output Pin Voltage (STATUS, FAULT). . . . . . . . . . . . . . . . -0.3 to 7V
Charge Current (For 4x4 or 5x5 QFN Packages) . . . . . . . . . . . 2.1A
Charge Current (For 3x3 DFN Package) . . . . . . . . . . . . . . . . . 1.6A
θ
(°C/W)
θ
(°C/W)
JC
JA
34
41
46
4
4
4
Recommended Operating Conditions
Ambient Temperature Range. . . . . . . . . . . . . . . . . . . .-20°C to 70°C
Supply Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379.
2. θ , “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
JC
Electrical Specifications Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted.
PARAMETER
POWER-ON RESET
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Rising VIN Threshold
3.0
3.4
2.4
4.0
V
V
Falling VIN Threshold
STANDBY CURRENT
VBAT Pin Sink Current
VIN Pin Supply Current
VIN Pin Supply Current
VOLTAGE REGULATION
Output Voltage
2.25
2.65
I
VIN floating or EN = LOW
-
-
-
-
3.0
µA
µA
STANDBY
I
VBAT floating and EN pulled low
VBAT floating and EN floating
30
1
-
-
VIN
VIN
I
mA
V
V
ISL6292-1
4.059
4.10
4.20
140
175
4.141
V
V
CH
CH
Output Voltage
ISL6292-2
4.158
4.242
Dropout Voltage
VBAT = 3.7V, 0.5A, 4X4 or 5X5 package
VBAT = 3.7V, 0.5A, 3X3 package
-
-
-
-
mV
mV
Dropout Voltage
CHARGE CURRENT
Constant Charge Current
Trickle Charge Current
Constant Charge Current
Trickle Charge Current
Constant Charge Current
Trickle Charge Current
End-of-Charge Threshold
RECHARGE THRESHOLD
Recharge Voltage Threshold
Recharge Voltage Threshold
TRICKLE CHARGE THRESHOLD
Trickle Charge Threshold Voltage
I
R
R
= 80kΩ, V
= 80kΩ, V
= 3.7V
= 2.0V
0.9
1.0
110
450
45
1.1
-
A
CHARGE
IREF
IREF
BAT
BAT
I
-
400
-
mA
mA
mA
mA
mA
mA
TRICKLE
I
IREF Pin Voltage > 1.2V, V
IREF Pin Voltage > 1.2V, V
IREF Pin Voltage < 0.4V, V
IREF Pin Voltage < 0.4V, V
= 3.7V
= 2.0V
= 3.7V
= 2.0V
520
-
CHARGE
BAT
BAT
BAT
BAT
I
TRICKLE
I
-
-
100
-
CHARGE
I
-
10
TRICKLE
R
= 80kΩ
85
110
135
IMIN
V
V
ISL6292-2
ISL6292-1
-
-
4.0
-
-
V
V
RECHRG
RECHRG
3.90
V
2.7
2.8
3.0
V
MIN
FN9105.6
2
July 25, 2005
ISL6292
Electrical Specifications Typical values are tested at VIN = 5V and 25°C Ambient Temperature, maximum and minimum values are
guaranteed over 0°C to 70°C Ambient Temperature with a supply voltage in the range of 4.3V to 6.5V, unless
otherwise noted. (Continued)
PARAMETER
TEMPERATURE MONITORING
Low Battery Temperature Threshold
High Battery Temperature Threshold
Battery Removal Threshold
Charge Current Foldback Threshold
Current Foldback Gain
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
V2P8 = 3.0V
1.40
0.34
-
1.50
0.38
2.25
100
100
1.60
0.42
-
V
V
TMIN
V
V2P8 = 3.0V
V2P8 = 3.0V
TMAX
V
V
RMV
T
85
-
115
-
°C
FOLD
G
mA/°C
FOLD
OSCILLATOR
Oscillation Period
T
C
= 15nF
TIME
2.4
3.0
3.6
ms
OSC
LOGIC INPUT AND OUTPUT
TOEN Input High
2.0
-
-
-
-
-
-
-
0.8
-
V
V
TOEN and EN Input Low
IREF and IMIN Input High
IREF and IMIN Input Low
STATUS/FAULT Sink Current
1.2
-
V
0.4
-
V
Pin Voltage = 0.8V
5
mA
Typical Operating Performance The test conditions for the Typical Operating Performance are: V = 5V, T = 25°C,
IN
A
R
= R
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted
BAT
IREF
4.210
4.208
4.2015
4.201
4.2005
4.2
4.206
4.204
4.202
4.200
4.198
4.196
4.194
4.192
4.190
CHARGE CURRENT = 50mA
R
= 40kΩ
IREF
4.1995
4.199
4.1985
4.198
4.1975
0
20
40
60
80
100
120
0
0.3
0.6
0.9
1.2
1.5
CHARGE CURRENT (A)
TEMPERATURE (°C)
FIGURE 1. CHARGER OUTPUT VOLTAGE vs CHARGE
CURRENT
FIGURE 2. CHARGER OUTPUT VOLTAGE vs TEMPERATURE
FN9105.6
3
July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: V = 5V, T = 25°C,
IN
A
R
= R
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted (Continued)
BAT
IREF
2
4.3
4.25
4.2
1.8
2A
CHARGE CURRENT = 50mA
1.6
1.4
1.5A
1.2
1
1A
0.8
0.5A
0.6
4.15
4.1
0.4
USB500
USB100
0.2
0
4.2
4.5
4.8
5.1
5.4
(V)
5.7
6
6.3
3
3.2
3.4
3.6
(V)
3.8
4
V
V
BAT
IN
FIGURE 3. CHARGER OUTPUT VOLTAGE vs INPUT
VOLTAGE CHARGE CURRENT IS 50mA
FIGURE 4. CHARGE CURRENT vs OUTPUT VOLTAGE
1.6
2
1.8
1.6
1.4
1.5A
1.2
1.4
1.5A
1.0
1.2
1
2A
1.0A
0.8
0.6
1A
0.8
0.6
0.4
0.2
0
0.5A
0.5A
0.4
0.2
0.0
USB500
USB100
4.3 4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 6.1 6.3 6.5
(V)
0
20
40
60
80
100
120
V
TEMPERATURE (°C)
IN
FIGURE 5. CHARGE CURRENT vs AMBIENT TEMPERATURE
FIGURE 6. CHARGE CURRENT vs INPUT VOLTAGE
3
2.93
2.95
2.928
2.926
2.924
2.922
2.92
V2P8 PIN LOADED WITH 2mA
2.9
2.85
2.8
2.75
2.7
3.5
4
4.5
5
5.5
6
6.5
0
2
4
6
8
10
V
(V)
V2P8 LOAD CURRENT (mA)
IN
FIGURE 7. V2P8 OUTPUT vs INPUT VOLTAGE
FIGURE 8. V2P8 OUTPUT vs ITS LOAD CURRENT
FN9105.6
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July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: V = 5V, T = 25°C,
IN
A
R
= R
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted (Continued)
BAT
IREF
700
650
600
550
500
450
400
350
300
250
200
420
500mA CHARGE CURRENT,
= 40kΩ
THERMAL FOLDBACK STARTS
NEAR 100°C
400
380
360
340
320
300
R
IREF
3x3 DFN
3x3 DFN
4x4 QFN
3.6
4x4 QFN
80
280
260
3.0
3.2
3.4
3.8
4.0
0
20
40
60
100
120
V
(V)
TEMPERATURE (°C)
BAT
FIGURE 9. r
vs TEMPERATURE AT 3.7V OUTPUT
FIGURE 10. r
vs OUTPUT VOLTAGE USING CURRENT
DS(ON)
DS(ON)
LIMITED ADAPTERS
50
45
40
35
30
25
20
15
10
5
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
EN = GND
0
0.0
0
0
20
40
60
80
100
120
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 11. REVERSE CURRENT vs TEMPERATURE
FIGURE 12. INPUT QUIESCENT CURRENT vs TEMPERATURE
32
1.10
1.05
1.00
0.95
30
28
26
24
22
20
18
16
14
12
10
EN = GND
BOTH VBAT AND EN
PINS FLOATING
0.90
0.85
0.80
4.3
4.6
4.9
5.2
5.5
(V)
5.8
6.1
6.4
3.0
3.5
4.0
4.5
V
5.0
(V)
5.5
6.0
6.5
V
IN
IN
FIGURE 13. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN SHUTDOWN
FIGURE 14. INPUT QUIESCENT CURRENT vs INPUT
VOLTAGE WHEN NOT SHUTDOWN
FN9105.6
5
July 25, 2005
ISL6292
Typical Operating Performance The test conditions for the Typical Operating Performance are: V = 5V, T = 25°C,
IN
A
R
= R
IMIN
= 80kΩ, V
= 3.7V, Unless Otherwise Noted (Continued)
BAT
IREF
28
24
20
16
12
8
4
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
STATUS PIN VOLTAGE (V)
FIGURE 15. STATUS/FAULT PIN VOLTAGE vs CURRENT WHEN THE OPEN-DRAIN MOSFET TURNS ON
FN9105.6
6
July 25, 2005
ISL6292
EN (Pin 7 for 4x4, 5x5; Pin 6 for 3x3)
EN is the enable logic input. Connect the EN pin to LOW to
disable the charger or leave it floating to enable the charger.
Pin Description
VIN (Pin 1, 15, 16 for 4x4, 5x5; Pin 1 for 3x3)
VIN is the input power source. Connect to a wall adapter.
V2P8 (Pin 8 for 4x4, 5x5; Pin 7 for 3x3)
Fault (Pin 2)
This is a 2.8V reference voltage output. This pin outputs a
2.8V voltage source when the input voltage is above POR
threshold and outputs zero otherwise. The V2P8 pin can be
used as an indication for adapter presence.
FAULT is an open-drain output indicating fault status. This
pin is pulled to LOW under any fault conditions.
Status (Pin 3)
STATUS is an open-drain output indicating charging and
inhibit states. The STATUS pin is pulled LOW when the
charger is charging a battery.
IREF (Pin 9 for 4x4, 5x5; Pin 8 for 3x3)
This is the programming input for the constant charging
current.
Time (Pin 4)
IMIN (Pin 10 for 4x4, 5x5; N/A for 3x3)
IMIN is the programmable input for the end-of-charge
current.
The TIME pin determines the oscillation period by
connecting a timing capacitor between this pin and GND.
The oscillator also provides a time reference for the charger.
TEMP (Pin 11 for 4x4, 5x5; Pin 9 for 3x3)
TEMP is the input for an external NTC thermistor. The TEMP
pin is also used for battery removal detection.
GND (Pin 5)
GND is the connection to system ground.
TOEN (Pin 6 for 4x4, 5x5; N/A for 3x3)
VBAT (Pin 12, 13, 14 for 4x4, 5x5; Pin 10 for 3x3)
TOEN is the TIMEOUT enable input pin. Pulling this pin to
LOW disables the TIMEOUT charge-time limit for the fast
charge modes. Leaving this pin HIGH or floating enables the
TIMEOUT limit.
VBAT is the connection to the battery. Typically a 10µF
Tantalum capacitor is needed for stability when there is no
battery attached. When a battery is attached, only a 0.1µF
ceramic capacitor is required.
Typical Applications
Typical Application Circuit For 4x4 or 5x5 QFN Package Options
5V Wall
Adapter
VIN
VBAT
TOEN
1µF
1µF
V2P8
1kΩ
C1
1kΩ
C2
R2
R1
Battery
Pack
ISL6292
RU
T
RT
D1
D2
TEMP
IREF
IMIN
FAULT
STATUS
EN
RIREF
80kΩ
R IMIN
80kΩ
V2P8
TIME
GND
1µF
C3
CTIME
15nF
FN9105.6
7
July 25, 2005
ISL6292
Typical Applications (Continued)
Typical Application Circuit For 3x3 DFN Package Option
VBA
T
5V Wall
Adapter
VIN
1µF
1µF
C2
C1
1kΩ
1kΩ
Battery
Pac
k
R1
R2
ISL6292
(3X3 DFN)
T
RT
D1
D2
TEMP
FAULT
RU
STATUS
V2P8
IREF
EN
1µF
TIME
GND
RIREF C3
80kΩ
CTIME
15nF
QMAIN
VIN
VBAT
C1
References
V2P8
Temperature
Monitoring
QSEN
100000:1
Current
Mirror
IT
VIN
VBAT
ISEN
Input_OK
+
-
VPOR
+
+
-
IREF
RIREF
+
CA
IR
100mV
-
CHRG
Current
References
+
IMIN
VA
IMIN
-
VCH
RIMIN
+
-
Trickle/Fast
MIN_I
Minbat
VMIN
ISEN
+
-
VRECHRG
+
-
Recharge
STATUS
V2P8
STATUS
FAULT
Under Temp
Over Temp
LOGIC
NTC
TEMP
Interface
Batt Removal
FAULT
TOEN
TIME
GND
OSC
COUNTER
Input_OK
EN
NOTE: For the 3x3 DFN package, the TOEN pin is left floating and the IMIN pin is connected to the V2P8 pin internally.
FIGURE 16. BLOCK PROGRAM
FN9105.6
8
July 25, 2005
ISL6292
disabled as needed by the TOEN pin. The trickle mode is
Theory of Operation
limited to 1/8 of TIMEOUT and cannot be disabled by the
The ISL6292 is an integrated charger for single-cell Li-ion or
Li-polymer batteries. The ISL6292 functions as a traditional
linear charger when powered with a voltage-source adapter.
When powered with a current-limited adapter, the charger
minimizes the thermal dissipation commonly seen in
traditional linear chargers.
TOEN pin.
The charger automatically re-charges the battery when the
battery voltage drops below a recharge threshold. When the
wall adapter is not present, the ISL6292 draws less than 1µA
current from the battery.
As a linear charger, the ISL6292 charges a battery in the
popular constant current (CC) and constant voltage (CV)
Three indication pins are available from the charger to
indicate the charge status. The V2P8 outputs a 2.8V dc
voltage when the input voltage is above the power-on reset
(POR) level and can be used as the power-present
profile. The constant charge current I
is programmable
REF
up to 2A (1.5A for the 3x3 DFN package) with an external
resistor or a logic input. The charge voltage V has 1%
indication. This pin is capable of sourcing a 2mA current, so
it can also be used to bias external circuits. The STATUS pin
is an open-drain logic output that turns LOW at the beginning
of a charge cycle until the end-of-charge (EOC) condition is
qualified. The EOC condition is: the battery voltage rises
above the recharge threshold and the charge current falls
below a user-programmable EOC current threshold. Once
the EOC condition is qualified, the STATUS output rises to
HIGH and is latched. The latch is released at the beginning
of a charge or re-charge cycle. The open-drain FAULT pin
turns low when any fault conditions occur. The fault
conditions include the external battery temperature fault, a
charge time fault, or the battery removal.
CH
accuracy over the entire recommended operating condition
range. The charger always preconditions the battery with
10% of the programmed current at the beginning of a charge
cycle, until the battery voltage is verified to be above the
minimum fast charge voltage, V
. This low-current
MIN
preconditioning charge mode is named trickle mode. The
verification takes 15 cycles of an internal oscillator whose
period is programmable with the timing capacitor. A thermal-
foldback feature removes the thermal concern typically seen
in linear chargers. The charger reduces the charge current
automatically as the IC internal temperature rises above
100°C to prevent further temperature rise. The thermal-
foldback feature guarantees safe operation when the printed
circuit board (PCB) is space limited for thermal dissipation.
Figure 17 shows the typical charge curves in a traditional
linear charger powered with a constant-voltage adapter.
From the top to bottom, the curves represent the constant
input voltage, the battery voltage, the charge current and the
A TEMP pin monitors the battery temperature to ensure a
safe charging temperature range. The temperature range is
programmable with an external negative temperature
coefficient (NTC) thermistor. The TEMP pin is also used to
detect the removal of the battery.
power dissipation in the charger. The power dissipation P
is given by the following equations:
CH
P
= (V -V
) ⋅ I
(EQ. 1)
CH
IN BAT CHARGE
The charger offers a safety timer for setting the fast charge
time (TIMEOUT) limit to prevent charging a dead battery for
an extensively long time. The TIMEOUT limit can be
where I
is the charge current. The maximum power
dissipation occurs during the beginning of the CC mode. The
CHARGE
Trickle
Mode
Constant Current
Mode
Constant Voltage
Mode
Inhibit
Trickle
Mode
Constant Current
Mode
Constant Voltage
Mode
Inhibit
Input Voltage
VIN
VCH
VIN
VCH
Input Voltage
Battery Voltage
Battery Voltage
VMIN
VMIN
IREF
ILIM
IREF
Charge Current
Charge Current
IREF/10
IREF/10
P1
P2
P3
P1
P2
Power Dissipation
Power Dissipation
TIMEOUT
TIMEOUT
FIGURE 18. TYPICAL CHARGE CURVES USING A CURRENT-
LIMITED ADAPTER
FIGURE 17. TYPICAL CHARGE CURVES USING A
CONSTANT-VOLTAGE ADAPTER
FN9105.6
9
July 25, 2005
ISL6292
maximum power the IC is capable of dissipating is
dependent on the thermal impedance of the printed-circuit
board (PCB). Figure 17 shows, with dotted lines, two cases
that the charge currents are limited by the maximum power
dissipation capability due to the thermal foldback.
Applications Information
Power on Reset (POR)
The ISL6292 resets itself as the input voltage rises above
the POR rising threshold. The V2P8 pin outputs a 2.8V
voltage, the internal oscillator starts to oscillate, the internal
timer is reset, and the charger begins to charge the battery.
The two indication pins, STATUS and FAULT, indicate a
LOW and a HIGH logic signal respectively. Figure 19
When using a current-limited adapter, the thermal situation
in the ISL6292 is totally different. Figure 18 shows the typical
charge curves when a current-limited adapter is employed.
The operation requires the I
to be programmed higher
REF
of the adapter, as shown in
illustrates the start up of the charger between t to t .
0
2
than the limited current I
LIM
The ISL6292 has a typical rising POR threshold of 3.4V and
a falling POR threshold of 2.4V. The 2.4V falling threshold
guarantees charger operation with a current-limited adapter
to minimize the thermal dissipation.
Figure 18. The key difference of the charger operating under
such conditions occurs during the CC mode.
The Block Diagram, Figure 16, aids in understanding the
operation. The current loop consists of the current amplifier
Charge Cycle
CA and the sense MOSFET Q
. The current reference I
SEN
R
is programmed by the IREF pin. The current amplifier CA
regulates the gate of the sense MOSFET Q so that the
A charge cycle consists of three charge modes: trickle mode,
constant current (CC) mode, and constant voltage (CV)
mode. The charge cycle always starts with the trickle mode
SEN
matches the reference current I . The
sensed current I
SEN
main MOSFET Q
R
SEN
and the sense MOSFET Q
form a
until the battery voltage stays above V
(2.8V typical) for
MAIN
MIN
15 consecutive cycles of the internal oscillator. If the battery
voltage drops below V during the 15 cycles, the 15-cycle
current mirror with a ratio of 100,000:1, that is, the output
charge current is 100,000 times I . In the CC mode, the
R
MIN
current loop tries to increase the charge current by
counter is reset and the charger stays in the trickle mode.
The charger moves to the CC mode after verifying the
battery voltage. As the battery-pack terminal voltage rises to
enhancing the sense MOSFET Q
, so that the sensed
SEN
current matches the reference current. On the other hand,
the adapter current is limited, the actual output current will
never meet what is required by the current reference. As a
result, the current error amplifier CA keeps enhancing the
the final charge voltage V , the CV mode begins. The
CH
terminal voltage is regulated at the constant V
in the CV
CH
mode and the charge current is expected to decline. After
the charge current drops below I (programmable for the
Q
as well as the main MOSFET Q , until they are
SEN
MAIN
MIN
4x4 and 5X5 package and programmed to 1/10 of I
fully turned on. Therefore, the main MOSFET becomes a
power switch instead of a linear regulation device. The
power dissipation in the CC mode becomes:
for
REF
the 3x3 package, see End-of-Charge Current for more
detail), the ISL6292 indicates the end-of-charge (EOC) with
the STATUS pin. The charging actually does not terminate
until the internal timer completes its length of TIMEOUT in
order to bring the battery to its full capacity. Signals in a
2
P
= R
⋅ I
CH
DS(ON) CHARGE
(EQ. 2)
where r
is the resistance when the main MOSFET is
DS(ON)
charge cycle are illustrated in Figure 19 between points t to
2
fully turned on. This power is typically much less than the
peak power in the traditional linear mode.
t .
5
The worst power dissipation when using a current-limited
adapter typically occurs at the beginning of the CV mode, as
shown in Figure 18. The equation EQ. 1 applies during the
CV mode. When using a very small PCB whose thermal
impedance is relatively large, it is possible that the internal
temperature can still reach the thermal foldback threshold. In
that case, the IC is thermally protected by lowering the
charge current, as shown with the dotted lines in the charge
current and power curves. Appropriate design of the adapter
can further reduce the peak power dissipation of the
ISL6292. See the Application Information section for more
information.
VIN
POR Threshold
Charge Cycle
V2P8
Charge Cycle
STATUS
FAULT
VBAT
15 Cycles to
1/8 TIMEOUT
VRECHRG
2.8V VMIN
15 Cycles
Figure 19 illustrates the typical signal waveforms for the
linear charger from the power-up to a recharge cycle. More
detailed Applications Information is given below.
IMIN
ICHARGE
t8
t0 t1 t2 t3
t4
t5
t6 t7
FIGURE 19. OPERATION WAVEFORMS
FN9105.6
10
July 25, 2005
ISL6292
The following events initiate a new charge cycle:
• POR,
Disabling TIMEOUT Limit
The TIMEOUT limit for the fast charge modes can be
disabled by pulling the TOEN pin to LOW or shorting it to
GND. When this happens, the charger becomes a current-
limited LDO (low-dropout) supply with its voltage regulated at
• a new battery being inserted (detected by TEMP pin),
• the battery voltage drops below a recharge threshold after
completing a charge cycle,
the final charge voltage V
and the current limit determined
CH
by the IREF pin. If the LDO load current drops below the
end-of-charge current (refer to End-of-Charge section), the
STATUS pin will indicate.
• recovery from an battery over-temperature fault,
• or, the EN pin is toggled from GND to floating.
Further description of these events are given later in this
data sheet.
The trickle charge time limit, however, is not disabled even
when the TOEN pin is pulled to LOW. The charger operates
in the trickle mode at the beginning of a charge cycle even if
the TIMEOUT is disabled. Leaving the TOEN pin floating is
recommended to enable the TIMEOUT. Driving the TOEN
pin above 3.0V is not recommended.
Recharge
After a charge cycle completes, charging is prohibited until
the battery voltage drops to a recharge threshold, V
RECHRG
(see Electrical Specifications). Then a new charge cycle
starts at point t and ends at point t , as shown in Figure 19.
Charge Current Programming
The charge current is programmed by the IREF pin. There
are three ways to program the charge current:
6
8
The safety timer is reset at t .
6
Internal Oscillator
The internal oscillator establishes a timing reference. The
oscillation period is programmable with an external timing
1. driving the IREF pin above 1.3V
2. driving the IREF pin below 0.4V,
capacitor, C
, as shown in Typical Applications. The
TIME
3. or using the R
as shown in the Typical Applications.
IREF
oscillator charges the timing capacitor to 1.5V and then
The voltage of IREF is regulated to a 0.8V reference voltage
when not driven by any external source. The charging
current during the constant current mode is 100,000 times
discharges it to 0.5V in one period, both with 10µA current.
The period T
is:
OSC
that of the current in the R
resistor. Hence, depending
on how IREF pin is used, the charge current is,
6
IREF
T
= 0.2 ⋅ 10 ⋅ C
(seconds)
(EQ. 3)
OSC
TIME
A 1nF capacitor results in a 0.2ms oscillation period. The
accuracy of the period is mainly dependent on the accuracy
of the capacitance and the internal current source.
V
R
V
> 1.3V
IREF
IREF
IREF
500mA
0.8V
IREF
5
-----------------
I
=
× 10 (A)
(EQ. 5)
REF
R
100mA
Total Charge Time
< 0.4V
The total charge time for the CC mode and CV mode is
limited to a length of TIMEOUT. A 22-stage binary counter
increments each oscillation period of the internal oscillator to
set the TIMEOUT. The TIMEOUT can be calculated as:
The 500mA current is a guaranteed maximum value for
high-power USB port, with the typical value of 450mA. The
100mA current is also a guaranteed maximum value for the
low-power USB port. This design accommodates the USB
power specification.
The internal reference voltage at the IREF pin is capable of
sourcing less than 100µA current. When pulling down the
IREF pin with a logic circuit, the logic circuit needs to be able
to sink at least 100µA current.
C
1nF
22
TIME
-----------------
TIMEOUT = 2 ⋅ T
= 14 ⋅
(minutes)
(EQ. 4)
OSC
A 1nF capacitor leads to 14 minutes of TIMEOUT. For
example, a 15nF capacitor sets the TIMEOUT to be 3.5
hours. The charger has to reach the end-of-charge condition
before the TIMEOUT, otherwise, a TIMEOUT fault is issued.
The TIMEOUT fault latches up the charger. There are two
ways to release such a latch-up: either to recycle the input
power, or toggle the EN pin to disable the charger and then
enable it again.
When the adapter is current limited, it is recommended that
the reference current be programmed to at least 30% higher
than the adapter current limit (which equals the charge
current). In addition, the charge current should be at least
350mA so that the voltage difference between the VIN and
the VBAT pins is higher than 100mV. The 100mV is the
offset voltage of the input-output voltage comparator shown
in the block diagram.
The trickle mode charge has a time limit of 1/8 TIMEOUT. If
the battery voltage does not reach V
within this limit, a
MIN
TIMEOUT fault is issued and the charger latches up. The
charger stays in trickle mode for at least 15 cycles of the
internal oscillator and, at most, 1/8 of TIMEOUT, as shown in
Figure 19.
FN9105.6
11
July 25, 2005
ISL6292
charge unless the battery voltage is already above the
End-of-Charge (EOC) Current
The end-of-charge current I sets the level at which the
charger starts to indicate the end of the charge with the
STATUS pin, as shown in Figure 19. The charger actually
does not terminate charging until the end of the TIMEOUT,
recharge threshold.
MIN
2.8V Bias Voltage
The ISL6292 provides a 2.8V voltage for biasing the internal
control and logic circuit. This voltage is also available for
external circuits such as the NTC thermistor circuit. The
maximum allowed external load is 2mA.
as described in the Total Charge Time section. The I
set in two ways, by connecting a resistor between the IMIN
pin and ground, or by connecting the IMIN pin to the V2P8
is
MIN
pin. When programming with the resistor, the I
the equation below.
is set in
NTC Thermistor
The ISL6292 uses two comparators (CP2 and CP3) to form a
window comparator, as shown in Figure 22. When the TEMP
MIN
V
4
0.8V
REF
×10
(A)
(EQ. 6)
---------------- ----------------
I
= 10000 ⋅
=
MIN
pin voltage is “out of the window,” determined by the V
R
R
IMIN
TMIN
IMIN
and V
, the ISL6292 stops charging and indicates a fault
TMAX
condition. When the temperature returns to the set range, the
charger re-starts a charge cycle. The two MOSFETs, Q1 and
Q2, produce hysteresis for both upper and lower thresholds.
The temperature window is shown in Figure 21.
where R
IMIN
is the resistor connected between the IMIN pin
and the ground. When connected to the V2P8 pin, the I
MIN
is set to 1/10 of I
GND. Under this exception, I
the 3X3 DFN package, the IMIN pin is bonded internally to
V2P8.
, except when the IREF pin is shorted to
REF
is 5mA. For the ISL6292 in
MIN
2.8V
Charge Current Thermal Foldback
Over-heating is always a concern in a linear charger. The
maximum power dissipation usually occurs at the beginning
of a charge cycle when the battery voltage is at its minimum
but the charge current is at its maximum. The charge current
thermal foldback function in the ISL6292 frees users from
the over-heating concern.
VTMIN (1.4V)
VTMIN- (1.2V)
TEMP
Pin
Voltage
VTMAX+ (0.406V)
VTMAX (0.35V)
Figure 20 shows the current signals at the summing node of
the current error amplifier CA in the Block Diagram. I is the
0V
R
reference. I is the current from the Temperature Monitoring
T
Under
Temp
block. The I has no impact on the charge current until the
T
internal temperature reaches approximately 100°C; then I
T
Over
Temp
rises at a rate of 1µA/°C. When I rises, the current control
T
loop forces the sensed current I
SEN
to reduce at the same
FIGURE 21. CRITICAL VOLTAGE LEVELS FOR TEMP PIN
rate. As a mirrored current, the charge current is 100,000
times that of the sensed current and reduces at a rate of
100mA/°C. For a charger with the constant charge current
set at 1A, the charge current is reduced to zero when the
internal temperature rises to 110°C. The actual charge
current settles between 100°C to 110°C.
2.8V
V2P8
ISL6292
R1
40K
V
Battery
Removal
RMV
CP1
-
IR
R2
+
R
U
60K
V
Under
Temp
TMIN
CP2
-
R3
IT
+
75K
To TEMP Pin
TEMP
Q1
ISEN
Over
Temp
CP3
R4
R
T
-
25K
V
TMAX
+
100OC
Temperature
Q2
R5
4K
GND
FIGURE 20. CURRENT SIGNALS AT THE AMPLIFIER CA INPUT
Usually the charge current should not drop below I
because of the thermal foldback. For some extreme cases if
that does happen, the charger does not indicate end-of-
MIN
FIGURE 22. THE INTERNAL AND EXTERNAL CIRCUIT FOR
THE NTC INTERFACE
FN9105.6
July 25, 2005
12
ISL6292
As the TEMP pin voltage rises from low and exceeds the
The temperature hysteresis can be estimated. At the low
temperature, the hysteresis is approximately,
1.4V threshold, the under temperature signal rises and does
not clear until the TEMP pin voltage falls below the 1.2V
falling threshold. Similarly, the over-temperature signal is
given when the TEMP pin voltage falls below the 0.35V
threshold and does not clear until the voltage rises above
0.406V. The actual accuracy of the 2.8V is not important
because all the thresholds and the TEMP pin voltage are
ratios determined by the resistor dividers, as shown in
Figure 22.
1.4V-1.2V
o
-------------------------------
(EQ. 11)
T
≈
≈ 3
( C)
hysLOW
1.4V ⋅ 0.051
where 0.051 is the NTC at 3°C. Similarly, the high
temperature hysteresis is,
0.406V-0.35V
o
-------------------------------------
T
≈
≈ 4
( C)
hysHIGH
0.35V ⋅ 0.039
(EQ. 12)
where the 0.039 is the NTC at 47°C.
The NTC thermistor is required to have a resistance ratio of
7:1 at the low and the high temperature limits, that is,
For applications that do not need to monitor the battery
temperature, the NTC thermistor can be replaced with a
R
R
COLD
(EQ. 7)
-------------------
= 7
regular resistor of a half value of the pull up resistor R .
U
HOT
Another option is to connect the TEMP pin to the IREF pin
that has a 0.8V output. With such connection, the IREF pin
can no longer be programmed with logic inputs.
This is because at the low temperature limit, the TEMP pin
voltage is 1.4V, which is 1/2 of the 2.8V bias. Thus,
Battery Removal Detection
R
= R
U
(EQ. 8)
COLD
The ISL6292 assumes that the thermistor is co-packed with
the battery and is removed together with the battery. When
the charger senses a TEMP pin voltage that is 2.1V or
higher, it assumes that the battery is removed. The battery
removal detection circuit is also shown in Figure 22. When a
battery is removed, a FAULT signal is indicated and charging
is halted. When a battery is inserted again, a new charge
cycle starts.
where R is the pull-up resistor as shown in Figure 22. On
U
the other hand, at the high temperature limit the TEMP pin
voltage is 0.35V, 1/8 of the 2.8V bias. Therefore,
R
7
U
(EQ. 9)
-------
R
=
HOT
Various NTC thermistors are available for this application.
Table 1 shows the resistance ratio and the negative
temperature coefficient of the curve-1 NTC thermistor from
Vishay (http://www.vishay.com) at various temperatures. The
resistance at 3°C is approximately seven times the
resistance at 47°C, that is:
Indications
The ISL6292 has three indications: the input presence, the
charge status, and the fault indication. The input presence is
indicated by the V2P8 pin while the other two indications are
presented by the STATUS pin and FAULT pin respectively.
Figure 23 shows the V2P8 pin voltage vs. the input voltage.
Table 2 summarizes the other two pins.
R
o
3 C
-----------------
= 7
(EQ. 10)
R
o
47 C
Therefore, if 3°C is the low temperature limit, then the high
temperature limit is approximately 47°C. The pull-up resistor
U
3.4V
R
can choose the same value as the resistance at 3°C.
2.4V
TABLE 1. RESISTANCE RATIO OF VISHAY’S CURVE-1 NTC
TEMPERATURE (°C)
R /R
25°C
NTC (%/°C)
T
2.8V
VIN
0
3
3.266
5.1
5.1
5.0
4.4
4.0
3.9
3.9
2.806
2.540
5
V2P8
25
45
47
50
1.000
0.4368
0.4041
0.3602
FIGURE 23. THE V2P8 PIN OUTPUT vs THE INPUT VOLTAGE
AT THE VIN PIN. VERTICAL: 1V/DIV,
HORIZONTAL: 100ms/DIV.
FN9105.6
13
July 25, 2005
ISL6292
current-voltage characteristics curve, such as point A, to
higher voltage until reaching the breaking point B, as shown
in Figure 24.
Shutdown
The ISL6292 can be shutdown by pulling the EN pin to
ground. When shut down, the charger draws typically less
than 30µA current from the input power and the 2.8V output
at the V2P8 pin is also turned off. The EN pin needs be
driven with an open-drain or open-collector logic output, so
that the EN pin is floating when the charger is enabled.
The adapter is equivalent to a voltage source with output
resistance when running in the constant-voltage region;
because of this characteristic. As the charge current drops,
the adapter output moves from point B to point C, shown in
Figure 24.
TABLE 2. STATUS INDICATIONS
The battery pack can be approximated as an ideal cell with a
lumped-sum resistance in series, also shown in Figure 24.
The ISL6292 charger sits between the adapter and the
battery.
FAULT STATUS
INDICATION
High
High
Charge completed with no fault (Inhibit) or
Standby
High
Low
Low
Charging in one of the three modes
Fault
C
High
VNL
VFL
rO =(VNL - VFL)/ILIM
*Both outputs are pulled up with external resistors.
B
VPACK
RPACK
Input and Output Capacitor Selection
rO
Typically any type of capacitors can be used for the input
and the output. Use of a 0.47µF or higher value ceramic
capacitor for the input is recommended. When the battery is
attached to the charger, the output capacitor can be any
ceramic type with the value higher than 0.1µF. However, if
there is a chance the charger will be used as an LDO linear
regulator, a 10µF tantalum capacitor is recommended.
ILIM
VNL
VCELL
A
ILIM
FIGURE 24. THE IDEAL I-V CHARACTERISTICS OF A
CURRENT LIMITED ADAPTER
Current-Limited Adapter
Figure 24 shows the ideal current-voltage characteristics of
Working with Current-Limited Adapter
a current-limited adapter. V is the no-load adapter output
NL
voltage and V is the full load voltage at the current limit
FL
As described earlier, the ISL6292 minimizes the thermal
dissipation when running off a current-limited ac adapter, as
shown in Figure 18. The thermal dissipation can be further
reduced when the adapter is properly designed. The
following demonstrates that the thermal dissipation can be
minimized if the adapter output reaches the full-load output
voltage (point B in Figure 24) before the battery pack voltage
reaches the final charge voltage (4.1V or 4.2V). The
assumptions for the following discussion are: the adapter
current limit = 750mA, the battery pack equivalent
resistance = 200mΩ, and the charger ON resistance is
350mΩ.
I
. Before its output current reaches the limit I
, the
LIM
LIM
adapter presents the characteristics of a voltage source. The
slope r represents the output resistance of the voltage
O
supply. For a well regulated supply, the output resistance
can be very small, but some adapters naturally have a
certain amount of output resistance.
The adapter is equivalent to a current source when running
in the constant-current region. Being a current source, its
output voltage is dependent on the load, which, in this case,
is the charger and the battery. As the battery is being
charged, the adapter output rises from a lower voltage in the
Adapter
Adapter
rO
Adapter
rO
Charger
RDS(ON)
Charger
RDS(ON)
Charger
VADAPTER
VPACK
VADAPTER
VPACK
VADAPTER
VPACK
4.2V DC
Output
ILIM
VNL
VNL
I
I
I
RPACK
RPACK
RPACK
Battery
Pack
VCELL
VCELL
Battery
Pack
VCELL
Battery
Pack
(B) THE EQUIVALENT CIRCUIT IN THE
RESISTANCE-LIMIT REGION
(C) THE EQUIVALENT CIRCUIT WHEN THE
PACK VOLTAGE REACHES THE FINAL
CHARGE VOLTAGE
(A) THE EQUIVALENT CIRCUIT IN THE
CONSTANT CURRENT REGION
FIGURE 25. THE EQUIVALENT CIRCUIT OF THE CHARGING SYSTEM WORKING WITH CURRENT LIMITED ADAPTERS
FN9105.6
July 25, 2005
14
ISL6292
When charging in the constant-current region, the pass
element in the charger is fully turned on. The charger is
equivalent to the on-resistance of the internal P-channel
MOSFET. The entire charging system is equivalent to the
circuit shown in Figure 25 (A). The charge current is the
is shown in Figure 25(B). Eventually, the battery pack voltage
will reach 4.2V (or 4.1V) because the adapter no-load voltage is
higher than 4.2V (or 4.1V), then Figure 25(C) becomes the
equivalent circuit until charging ends. In this case, the worst-
case thermal dissipation also occurs in the constant-current
charge mode. Figure 26 (B) shows the I-V curves of the
adapter output, the battery pack voltage and the cell voltage for
constant current limit I
, and the adapter output voltage
LIM
can be easily found out as,
the case V = 4V. In the case, the full-load voltage is lower
FL
V
= I
⋅ R
+ V
DS(ON) PACK
(EQ. 13)
Adapter
LIM
than the final charge voltage (4.2V), but the charger is still able
to fully charge the battery as long as the no-load voltage is
above 4.2V. Figure 27 (B) illustrates the adapter voltage,
battery pack voltage, the charge current and the power
dissipation in the charger respectively in the time domain.
where V
is the battery pack voltage. The power
PACK
dissipation in the charger is given in EQ. 2, where I
CHARGE
= I
.
LIM
Based on the above discussion, the worst-case power
dissipation occurs during the constant-current charge mode
if the adapter full-load voltage is lower than the critical
voltage given in EQ. 14. Even if that is not true, the power
dissipation is still much less than the power dissipation in the
traditional linear charger. Figure 28 and 29 are scope-
captured waveforms to demonstrate the operation with a
current-limited adapter.
A critical condition of the adapter design is that the adapter
output reaches point B in Figure 24 at the same time as the
battery pack voltage reaches the final charge voltage (4.1V
or 4.2V), that is:
V
= I
⋅ R
+ V
DS(ON) CH
(EQ. 14)
Critical
LIM
For example, if the final charge voltage is 4.2V, the r
is 350mΩ, and the current limit I
DS(ON)
The waveforms in Figure 28 are the adapter output voltage
(1V/div), the battery voltage (1V/div), and the charge current
(200mA/div) respectively. The time scale is 1ks/div. The
adapter current is limited to 600mA and the charge current is
programmed to 1A. Note that the voltage difference is only
approximately 200mV and the adapter voltage tracks the
battery voltage in the CC mode. Figure 28 also shows the
resistance-limit mode before entering the CV mode.
is 750mA, the critical
LIM
adapter full-load voltage is 4.4625V.
When the above condition is true, the charger enters the
constant-voltage mode simultaneously as the adapter exits
the current-limit mode. The equivalent charging system is
shown in Figure 25 (C). Since the charge current drops at a
higher rate in the constant-voltage mode than the increase
rate of the adapter voltage, the power dissipation decreases
as the charge current decreases. Therefore, the worst case
thermal dissipation occurs in the constant-current charge
mode. Figure 26 (A) shows the I-V curves of the adapter
output, the battery pack voltage and the cell voltage during
the charge. The 5.9V no-load voltage is just an example
value higher than the full-load voltage. The cell voltage
4.05V uses the assumption that the pack resistance is
200mΩ. Figure 27 (A) illustrates the adapter voltage, battery
pack voltage, the charge current and the power dissipation in
the charger respectively in the time domain.
5.9V
4.2V
VADAPTER
4.4625V
4.2V
VPACK
VCELL
(A)
(B)
4.05V
0.75A
VPACK
If the battery pack voltage reaches 4.2V (or 4.1V) before the
adapter reaches point B in Figure 24, a voltage step is
expected at the adapter output when the pack voltage
reaches the final charge voltage. As a result, the charger
power dissipation is also expected to have a step rise. This
case is shown in Figure 18 as well as Figure 27 (C). Under
this condition, the worst case thermal dissipation in the
charger happens when the charger enters the constant
voltage mode.
VNL
VADAPTER
4.2V
4.2V
4.0V
3.775V
VCELL
3.625V
0.55A
0.75A
If the adapter voltage reaches the full-load voltage before the
pack voltage reaches 4.2V (or 4.1V), the charger will
experience the resistance-limit situation. In this situation, the
ON resistance of the charger is in series with the adapter output
resistance. The equivalent circuit for the resistance-limit region
FIGURE 26. THE I-V CHARACTERISTICS OF THE CHARGER
WITH DIFFERENT CURRENT LIMITED
ADAPTERS
FN9105.6
15
July 25, 2005
ISL6292
VIN
VIN
VIN
VPACK
VPACK
VPACK
Charge
Current
Charge
Current
Charge
Current
Power
Power
Power
TIME
TIME
TIME
Res
Const. Cur
Constant Voltage
Const. Cur
Const. Cur
Constant Voltage
Constant Voltage
Limit
(C)
(A)
(B)
FIGURE 27. THE OPERATING CURVES WITH THREE DIFFERENT CURRENT LIMITED ADAPTERS
Figure 29 shows the actual captured waveforms depicted in
Figure 27 (C). The constant charge current is 750mA. A step
in the adapter voltage during the transition from CC mode to
CV mode is demonstrated.
IREF Programming Using Current-Limited Adapter
The ISL6292 has 10% tolerance for the charge current.
Typically the current-limited adapter also has 10% tolerance.
In order to guarantee proper operation, it is recommended
that the nominal charge current be programmed at least
30% higher than the nominal current limit of the adapter.
CV Mode
Board Layout Recommendations
CC Mode
The ISL6292 internal thermal foldback function limits the
charge current when the internal temperature reaches
approximately 100°C. In order to maximize the current
capability, it is very important that the exposed pad under the
package is properly soldered to the board and is connected
to other layers through thermal vias. More thermal vias and
more copper attached to the exposed pad usually result in
better thermal performance. On the other hand, the number
of vias is limited by the size of the pad. The exposed pads for
the 5x5 and 4x4 QFN packages are able to have 9 and 5
vias respectively. The 3x3 DFN package allows 8 vias be
placed in two rows. Since the pins on the 3x3 DFN package
are on only two sides, as much top layer copper as possible
should be connected to the exposed pad to minimize the
thermal impedance. Refer to the ISL6292 evaluation boards
for layout examples.
Resistance Limit Mode
FIGURE 28. SCOPE CAPTURED WAVEFORMS SHOWING THE
THREE MODES
1 hour
FIGURE 29. SCOPE CAPTURED WAVEFORMS SHOWING THE
CASE THAT THE FULL-LOAD ADAPTER
VOLTAGE IS HIGHER THAN THE CRITICAL
VOLTAGE
FN9105.6
16
July 25, 2005
ISL6292
Dual Flat No-Lead Plastic Package (DFN)
2X
L10.3x3
0.15
C A
2X
10 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE
D
A
MILLIMETERS
0.15 C
B
SYMBOL
MIN
0.80
NOMINAL
0.90
MAX
1.00
NOTES
A
A1
A3
b
-
-
0.18
1.95
1.55
-
0.05
-
E
0.20 REF
0.23
-
6
0.28
2.05
1.65
5,8
INDEX
AREA
D
3.00 BSC
2.00
-
D2
E
7,8
TOP VIEW
SIDE VIEW
B
A
3.00 BSC
1.60
-
E2
e
7,8
0.10 C
0.08 C
0.50 BSC
-
-
k
0.25
0.30
-
-
L
0.35
0.40
8
C
A3
SEATING
PLANE
N
10
2
Nd
5
3
7
8
Rev. 3 6/04
D2
NOTES:
(DATUM B)
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
D2/2
1
2
6
INDEX
AREA
k
NX
E2
4. All dimensions are in millimeters. Angles are in degrees.
(DATUM A)
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
E2/2
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
NX L
8
N
N-1
e
7. Dimensions D2 and E2 are for the exposed pads which provide
NX b
improved electrical and thermal performance.
5
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
(Nd-1)Xe
0.10 M C A B
REF.
BOTTOM VIEW
C
L
0.415
NX (b)
(A1)
L
0.200
NX b
NX L
5
e
SECTION "C-C"
TERMINAL TIP
C C
C
FOR ODD TERMINAL/SIDE
FN9105.6
17
July 25, 2005
ISL6292
Quad Flat No-Lead Plas tic Package (QFN)
Micro Lead Frame Plas tic Package (MLFP)
L16.4x4
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220-VGGC ISSUE C)
MILLIMETERS
SYMBOL
MIN
0.80
NOMINAL
MAX
1.00
0.05
1.00
NOTES
A
A1
A2
A3
b
0.90
-
-
-
-
-
-
9
0.20 REF
9
0.23
1.95
1.95
0.28
0.35
2.25
2.25
5, 8
D
4.00 BSC
-
D1
D2
E
3.75 BSC
9
2.10
7, 8
4.00 BSC
-
E1
E2
e
3.75 BSC
9
2.10
7, 8
0.65 BSC
-
k
0.25
0.50
-
-
-
-
L
0.60
0.75
0.15
8
L1
N
-
16
4
4
-
10
2
Nd
Ne
P
3
3
-
-
0.60
12
9
θ
-
9
Rev. 5 5/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare provided toassistwith PCBLandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
FN9105.6
18
July 25, 2005
ISL6292
Quad Flat No-Lead Plas tic Package (QFN)
Micro Lead Frame Plas tic Package (MLFP)
L16.5x5B
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHB ISSUE C)
MILLIMETERS
SYMBOL
A
MIN
0.80
NOMINAL
MAX
1.00
0.05
1.00
NOTES
0.90
-
A1
A2
A3
b
-
-
-
-
-
9
0.20 REF
9
0.28
2.95
2.95
0.33
0.40
3.25
3.25
5, 8
D
5.00 BSC
-
D1
D2
E
4.75 BSC
9
3.10
7, 8
5.00 BSC
-
E1
E2
e
4.75 BSC
9
3.10
7, 8
0.80 BSC
-
k
0.25
0.35
-
-
-
-
L
0.60
0.75
0.15
8
L1
N
-
16
4
4
-
10
2
Nd
Ne
P
3
3
-
-
0.60
12
9
θ
-
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare provided toassistwith PCBLandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9105.6
19
July 25, 2005
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