ISL71841SEHEV1Z [INTERSIL]
Radiation Hardened 30V 32-Channel Analog;
| 型号： | ISL71841SEHEV1Z |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened 30V 32-Channel Analog |
| 文件： | 总29页 (文件大小：991K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
Radiation Hardened 30V 32-Channel Analog
Multiplexer
ISL71841SEH
Features
The ISL71841SEH is a radiation hardened, 32-channel high
ESD protected multiplexer that is fabricated using Intersil’s
proprietary P6SOI (Silicon On Insulator) process technology to
mitigate single event effects. It operates with a dual supply
voltage ranging from ±10.8V to ±16.5V. It has a 5-bit address
plus an enable pin that can be driven with adjustable logic
thresholds to conveniently select 1 of 32 available channels.
An inactive channel is separated from an active channel by a
high impedance, which inhibits any interaction between them.
• DLA SMD# 5962-15220
• Fabricated using P6SOI process technology
- Provides latch-up immunity
• ESD protection 8kV (HBM)
• Rail-to-rail operation
• Overvoltage protection
• Low rON. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <500Ω (typical)
The ISL71841SEH’s low rON allows for improved signal
integrity and reduced power losses. The ISL71841SEH is also
designed for cold sparing making it excellent for high reliability
applications that have redundancy requirements. It is
designed to provide a high impedance to the analog source in
a powered off condition, making it easy to add additional
backup devices without loading signal sources. The
ISL71841SEH also incorporates input analog overvoltage
protection, which will disable the switch to protect downstream
devices.
• Flexible split rail operation
- Positive supply above GND (V+) . . . . . . . +10.8V to +16.5V
- Negative supply below GND (V-) . . . . . . . . -10.8V to -16.5V
• Adjustable logic threshold control with VREF pin
• Cold sparing capable (from ground). . . . . . . . . . . . . . . . .±25V
• Analog overvoltage range (from ground). . . . . . . . . . . . .±35V
• Off switch leakage . . . . . . . . . . . . . . . . . . . 100nA (maximum)
• Transition times (tR, tF) . . . . . . . . . . . . . . . . . . . 500ns (typical)
• Break-before-make switching
The ISL71841SEH is available in a 48 Ld CQFP, 44 Ld CLCC, or
die form and operates across the extended temperature range
of -55°C to +125°C.
• Grounded metal lid (internally connected)
• Operating temperature range. . . . . . . . . . . .-55°C to +125°C
There is also a 16-channel version available offered in a 28 Ld
CDFP, please refer to the ISL71840SEH datasheet for more
information. For a list of differences please refer to Table 1 on
page 3.
• Radiation tolerance
- High dose rate (50-300rad(Si)/s). . . . . . . . . . . 100krad(Si)
- Low dose rate (0.01rad(Si)/s) . . . . 100krad(Si) (see Note)
- SEB LETTH . . . . . . . . . . . . . . . . . . . . . . . . . 86.4MeV•cm2/mg
NOTE: Product capability established by initial characterization. All
subsequent lots are assurance tested to 50krad (0.01rad(Si)/s)
wafer-by-wafer.
Related Literature
• UG037, “ISL71841SEHEV1Z Evaluation Board User Guide”
• TR007, “Single Event Effects (SEE) Testing of the
ISL71841SEH 32:1 30V Multiplexer”
• TR011, “Total Dose Testing of the ISL71841SEH 32-channel
Analog Multiplexer”
ISL71841SEH
600
IN01
IN02
IN03
500
+125°C
+25°C
400
300
200
100
0
OUT
ADC
.
.
.
IN32
-55°C
5
-20
-15
-10 -5.0
0
5.0
10
15
20
ADDRESS
SWITCH INPUT VOLTAGE (V)
EN
FIGURE 2. rDS(ON) vs POWER SUPPLY ACROSS SWITCH INPUT
COMMON-MODE VOLTAGE AT +25°C
FIGURE 1. TYPICAL APPLICATION
June 3, 2016
FN8735.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015, 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL71841SEH
Table of Contents
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Specifications (±15V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Specifications (±12V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Post High Dose Rate Radiation Characteristics (V± = ±15V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Post High Dose Rate Radiation Characteristics (V± = ±12V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Post Low Dose Rate Radiation Characteristics (V± = ±15V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Post Low Dose Rate Radiation Characteristics (V± = ±12V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Power-Up Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
VREF and Logic Functionality. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
ISL71841SEH vs ISL71840SEH. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Interface Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Assembly Related Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Weight of Packaged Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Lid Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Metalization Mask Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
R48.A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Ceramic Leadless Chip Carrier Packages (CLCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
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ISL71841SEH
Ordering Information
ORDERING NUMBER
TEMP RANGE
(°C)
PKG.
DWG. #
(Note 3)
PART NUMBER
ISL71841SEHVF (Note 1)
PACKAGE
5962R1522001VXC
-55 to +125
48 LD CQFP (RoHS Compliant) R48.A
48 LD CQFP (RoHS Compliant) R48.A
N/A
ISL71841SEHF/PROTO (Note 1)
ISL71841SEHVL (Note 2)
ISL71841SEHL/PROTO (Note 2)
ISL71841SEHVX
-55 to +125
-55 to +125
5962R1522001VYA
44 LD CLCC
J44.A
J44.A
N/A
-55 to +125
44 LD CLCC
5962R1522001V9A
-55 to +125
DIE (RoHS Compliant)
DIE (RoHS Compliant)
N/A
ISL71841SEHX/SAMPLE
ISL71841SEHEV1Z
-55 to +125
N/A
Evaluation Board
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. These Intersil Hermetic Packaged products are intended for SnPb soldering and may be shipped with terminations precoated with SnPb solder
compatible with SnPb soldering operations only.
3. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed must be
used when ordering.
TABLE 1. TABLE OF DIFFERENCES
SPECIFICATION
Number of Channels
ISL71840SEH
16
ISL71841SEH
32
Supply Current (I+/I-)
350µA (Maximum)
60nA (Maximum)
400µA (Maximum)
120nA (Maximum)
Output Leakage (+125°C)
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ISL71841SEH
Pin Configurations
ISL71841SEH
(48 LD CQFP)
TOP VIEW
ISL71841SEH
(44 LD CLCC)
TOP VIEW
44
43 42 41 40
6
5
4
3
2
1
7
39
38
IN11
IN27
IN26
6
5
4
3
2
1
48 47 46 45 44 43
42
IN28
IN27
IN26
IN25
IN24
IN23
IN22
IN21
IN20
IN19
IN18
IN17
7
IN12
IN11
IN10
IN9
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
IN10
IN9
8
41
40
39
38
37
36
35
34
33
32
31
8
9
37 IN25
9
10
11
12
13
14
15
IN24
36
IN8
IN7
10
11
12
13
14
15
16
17
18
IN23
IN22
IN21
IN20
IN19
IN18
IN17
35
34
33
32
31
30
29
IN6
IN5
IN4
IN3
IN2 16
IN1
19 20 21 22 23 24 25 26 27 28 29 30
17
18 19 20 21 22 23 24 25 26 27 28
Pin Descriptions
PIN NUMBER
48 LD CQFP
PIN NUMBER
44 LD CLCC
PIN NAME
DESCRIPTION
NC
OUT
V+
2, 26, 27, 47, 48
NA
1
Not connected, no internal connection
Output for multiplexer
1
19
30
18
27
Positive power supply
V-
Negative power supply
INx
3, 4, 5, 6, 7, 8, 9, 10, 11, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, Inputs for multiplexer
12, 13, 14, 15, 16, 17, 18, 13, 14, 15, 16, 17,
31, 32, 33, 34, 35, 36, 37, 29, 30, 31, 32, 33, 34, 35, 36,
38, 39, 40, 41, 42, 43, 44, 37, 38, 39, 40, 41, 42, 43, 44
45, 46
Ax
EN
21, 22, 23, 24, 25
20, 21, 22, 23, 24,
Address lines for multiplexer
Enable control for multiplexer (active low)
Reference voltage used to set logic thresholds
Ground
28
20
29
NA
25
19
26
NA
VREF
GND
LID
Package Lid is internally connected to GND (Pin 29 on CQFP, Pin 26
on CLCC)
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ISL71841SEH
Absolute Maximum Ratings
Thermal Information
Positive Supply Voltage above GND (V+) (Note 6). . . . . . . . . . . . . . . . . +20V
Negative Supply Voltage below GND (V-) (Note 6) . . . . . . . . . . . . . . . . .-20V
Maximum Supply Voltage Differential (V+ to V-) (Note 6) . . . . . . . . . . . 40V
Analog Input Voltage (INx)
Thermal Resistance (Typical)
48 Ld CQFP (Notes 4, 5) . . . . . . . . . . . . . . .
44 Ld CLCC (Notes 4, 5). . . . . . . . . . . . . . . .
JA (°C/W)
JC (°C/W)
50
31
2
3
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
From GND (Note 6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35V
Digital Input Voltage Range (EN, Ax) . . . . . . . . . . . . . . . . . . . . . . . . GND to V+
VREF to GND (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16.5V
ESD Tolerance
Human Body Model (Tested per MIL-STD-883 TM 3015) . . . . . . . . . 8kV
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . 250V
Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . . 250V
Recommended Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
Positive Supply Voltage Above GND (V+) . . . . . . . . . . . . . +10.8V to +16.5V
Negative Supply Voltage Below GND (V-). . . . . . . . . . . . . . .-10.8V to -16.5V
Supply Voltage Differential (V+ to V-) . . . . . . . . . . . . . . . . . . . . 21.6V to 33V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For JC, the “case temp” location is the center of the package underside.
6. Tested in a heavy ion environment at LET = 86.3MeV•cm2/mg at +125°C.
+
-
Electrical Specifications (±15V)
V
= 15V, V = -15V, V = 4.0V, V = 0.8V, V
= VEN = 5.0V, T = +25°C, unless otherwise noted.
REF A
AH
AL
Boldface limits apply across the operating temperature range, -55°C to +125°C or across a total ionizing dose of 300krad(Si) with exposure of a high
dose rate of 50 to 300krad(Si)/s or a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s.
MIN
MAX
SYMBOL
VS
PARAMETER
Analog Input Signal Range
Channel ON-Resistance
TEST CONDITIONS
(Note 7)
TYP
(Note 7)
UNIT
V
V-
-
-
-
V+
rON
V± = ±15.0V, ±16.5V
OUT = -1mA, VIN = +5V, -5V
500
Ω
I
V± = ±15.0V, ±16.5V
IOUT = -1mA, VIN = V+, V-
-
-
700
Ω
ΔrON
RFLAT(ON)
IS(OFF)
rON Match Between Channels
ON-Resistance Flatness
Switch Off Leakage
VIN = +5V, -5V; IOUT = -1mA
VIN = +5V, -5V
-
-
10
20
25
10
Ω
Ω
-
-
VIN = V+ - 5V, V± = ±16.5V
All unused inputs are tied to V- + 5V
-10
nA
Post radiation
-100
-10
-
-
100
10
nA
nA
VIN = V- + 5V, V± = ±16.5V
All other inputs = V+ - 5V
TA = +25°C, -55°C
TA = +125°C
Post radiation
-20
-100
-10
-
-
-
20
100
10
nA
nA
nA
IS(OFF) POWER OFF Switch Off Leakage with Device VIN = +25V, V± = VEN = VA = VREF = 0V
Powered Off
TA = +25°C, V± = 0V
TA = -55°C, +125°C
Post radiation
-10
-100
-10
-
-
-
80
100
10
nA
nA
nA
V
IN = -25V, V± = VEN = VA = VREF = 0V
TA = +25°C, V± = 0V
TA = -55°C, +125°C
Post radiation
-80
-
-
10
nA
nA
-100
100
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ISL71841SEH
+
-
Electrical Specifications (±15V)
V
= 15V, V = -15V, V = 4.0V, V = 0.8V, V
= VEN = 5.0V, T = +25°C, unless otherwise noted.
REF A
AH
AL
Boldface limits apply across the operating temperature range, -55°C to +125°C or across a total ionizing dose of 300krad(Si) with exposure of a high
dose rate of 50 to 300krad(Si)/s or a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s. (Continued)
MIN
MAX
SYMBOL
PARAMETER
TEST CONDITIONS
(Note 7)
TYP
-
(Note 7)
UNIT
nA
IS(OFF) POWER OFF Switch Off Leakage with Device VIN = +25V, VEN/VA/VREF = 0V
-10
10
Powered Off
V± = OPEN, TA = +25°C
TA = -55°C, +125°C
Post radiation
-10
-100
-10
-
-
-
80
100
10
nA
nA
nA
V
IN = -25V, VEN/VA/VREF = 0V
V± = OPEN, TA = +25°C
TA = -55°C, +125°C
Post radiation
-80
-100
-10
-
-
-
10
100
10
nA
nA
nA
IS(ON) OVERVOLT Switch On Leakage Current Into VIN = +35V, VOUT = 0V, TA = +25°C, -55°C
the Source (overvoltage)
All unused switch inputs = GND,
V± = ±16.5V
TA = +125°C
Post radiation
-80
-500
-10
-
-
-
80
500
10
nA
nA
nA
V
IN = -35V, VOUT = 0V, TA = +25°C, -55°C
All unused switch inputs = GND,
V± = ±16.5V
TA = +125°C
Post radiation
-20
-500
-10
-
-
-
20
500
10
nA
nA
nA
IS(OFF) OVERVOLT Switch Off Leakage Current Into VIN = +35V, VOUT = 0V, TA = +25°C, -55°C
the Source (overvoltage)
All unused switch inputs = GND,
V± = ±16.5V
TA = +125°C
Post radiation
-80
-750
-10
-
-
-
80
750
10
nA
nA
nA
V
IN = -35V, VOUT = 0V, TA = +25°C, -55°C
All unused switch inputs = GND,
V± = ±16.5V
TA = +125°C
Post radiation
-20
-750
-10
-
-
-
20
750
10
nA
nA
nA
ID(OFF)
Switch Off Leakage
VOUT = V+ - 5V, all inputs = V- + 5V
V± = ±16.5V, TA = +25°C, -55°C
TA = +125°C
Post radiation
0
-
-
-
120
80
nA
nA
nA
-80
-10
V
OUT = V- + 5V, all inputs = V+ - 5V
10
V± = ±16.5V, TA = +25°C, -55°C
TA = +125°C
-120
-80
-
-
-
0
nA
nA
nA
Post radiation
80
10
ID(OFF) OVERVOLT Switch Off Leakage Current Into VOUT = 0V, VIN = +35V, V± = ±16.5V
-10
the Drain (overvoltage)
All unused inputs are tied to GND
Post radiation
-500
-10
-
-
500
10
nA
nA
VOUT = 0V, VIN = -35V, V± = ±16.5V
All unused inputs are tied to GND
Post radiation
-500
-
500
nA
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ISL71841SEH
+
-
Electrical Specifications (±15V)
V
= 15V, V = -15V, V = 4.0V, V = 0.8V, V
= VEN = 5.0V, T = +25°C, unless otherwise noted.
REF A
AH
AL
Boldface limits apply across the operating temperature range, -55°C to +125°C or across a total ionizing dose of 300krad(Si) with exposure of a high
dose rate of 50 to 300krad(Si)/s or a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s. (Continued)
MIN
MAX
SYMBOL
ID(ON)
PARAMETER
TEST CONDITIONS
(Note 7)
TYP
-
(Note 7)
UNIT
nA
Switch On Leakage Current Into VIN = VOUT = V+ - 5V, TA = +25°C, -55°C
the Source/Drain
-10
10
All unused inputs = V- + 5V, V± = ±16.5V
TA = +125°C
0
-
-
-
120
100
10
nA
nA
nA
Post radiation
-100
-10
V
IN = VOUT = V- + 5V, TA = +25°C, -55°C
All unused inputs = V- + 5V, V± = ±16.5V
TA = +125°C
-120
-100
1.2
-
-
-
-
0
nA
nA
V
Post radiation
100
1.6
100
V
AH/L, VENH/L
Logic Input High/Low Voltage
Input Current with VAH, VENH
VREF = 5.0V
IAH, IENH
VA = VEN = 4.0V
V+= 16.5V, V- = -16.5V
-100
nA
I
AL, IENL
Input Current with VAL, VENL
VA = VEN = 0.8V
V+ = 16.5V, V- = -16.5V
-100
-
100
nA
I+
I-
Quiescent Supply Current
Quiescent Supply Current
Standby Supply Current
Standby Supply Current
Supply Current into VREF
VIN = VA = VEN = 0.8V, V± = ±15.0V, ±16.5V
-
-
-
-
-
-
400
µA
µA
µA
µA
µA
VIN = VA = VEN = 0.8V, V± = ±15.0V, ±16.5V
VIN = VA = VEN = 4.0V, V± = ±15.0V, ±16.5V
VIN = VA = VEN = 4.0V, V± = ±15.0V, ±16.5V
-400
-
-
400
-
I+
I-
-400
10
IREF
VREF = 5.5V, VIN = VA = VEN = 0.8V,
V± = ±15.0V, ±16.5V
35
DYNAMIC
tALH
Transition Time
Figures 4, 5
-
0.5
0.5
50
-
800
800
200
400
600
800
600
800
5
ns
ns
ns
ns
ns
ns
ns
ns
pC
dB
tAHL
Transition Time
Figures 4, 5
-
5
5
-
tBBM
Break-Before-Make Delay
Figures 8, 9 TA = -55°C, +25°C, +125°C
Post radiation
tENABLE
Enable Turn-On Time
Disable Turn-Off Time
Figures 6, 7 TA = -55°C, +25°C, +125°C
Post radiation
0.5
-
-
tDISABLE
Figures 6, 7 TA = -55°C, +25°C, +125°C
Post radiation
-
0.5
-
-
VCTE
VISO
Charge Injection
Off Isolation
CL = 100pF, VIN = 0V, (Figure 6)
VEN = 4V, RL = 1kΩ, f = 200kHz, CL = 7pF,
-
2
75
-
-
V
RMS = 3V
VCT
Crosstalk
VEN = 0.8V, RL = 1kΩ, f = 200kHz, CL = 7pF,
47
-
-
dB
V
RMS = 3V
CA
Digital Input Capacitance
Input Capacitance
f = 1MHz, V+ = V- = 0V
f = 1MHz, V+ = V- = 0V
f = 1MHz, V+ = V- = 0V
-
-
-
-
-
-
7
5
pF
pF
pF
CIN(OFF)
COUT(OFF)
Output Capacitance
50
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ISL71841SEH
+
-
Electrical Specifications (±12V)
V
= 12V, V = -12V, V = 4.0V, V = 0.8V, V
= VEN = 5.0V, T = +25°C, unless otherwise noted.
REF A
AH
AL
Boldface limits apply across the operating temperature range, -55°C to +125°C or across a total ionizing dose of 300krad(Si) with exposure of a high
dose rate of 50 to 300krad(Si)/s or a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s.
MIN
MAX
SYMBOL
VS
PARAMETER
Analog Input Signal Range
Channel ON-Resistance
TEST CONDITIONS
(Note 7)
TYP
(Note 7)
UNIT
V
V-
-
V+
rON
V± = ±10.8V, ±13.2V
OUT = -1mA, VIN = +5V, -5V
-
-
500
Ω
I
V± = ±10.8V, ±13.2V
IOUT = -1mA, VIN = V+, V-
-
700
Ω
ΔrON
rON Match Between Channels
ON-Resistance Flatness
VIN = +5V, -5V; IOUT = -1mA
VIN = +5V, -5V, V± = ±13.2V
-
-
-
10
20
25
30
Ω
Ω
Ω
RFLAT(ON)
-
-
V
IN = +5V, -5V, V± = ±10.8V,
TA = +25°C, -55°C, +125°C
V
IN = +5V, -5V, V± = ±10.8V, post radiation,
-
-
40
Ω
TA = +25°C
I+
I-
Quiescent Supply Current
Quiescent Supply Current
Standby Supply Current
Standby Supply Current
Supply Current Into VREF
V
V
V
V
IN = VA = VEN = 0.8V, V± = ±10.8V, ±13.2V
IN = VA = VEN = 0.8V, V± = ±10.8V, ±13.2V
IN = VA = VEN = 4.0V, V± = ±10.8V, ±13.2V
IN = VA = VEN = 4.0V, V± = ±10.8V, ±13.2V
-
-
-
-
-
-
400
µA
µA
µA
µA
µA
-400
-
400
-
I+
-
-400
-
I-
IREF
VREF = 5.5V, VIN = VA = VEN = 0.8V,
V± = ±10.8V, ±13.2V
35
DYNAMIC
tALH
tAHL
tBBM
Transition Time
Figures 4, 5
-
-
0.5
0.5
50
-
800
800
200
400
600
800
600
800
ns
ns
ns
ns
ns
ns
ns
ns
Transition Time
Figures 4, 5
Break-Before-Make Delay
Figures 8, 9 TA = -55°C, +25°C, +125°C
Post radiation
5
5
-
tENABLE
Enable Turn-On Time
Disable Turn-Off Time
Figures 6, 7 TA = -55°C, +25°C, +125°C
Post radiation
0.5
-
-
tDISABLE
Figures 6, 7 TA = -55°C, +25°C, +125°C
Post radiation
-
0.5
-
-
NOTE:
7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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ISL71841SEH
TABLE 2. TRUTH TABLE
A4
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A3
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EN
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
“ON”-CHANNEL
None
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NOTE: X = Don’t care, “1” = Logic High, “0” = Logic Low
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ISL71841SEH
Block Diagram
V+
IN1
A0
1
OUT
A1
A2
A3
A4
IN32
32
EN
V‐
MULTIPLEX SWITCHES
ADDRESS INPUT BUFFER
AND LEVEL SHIFTER
DECODERS
FIGURE 3. BLOCK DIAGRAM
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ISL71841SEH
Timing Diagrams
ISL71841SEH
4V
“11111”
A4
A3
A2
A1
A0
IN01
IN02-IN31
IN32
+15V, 0V
0V, +15V
ADDRESS
50%
50%
+4.0V
+0.8V
50Ω
“00000”
0.8V
15V
tAHL
tALH
+0.8V
EN
OUT
OUTPUT
0V
50%
50%
10kΩ
50pF
FIGURE 4. ADDRESS TIME TO OUTPUT TEST CIRCUIT
FIGURE 5. ADDRESS TIME TO OUTPUT DIAGRAM
ISL71841SEH
4V
+10V
IN01
IN02-IN32
A4
A3
A2
A1
A0
ENABLE
50%
50%
0.8V
10V
EN
OUT
tDISABLE
tENABLE
OUTPUT
0V
50%
50%
+4.0V
+0.8V
1kΩ
50pF
50Ω
FIGURE 7. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
ISL71841SEH
4V
A4
A3
A2
A1
A0
IN01
IN02-IN31
IN32
+5V
ADDRESS
+4.0V
+0.8V
50Ω
0.8V
5V
EN
OUT
VOUT
50pF
+0.8V
50%
1kΩ
OUT
tBBM
0V
FIGURE 9. BREAK-BEFORE-MAKE DIAGRAM
FIGURE 8. BREAK-BEFORE-MAKE TEST CIRCUIT
4V
ISL71841SEH
IN01
IN02-IN31
IN32
0V
A4
A3
A2
A1
A0
ADDRESS
+4.0V
+0.8V
50Ω
0.8V
15V
Q = 100pF * ΔVOUT
ΔVOUT
+0.8V
EN
OUT
VOUT
OUT
0V
100pF
FIGURE 11. CHARGE INJECTION DIAGRAM
FIGURE 10. CHARGE INJECTION TEST CIRCUIT
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Typical Performance Curves V± = ±15V, VCM = 0V, RL = Open, TA = +25°C, unless otherwise specified.
600
500
400
300
200
100
0
600
500
400
300
200
100
0
+125°C
+125°C
+25°C
+25°C
-55°C
-10
-55°C
-10
-20
-15
-5
0
5
10
15
20
-20
-15
-5
0
5
10
15
20
SWITCH INPUT VOLTAGE (V)
SWITCH INPUT VOLTAGE (V)
FIGURE 12. rDS(ON) vs VCM (V± = 14.5V)
FIGURE 13. rDS(ON) vs VCM (V± = 15.0V)
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
+125°C
+25°C
+125°C
+25°C
-55°C
-55°C
-15
-20
-10
-5
0
5
10
15
20
-15
-10
-5
0
5
10
15
SWITCH INPUT VOLTAGE (V)
SWITCH INPUT VOLTAGE (V)
FIGURE 14. rDS(ON) vs VCM (V± = 16.5V)
FIGURE 15. rDS(ON) vs VCM (V± = 10.8V)
600
500
400
300
200
100
0
600
500
400
300
200
100
0
+125°C
+125°C
+25°C
-55°C
-10
-55°C
-10
-15
-5
0
5
10
15
-15
-5
0
5
10
15
SWITCH INPUT VOLTAGE (V)
SWITCH INPUT VOLTAGE (V)
FIGURE 16. rDS(ON) vs VCM (V± = 12.0V)
FIGURE 17. rDS(ON) vs VCM (V± = 13.2V)
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ISL71841SEH
Typical Performance Curves V± = ±15V, VCM = 0V, RL = Open, TA = +25°C, unless otherwise specified. (Continued)
700
600
500
+125°C
400
300
200
100
0
5V/DIV
+25°C
-55°C
2V/DIV
t
= 211.199ns
t
= 561.469ns
ADDLH
ADDHL
10
11
12
13
14
15
16
17
500ns/DIV
SPLIT SUPPLY RAILS (±V)
FIGURE 18. TYPICAL ADDRESS TO OUTPUT DELAY (V± = ±15V, +25°C)
FIGURE 19. ADDRESS TO OUTPUT DELAY (HIGH TO LOW)
300
250
200
5V/DIV
-55°C
+125°C
150
1V/DIV
+25°C
100
50
0
t
= 202.207ns
t
= 352.379ns
DISABLE
ENABLE
10
11
12
13
14
15
16
17
500ns/DIV
SPLIT SUPPLY RAILS (±V)
FIGURE 21. TYPICAL ENABLE TO OUTPUT DELAY (V± = ±15V, +25°C)
FIGURE 20. ADDRESS TO OUTPUT DELAY (LOW TO HIGH)
400
350
600
500
400
300
250
200
150
100
50
-55°C
300
+125°C
200
+25°C
-55°C
+25°C
+125°C
15
100
0
0
10
11
12
13
14
15
16
17
10
11
12
13
14
16
17
SPLIT SUPPLY RAILS (±V)
SPLIT SUPPLY RAILS (±V)
FIGURE 22. ENABLE TO OUTPUT DELAY (LOW TO HIGH)
FIGURE 23. DISABLE TO OUTPUT DELAY (LOW TO HIGH)
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Typical Performance Curves V± = ±15V, VCM = 0V, RL = Open, TA = +25°C, unless otherwise specified. (Continued)
120
100
+125°C
2V/DIV
80
60
+25°C
1V/DIV
40
20
-55°C
t
= 73.425ns
BBM
0
10
11
12
13
14
15
16
17
200ns/DIV
SPLIT SUPPLY RAILS (±V)
FIGURE 24. TYPICAL BREAK-BEFORE-MAKE DELAY (V± = 15V, +25°C)
FIGURE 25. BREAK-BEFORE-MAKE DELAY
160
140
120
100
80
60
40
20
0
120
100
80
60
40
20
0
100
1k
10k
FREQUENCY (Hz)
10M
1M
100k
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 26. OFF ISOLATION (V± = ±15V, RL = 1kΩ, +25°C)
FIGURE 27. OFF ISOLATION (V± = ±15V, RL = OPEN, +25°C)
140
120
100
80
120
100
80
60
40
20
0
60
40
20
0
100
100k
FREQUENCY (Hz)
1M
10M
1k
10k
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 28. CROSSTALK (V± = ±15V, RL = 1kΩ, +25°C)
FIGURE 29. CROSSTALK (V± = ±15V, RL = OPEN, +25°C)
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Typical Performance Curves V± = ±15V, VCM = 0V, RL = Open, TA = +25°C, unless otherwise specified. (Continued)
VIN: 5V/div
VOUT: 5V/div
V+ = +12V
V- = -12V
100µs/DIV
FIGURE 30. OVERVOLTAGE/UNDERVOLTAGE PROTECTION (+25°C)
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Post High Dose Rate Radiation Characteristics (V± = ±15V) Unless otherwise
specified, V± = ±15V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a high dose rate of 50 to 300rad(Si)/s.
This data is intended to show typical parameter shifts due to high dose rate radiation. These are not limits nor are they guaranteed.
0
7
6
5
4
-1
-2
-3
-4
-5
-6
-7
GROUNDED
BIASED
3
BIASED
GROUNDED
2
1
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 32. IEE SUPPLY CURRENT SHIFT vs HDR RADIATION
FIGURE 31. ICC SUPPLY CURRENT SHIFT vs HDR RADIATION
1.6
1.4
60
50
BIASED
BIASED
1.2
40
1.0
0.8
30
GROUNDED
GROUNDED
0.6
20
10
0
0.4
0.2
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 33. IREF SUPPLY CURRENT SHIFT vs HDR RADIATION
FIGURE 34. rDS(ON) SHIFT (VIN = V+) vs HDR RADIATION
25
20
20
18
16
14
12
10
8
BIASED
BIASED
15
10
6
GROUNDED
5
4
GROUNDED
2
0
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 35. rDS(ON) SHIFT (VIN = +5V) vs HDR RADIATION
FIGURE 36. rDS(ON) SHIFT (VIN = -5V) vs HDR RADIATION
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Post High Dose Rate Radiation Characteristics (V± = ±15V) Unless otherwise
specified, V± = ±15V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a high dose rate of 50 to 300rad(Si)/s.
This data is intended to show typical parameter shifts due to high dose rate radiation. These are not limits nor are they guaranteed. (Continued)
8
7
250
200
150
100
50
BIASED
6
5
BIASED
4
3
2
GROUNDED
GROUNDED
1
0
-1
-2
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 37. rDS(ON) SHIFT (VIN = V-) vs HDR RADIATION
FIGURE 38. tADD SHIFT (LOW TO HIGH) vs HDR RADIATION
35
60
30
25
20
15
10
5
50
BIASED
BIASED
40
30
20
GROUNDED
GROUNDED
0
10
-5
-10
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 39. tADD SHIFT (HIGH TO LOW) vs HDR RADIATION
FIGURE 40. tBBM SHIFT vs HDR RADIATION
50
40
200
180
160
140
120
100
80
BIASED
30
BIASED
GROUNDED
20
10
60
GROUNDED
40
0
20
-10
0
0
0
20
40
60
80
100
120
140
160
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 41. tENABLE SHIFT vs HDR RADIATION
FIGURE 42. tDISABLE SHIFT vs HDR RADIATION
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ISL71841SEH
Post High Dose Rate Radiation Characteristics (V± = ±12V) Unless otherwise
specified, V± = ±12V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a high dose rate of 50 to 300rad(Si)/s.
This data is intended to show typical parameter shifts due to high dose rate radiation. These are not limits nor are they guaranteed.
7
6
5
4
3
2
1
0
0
-1
-2
-3
-4
-5
-6
-7
GROUNDED
BIASED
GROUNDED
BIASED
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 43. ICC SUPPLY CURRENT SHIFT vs HDR RADIATION
FIGURE 44. IEE SUPPLY CURRENT SHIFT vs HDR RADIATION
1.6
1.4
60
50
BIASED
BIASED
1.2
40
30
20
1.0
0.8
GROUNDED
0.6
0.4
0.2
0
10
GROUNDED
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 45. IREF SUPPLY CURRENT SHIFT vs HDR RADIATION
FIGURE 46. rDS(ON) SHIFT (VIN = V+) vs HDR RADIATION
30
30
25
25
20
15
10
5
20
BIASED
BIASED
15
10
GROUNDED
GROUNDED
5
0
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 47. rDS(ON) SHIFT (VIN = +5V) vs HDR RADIATION
FIGURE 48. rDS(ON) SHIFT (VIN = -5V) vs HDR RADIATION
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ISL71841SEH
Post High Dose Rate Radiation Characteristics (V± = ±12V) Unless otherwise
specified, V± = ±12V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a high dose rate of 50 to 300rad(Si)/s.
This data is intended to show typical parameter shifts due to high dose rate radiation. These are not limits nor are they guaranteed. (Continued)
300
250
200
150
100
50
10
8
6
BIASED
BIASED
4
2
0
GROUNDED
GROUNDED
-2
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 49. rDS(ON) SHIFT (VIN = V-) vs HDR RADIATION
FIGURE 50. tADD SHIFT (LOW TO HIGH) vs HDR RADIATION
40
60
BIASED
35
30
25
20
15
10
5
50
BIASED
40
30
20
GROUNDED
GROUNDED
100
10
0
0
0
20
40
60
80
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 51. tADD SHIFT (HIGH TO LOW) vs HDR RADIATION
FIGURE 52. tBBM SHIFT vs HDR RADIATION
200
180
160
140
120
100
80
50
45
BIASED
40
BIASED
35
30
25
20
15
GROUNDED
60
GROUNDED
10
40
5
0
20
0
0
20
40
60
80
100
120
140
160
0
20
40
60
80
100
120
140
160
HIGH DOSE RATE RADIATION (krad(Si))
HIGH DOSE RATE RADIATION (krad(Si))
FIGURE 53. tENABLE SHIFT vs HDR RADIATION
FIGURE 54. tDISABLE SHIFT vs HDR RADIATION
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ISL71841SEH
Post Low Dose Rate Radiation Characteristics (V± = ±15V) Unless otherwise
specified, V± = ±15V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed.
1.2
1.0
0.8
0.6
0.4
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
GROUNDED
BIASED
BIASED
GROUNDED
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 55. ICC SUPPLY CURRENT SHIFT vs LDR RADIATION
FIGURE 56. IEE SUPPLY CURRENT SHIFT vs LDR RADIATION
2.5
10
8
GROUNDED
2.0
BIASED
6
4
2
1.5
BIASED
1.0
0
GROUNDED
0.5
0
-2
-4
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 57. IREF SUPPLY CURRENT SHIFT vs LDR RADIATION
FIGURE 58. rDS(ON) SHIFT (VIN = +5V) vs LDR RADIATION
25
20
6
5
4
BIASED
3
2
15
BIASED
GROUNDED
10
5
1
0
-1
-2
-3
-4
0
GROUNDED
-5
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 59. rDS(ON) SHIFT (VIN = -5V) vs LDR RADIATION
FIGURE 60. rDS(ON) SHIFT (VIN = V+) vs LDR RADIATION
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ISL71841SEH
Post Low Dose Rate Radiation Characteristics (V± = ±15V) Unless otherwise
specified, V± = ±15V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed. (Continued)
250
200
150
100
50
0
-1
BIASED
-2
GROUNDED
-3
GROUNDED
-4
-5
-6
-7
-8
BIASED
-9
0
-10
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 61. rDS(ON) SHIFT (VIN = V-) vs LDR RADIATION
FIGURE 62. tADD SHIFT (LOW TO HIGH) vs LDR RADIATION
0
14
GROUNDED
12
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
10
8
BIASED
BIASED
6
4
2
0
GROUNDED
50
0
10
20
30
40
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 63. tADD SHIFT (HIGH TO LOW) vs LDR RADIATION
FIGURE 64. tBBM SHIFT vs LDR RADIATION
300
20
15
BIASED
250
200
150
100
50
BIASED
10
GROUNDED
5
0
GROUNDED
-5
0
-10
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 65. tENABLE SHIFT vs LDR RADIATION
FIGURE 66. tDISABLE SHIFT vs LDR RADIATION
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ISL71841SEH
Post Low Dose Rate Radiation Characteristics (V± = ±12V) Unless otherwise
specified, V± = ±12V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed.
1.2
1.0
0.8
0.6
0.4
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
GROUNDED
BIASED
BIASED
GROUNDED
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 67. ICC SUPPLY CURRENT SHIFT vs LDR RADIATION
FIGURE 68. IEE SUPPLY CURRENT SHIFT vs LDR RADIATION
2.5
35
30
25
GROUNDED
2.0
BIASED
20
15
10
5
1.5
1.0
BIASED
0.5
0
0
GROUNDED
-5
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 69. IREF SUPPLY CURRENT SHIFT vs LDR RADIATION
FIGURE 70. rDS(ON) SHIFT (VIN = V+) vs LDR RADIATION
12
10
8
6
4
GROUNDED
8
BIASED
6
4
2
2
BIASED
0
0
GROUNDED
-2
-4
-2
-4
0
10
20
30
40
50
60
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 71. rDS(ON) SHIFT (VIN = +5V) vs LDR RADIATION
FIGURE 72. rDS(ON) SHIFT (VIN = -5V) vs LDR RADIATION
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ISL71841SEH
Post Low Dose Rate Radiation Characteristics (V± = ±12V) Unless otherwise
specified, V± = ±12V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed. (Continued)
350
300
250
200
150
100
50
2
0
BIASED
-2
GROUNDED
-4
GROUNDED
-6
-8
-10
-12
BIASED
40
0
0
10
20
30
40
50
60
0
10
20
30
50
60
60
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 73. rDS(ON) SHIFT (VIN = V-) vs LDR RADIATION
FIGURE 74. tADD SHIFT (LOW TO HIGH) vs LDR RADIATION
16
20
14
15
10
5
GROUNDED
12
10
BIASED
8
0
BIASED
6
4
2
0
-5
-10
-15
-20
GROUNDED
0
10
20
30
40
50
60
10
20
30
40
50
0
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 75. tADD SHIFT (HIGH TO LOW) vs LDR RADIATION
FIGURE 76. tBBM SHIFT vs LDR RADIATION
25
20
300
250
200
150
100
50
BIASED
15
BIASED
10
5
GROUNDED
GROUNDED
0
-5
-10
0
0
10
20
30
40
50
0
10
20
30
40
50
60
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 77. tENABLE SHIFT vs LDR RADIATION
FIGURE 78. tDISABLE SHIFT vs LDR RADIATION
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ISL71841SEH
ISL71841SEH vs ISL71840SEH
Applications Information
There is a 16-channel version of the ISL71841SEH available in a
28 Ld CDFP. In terms of performance specs, the parts are very
similar in behavior. Apart from the apparent increase in channel
density, the ISL71841SEH does have slightly higher output
leakage compared to the ISL71840SEH due to having more
channels connected to the output. The supply current for the
ISL71841SEH is also a bit higher compared to the ISL71840SEH.
(See Table 1 on page 3.)
Power-Up Considerations
The circuit is designed to be insensitive to any given power-up
sequence between V+, V- and VREF, however, it is recommended
that all supplies power-up relatively close to each other.
Overvoltage Protection
The ISL71841SEH has overvoltage protection on both the input
as well as the output. On the output, the voltage is limited to a
diode past the rails. Each of the inputs has independent
overvoltage protection that works regardless of the switch being
selected. If a switch experiences an overvoltage condition (3V to
4V past the rail), the switch is turned off. As soon as the voltage
returns within the rails, the switch returns to normal operation.
VREF and Logic Functionality
The VREF pin sets the logic threshold for the ISL71841SEH. The
range for VREF is between 4.5V and 5.5V with a nominal voltage
of 5V. The address pins and enable are compared against
roughly 30% of VREF voltage (refer to Figure 79). With 5.0V on
VREF, the switching point is set to around 1.4V. This switching
point allows for both 5V and 3.3V logic control.
ISL71841SEH
A/EN
400kΩ
VREF
TO DECODER
200kΩ
FIGURE 79. SIMPLIFIED VREF CIRCUITRY
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ISL71841SEH
Assembly Related Information
Die Characteristics
SUBSTRATE POTENTIAL
Die Dimensions
Floating
5000µm x 4080µm (197 mils x 161 mils)
Thickness: 483µm ±25µm (19 mils ±1 mil)
Additional Information
Interface Materials
WORST CASE CURRENT DENSITY
1.6 x 105 A/cm2
GLASSIVATION
Type: 12kÅ Silicon Nitride on 3kÅ Oxide
TRANSISTOR COUNT
TOP METALLIZATION
10752
Type: 300Å TiN on 2.8µm AlCu
In Bondpads, TiN has been removed.
Weight of Packaged Device
48 Ld CQFP: 1.54 grams (typical)
44 Ld CLCC: 2.02 grams (typical)
BACKSIDE FINISH
Silicon
Lid Characteristics
PROCESS
Finish: Gold
P6SOI
Potential: Grounded, tied to package GND pin
In 48 Ld CQFP: pin 29
In 44 Ld CLCC: pin 26
Metalization Mask Layout
IN12
IN13
IN14
IN15
IN16
OUT
IN32
IN31
IN30
IN29
IN28
IN27
IN11
IN10
IN9
IN26
IN25
IN8
IN7
IN6
IN5
IN4
IN24
IN23
IN22
IN21
IN20
IN3
IN19
IN2
IN1
IN18
IN17
EN
BAR
V+
VREF
A0
A1
A2
A3
A4
GND
V‐
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ISL71841SEH
TABLE 3. ISL71840SEH DIE LAYOUT X-Y COORDINATES
ΔX
ΔY
X
Y
PAD NUMBER
1
PAD NAME
IN28
IN29
IN30
IN31
IN32
OUT
IN16
IN15
IN14
IN13
IN12
IN11
IN10
IN9
PACKAGING PIN
P42
P43
P44
P45
P46
P1
(µm)
(µm)
(µm)
(µm)
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
320
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122.05
122
122
122
122
122
122
122
122
122.05
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122
122.05
122
122
122
122
2232.2
1956.5
1529.15
1171.85
816.35
7.2
1776.05
1772.2
1772.2
1772.2
1772.2
1773.25
1772.2
1772.2
1772.2
1772.2
1775.55
1343.55
944.5
2
3
4
5
9
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
37
38
39
40
41
42
43
44
45
46
47
48
49
50
P3
-829.525
-1192.2
-1553.65
-1965.35
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-2232.2
-1970.75
-1558.65
-1196.8
-835.6
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P28
P29, P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
626.15
354.4
IN8
IN7
108.275
-138.75
-391.8
IN6
IN5
IN4
-622.95
-948.55
-1379.95
-1775.95
-1789.2
-1789.2
-1789.2
-1789.2
-1789.2
-1789.2
-1789.2
-1789.2
-1789.1
-1789.2
-1774.95
-1380.25
-947.45
-624.75
-391.95
-139.05
107.525
353.6
IN3
IN2
IN1
V+
VREF
A0
A1
A2
-533
A3
-109.45
313.95
1171.9
1525.85
1955.7
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
2232.2
A4
EN_B
GND
V-
IN17
IN18
IN19
IN20
IN21
IN22
IN23
IN24
IN25
IN26
IN27
626.9
943.9
1342.7
NOTE: Origin of coordinates is the center of the die.
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ISL71841SEH
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please go to the web to make sure that you have the latest revision.
DATE
REVISION
FN8735.4
CHANGE
June 3, 2016
Updated Ordering information table on page 3 by updating first column and updating Note 3.
Updated bolding in Electrical Specification table and added test conditions to the Break-Before-Make Delay,
Enable Turn-On Time and Disable Turn-Off Time specifications.
Changed from “VS” to “V±” in the titles of the Typical Performance, Post High and Post Low Dose Rate
Radiation Characteristics curve tables.
Changed units from mA to µA for Figures 31, 32, 33, 43, 44, 45, 55, 56, 57, 67, 68, 69
April 15, 2016
FN8735.3
Added ISL71841SEHVL and ISL71841SEHL/PROTO details to the Ordering Information table on page 3 and
added the applicable packaging information throughout datasheet.
Updated the heading for the Low Dose Rate Radiation Characteristics (Vs = ±15V) table on page 20 in third
sentence changed from “high” to “low”.
Updated the heading for the Low Dose Rate Radiation Characteristics (Vs = ±12V) table on page 22 in third
sentence changed from “high” to “low”.
December 11, 2015
September 29, 2015
FN8735.2
FN8735.1
Updated Y-axis labels on Figures 31 through 78.
Updated crosstalk and off Isolation MIN in Electrical Spec table on page 7 from -75 to 75 (off isolation) and
-47 to 47 (crosstalk).
Changed all instances of VDD to V+ and VSS to V-.
Updated Related Literature on page 1.
Updated testing information for ESD tolerances, HBM, CDM and MM in
“Absolute Maximum Ratings” on page 5
From:
Human Body Model (Tested per MIL-PRF-883 3015.7)
Charged Device Model (Tested per MIL-PRF-883 3015.7)
Machine Model (Tested per MIL-PRF-883 3015.7)
To:
Human Body Model (Tested per MIL-STD-883 TM 3015)
Charged Device Model (Tested per JESD22-C101D)
Machine Model (Tested per JESD22-A115-A)
Updated crosstalk and off Isolation MIN in Electrical Spec table on page 7 from -90 to -75 (off isolation) and
-47 (crosstalk)
Added Figures 26, 28 and 30 and updated figure titles for Figures 27 and 29 on page 14.
Updated top metalization thickness and composition in “Die Characteristics” on page 25.
Added Table 3 on page 26.
June 11, 2015
FN8735.0
Initial Release
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ISL71841SEH
Package Outline Drawing
R48.A
48 CERAMIC QUAD FLATPACK PACKAGE (CQFP)
Rev 3, 10/12
1.118 (28.40)
1.080 (27.43)
0.572 (14.53)
0.555 (14.10)
#1#48
0.287 (7.29)
0.253 (6.43)
0.040 (1.02) BSC
PIN 1
INDEX AREA
1.118 (28.40)
1.080 (27.43)
0.572 (14.53)
0.555 (14.10)
0.007 (0.18) MIN
0.015 (0.38)
0.008 (0.20)
0.015 (0.38) MIN
TOP VIEW
0.099 (2.51)
0.076 (1.93)
0.016 (0.41)
0.009 (0.23)
SIDE VIEW
NOTE:
1. All dimensions are in inches (millimeters).
FN8735.4
June 3, 2016
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28
ISL71841SEH
Ceramic Leadless Chip Carrier Packages (CLCC)
J44.A MIL-STD-1835 CQCC1-N44 (C-5)
0.010 S E H S
44 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE
D
INCHES
MIN
MILLIMETERS
D3
SYMBOL
A
MAX
0.120
0.088
0.039
0.028
MIN
1.63
1.37
0.84
0.56
MAX
3.05
2.24
0.99
0.71
NOTES
o
j x 45
0.064
0.054
0.033
0.022
6, 7
A1
B
-
4
2, 4
-
B1
B2
B3
D
0.072 REF
1.83 REF
E3
E
B
0.006
0.640
0.022
0.662
0.15
0.56
-
16.26
16.81
-
D1
D2
D3
E
0.500 BSC
0.250 BSC
12.70 BSC
6.35 BSC
-
-
o
h x 45
-
0.662
0.662
-
16.81
16.81
2
-
0.010 S E F S
A1
0.640
16.26
E1
E2
E3
e
0.500 BSC
0.250 BSC
0.662
0.050 BSC
0.015
12.70 BSC
6.35 BSC
16.81
1.27 BSC
0.38
1.02 REF
0.51 REF
-
A
-
PLANE 2
PLANE 1
-
-
2
-
-E-
e1
h
-
-
2
5
5
-
0.040 REF
0.020 REF
j
0.007 M E F S H S
L
0.045
0.055
0.055
0.095
0.015
1.14
1.14
1.90
0.08
1.40
1.40
2.41
0.38
B1
L1
L2
L3
ND
NE
N
0.045
0.075
0.003
-
e
-
L3
L
-H-
-
11
11
44
11
11
44
3
3
3
-F-
Rev. 0 5/18/94
NOTES:
B3
E1
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
L2
E2
B2
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.38mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
L1
D2
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
e1
D1
4. The required plane 1 terminals and optional plane 2 terminals (if
used) shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Dimension “A” controls the overall package thickness. The maxi-
mum “A” dimension is package height before being solder dipped.
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Controlling dimension: INCH.
FN8735.4
June 3, 2016
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29
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