ISL81487E [INTERSIL]

【15kV ESD Protected, 1/8 Unit Load, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers; 【 15kV ESD保护, 1/8单位负载, 5V ,低功耗,高速或限摆率, RS - 485 / RS -422收发器
ISL81487E
型号: ISL81487E
厂家: Intersil    Intersil
描述:

【15kV ESD Protected, 1/8 Unit Load, 5V, Low Power, High Speed or Slew Rate Limited, RS-485/RS-422 Transceivers
【 15kV ESD保护, 1/8单位负载, 5V ,低功耗,高速或限摆率, RS - 485 / RS -422收发器

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ISL8487E, ISL81487L, ISL81487E  
®
Data Sheet  
September 15, 2005  
FN6051.6  
±15kV ESD Protected, 1/8 Unit Load, 5V,  
Low Power, High Speed or Slew Rate  
Limited, RS-485/RS-422 Transceivers  
Features  
• RS-485 I/O Pin ESD Protection . . . . . . . . . . ±15kV HBM  
- Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM  
These Intersil RS-485/RS-422 devices are ESD protected,  
fractional unit load (UL), BiCMOS, 5V powered, single  
transceivers that meet both the RS-485 and RS-422  
standards for balanced communication. Each driver output/  
receiver input is protected against ±15kV ESD strikes,  
without latch-up. Unlike competitive devices, this Intersil  
family is specified for 10% tolerance supplies (4.5V to 5.5V).  
• Fractional Unit Load Allows up to 256 Devices on the Bus  
• Specified for 10% Tolerance Supplies  
• High Data Rate Version (ISL81487E) . . . . . up to 5Mbps  
• Slew Rate Limited Versions for Error Free Data  
Transmission (ISL8487E, ISL81487L) . . . . .up to 250kbps  
• Low Current Shutdown Mode (Except ISL81487E). . . 0.5µA  
All devices present a 1/8 “unit load” to the RS-485 bus,  
which allows up to 256 transceivers on the network for large  
node count systems (e.g., process automation, remote  
meter reading systems). In a remote utility meter reading  
system, individual (apartments for example) utility meter  
readings are routed to a concentrator via an RS-485  
network, so the high allowed node count minimizes the  
number of repeaters required to network all the meters. Data  
for all meters is then read out from the concentrator via a  
single access port, or a wireless link.  
• Low Quiescent Supply Current:  
- ISL8487E, ISL81487L . . . . . . . . . . . . . . . 145µA (Max.)  
- ISL81487E . . . . . . . . . . . . . . . . . . . . . . . . 420µA (Max.)  
• -7V to +12V Common Mode Input Voltage Range  
• Three State Rx and Tx Outputs  
• 30ns Propagation Delays, 5ns Skew (ISL81487E)  
• Half Duplex Pinouts  
• Operate from a Single +5V Supply (10% Tolerance)  
Slew rate limited drivers on the ISL8487E and ISL81487L  
reduce EMI, and minimize reflections from improperly  
terminated transmission lines, or unterminated stubs in  
multidrop and multipoint applications. Data rates up to  
250kbps are achievable with these devices.  
• Current Limiting and Thermal Shutdown for Driver  
Overload Protection  
• Pin Compatible Replacements for: MAX487E, (ISL8487E);  
LTC1487, ADM1487 (ISL81487L); MAX1487E, ST485ER  
(ISL81487E)  
Data rates up to 5Mbps are achievable by using the  
ISL81487E, which features higher slew rates.  
• Pb-Free Plus Anneal Available (RoHS Compliant)  
Receiver (Rx) inputs feature a “fail-safe if open” design,  
which ensures a logic high Rx output if Rx inputs are floating.  
Applications  
• High Node Count Networks  
• Automated Utility Meter Reading Systems  
• Factory Automation  
Driver (Tx) outputs are short circuit protected, even for  
voltages exceeding the power supply voltage. Additionally,  
on-chip thermal shutdown circuitry disables the Tx outputs to  
prevent damage if power dissipation becomes excessive.  
• Security Networks  
These half duplex devices multiplex the Rx inputs and Tx  
outputs to allow transceivers with Rx and Tx disable  
functions in 8 lead packages.  
• Building Environmental Control Systems  
• Industrial/Process Control Networks  
TABLE 1. SUMMARY OF FEATURES  
PART  
HALF/FULL  
DUPLEX  
NO. OF DEVICES  
DATA RATE SLEW-RATE  
RECEIVER/  
QUIESCENT LOW POWER  
PIN  
NUMBER  
ALLOWED ON BUS  
(Mbps)  
0.25  
0.25  
5
LIMITED?  
Yes  
DRIVER ENABLE?  
I
(µA) SHUTDOWN? COUNT  
CC  
120  
ISL8487E  
ISL81487L  
ISL81487E  
Half  
Half  
Half  
256  
256  
256  
Yes  
Yes  
Yes  
Yes  
Yes  
No  
8
8
8
Yes  
120  
350  
No  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
ISL8487E, ISL81487L, ISL81487E  
Truth Tables  
Pinout  
ISL8487E, ISL81487L, ISL81487E (PDIP, SOIC)  
TRANSMITTING  
TOP VIEW  
INPUTS  
OUTPUTS  
RO  
RE  
DE  
DI  
1
2
3
4
8
7
6
5
V
CC  
RE  
X
DE  
1
DI  
1
Z
0
1
Y
1
R
B/Z  
A/Y  
X
1
0
0
D
GND  
0
0
X
X
High-Z  
High-Z  
High-Z *  
1
0
High-Z *  
*Shutdown Mode for ISL8487E, ISL81487L (See Note 7)  
Ordering Information  
PART NO.  
(BRAND)  
TEMP.  
PKG.  
RANGE (°C)  
PACKAGE  
DWG. #  
RECEIVING  
ISL8487EIB*  
-40 to 85  
-40 to 85  
8 Ld SOIC  
M8.15  
INPUTS  
OUTPUT  
(8487EIB)  
RE  
0
DE  
0
A-B  
+0.2V  
-0.2V  
Inputs Open  
X
RO  
ISL8487EIBZ*  
(8487EIB)(Note)  
ISL8487EIP  
ISL81487LIB*  
(81487LIB)  
ISL81487LIBZ*  
(81487LIB)(Note)  
ISL81487LIP  
ISL81487EIB*  
(81487EIB)  
8 Ld SOIC  
(Pb-free)  
8 Ld PDIP  
8 Ld SOIC  
M8.15  
1
0
-40 to 85  
-40 to 85  
E8.3  
M8.15  
0
0
0
0
1
-40 to 85  
8 Ld SOIC  
(Pb-free)  
8 Ld PDIP  
8 Ld SOIC  
M8.15  
1
0
High-Z *  
High-Z  
1
1
X
-40 to 85  
-40 to 85  
E8.3  
M8.15  
*Shutdown Mode for ISL8487E, ISL81487L (See Note 7)  
ISL81487EIBZ*  
(81487EIB)(Note)  
-40 to 85  
8 Ld SOIC  
(Pb-free)  
M8.15  
ISL81487EIP  
ISL81487EIPZ  
(ISL81487EIPZ)(Note)  
-40 to 85  
-40 to 85  
8 Ld PDIP  
8 Ld PDIP  
(Pb-free)  
E8.3  
E8.3  
*Add “-T” suffix to part number for tape and reel packaging.  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations. Intersil  
Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
Pin Descriptions  
PIN  
FUNCTION  
RO  
RE  
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).  
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.  
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.  
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.  
Ground connection.  
DE  
DI  
GND  
A/Y  
±15kV HBM ESD Protected, RS-485/422 level, noninverting receiver input and non-inverting driver output. Pin is an input (A) if  
DE = 0; pin is an output (Y) if DE = 1.  
B/Z  
±15kV HBM ESD Protected, RS-485/422 level, inverting receiver input and inverting driver output. Pin is an input (B) if DE = 0; pin is  
an output (Z) if DE = 1.  
V
System power supply input (4.5V to 5.5V).  
CC  
FN6051.6  
2
ISL8487E, ISL81487L, ISL81487E  
Typical Operating Circuits  
ISL8487E, ISL81487L, ISL81487E  
+5V  
+5V  
+
+
0.1µF  
0.1µF  
8
V
8
V
CC  
CC  
RO  
1
2
4
DI  
R
D
RE  
DE  
R
T
R
T
3
2
7
6
7
6
B/Z  
A/Y  
DE  
RE  
B/Z  
A/Y  
3
4
DI  
1
RO  
R
D
GND  
5
GND  
5
FN6051.6  
3
ISL8487E, ISL81487L, ISL81487E  
Absolute Maximum Ratings  
Thermal Information  
Thermal Resistance (Typical, Note 1)  
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .  
8 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . .  
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C  
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C  
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C  
(SOIC - Lead Tips Only)  
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V  
θ
JA  
(°C/W)  
170  
140  
CC  
Input Voltages  
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V  
Input/Output Voltages  
+0.5V)  
CC  
A/Y, B/Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V  
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V  
Short Circuit Duration  
+0.5V)  
CC  
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous  
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table  
Operating Conditions  
Temperature Range  
ISL8XXXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
JA  
(
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
CC  
Typicals are at V  
= 5V, T = 25°C, (Note 2)  
A
TEMP  
(°C)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
DC CHARACTERISTICS  
Driver Differential V  
Driver Differential V  
(no load)  
V
V
Full  
Full  
Full  
Full  
-
2
-
V
V
V
V
V
OUT  
OD1  
CC  
-
(with load)  
R = 50(RS-422), (Figure 1)  
R = 27(RS-485), (Figure 1)  
R = 27or 50, (Figure 1)  
3
OUT  
OD2  
1.5  
-
2.3  
0.01  
5
Change in Magnitude of Driver  
Differential V for  
V  
0.2  
OD  
OUT  
Complementary Output States  
Driver Common-Mode V  
V
R = 27or 50, (Figure 1)  
R = 27or 50, (Figure 1)  
Full  
Full  
-
-
-
3
V
V
OUT  
Change in Magnitude of Driver  
Common-Mode V for  
OC  
V  
0.01  
0.2  
OC  
OUT  
Complementary Output States  
Logic Input High Voltage  
Logic Input Low Voltage  
V
DE, DI, RE  
DE, DI, RE  
DE, DI, RE  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
2
-
-
-
-
-
-
-
-
-
V
IH  
V
-
0.8  
2
V
IL  
Logic Input Current  
I
-2  
µA  
µA  
µA  
µA  
µA  
V
IN1  
IN2  
Input Current (A/Y, B/Z), (Note 10)  
I
I
DE = 0V, V  
5.5V  
= 4.5 to  
= 0V  
V
V
V
V
= 12V  
= -7V  
= 12V  
= -7V  
-
140  
-120  
180  
-100  
0.2  
CC  
IN  
IN  
IN  
IN  
-
DE = 0V, V  
-
-
IN2  
CC  
Receiver Differential Threshold  
Voltage  
V
-7V V  
12V  
-0.2  
TH  
CM  
Receiver Input Hysteresis  
Receiver Output High Voltage  
Receiver Output Low Voltage  
V  
V
= 0V  
25  
-
3.5  
-
70  
-
-
-
mV  
V
TH  
CM  
V
I
I
= -4mA, V = 200mV  
ID  
Full  
Full  
Full  
OH  
O
O
V
= -4mA, V = 200mV  
ID  
-
0.4  
±1  
V
OL  
Three-State (high impedance)  
Receiver Output Current  
I
0.4V V 2.4V  
-
-
µA  
OZR  
O
Receiver Input Resistance  
R
-7V V  
12V  
CM  
Full  
96  
-
-
kΩ  
IN  
FN6051.6  
4
ISL8487E, ISL81487L, ISL81487E  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
CC  
Typicals are at V  
= 5V, T = 25°C, (Note 2) (Continued)  
A
TEMP  
(°C)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
400  
350  
160  
120  
0.5  
-
MAX UNITS  
No-Load Supply Current, (Note 3)  
I
ISL81487E, DI, RE = 0V DE = V  
Full  
Full  
Full  
Full  
Full  
Full  
-
-
500  
420  
200  
145  
8
µA  
µA  
µA  
µA  
µA  
mA  
CC  
CC  
or V  
CC  
DE = 0V  
ISL8487E, ISL81487L, DE = V  
-
CC  
DI, RE = 0V or V  
CC  
DE = 0V  
-
Shutdown Supply Current  
Driver Short-Circuit Current,  
I
(Note 7), DE = 0V, RE = V , DI = 0V or V  
CC  
-
SHDN  
CC  
DE = V , -7V V or V 12V, (Note 4)  
I
35  
250  
OSD1  
CC  
Y
Z
V
= High or Low  
O
Receiver Short-Circuit Current  
I
0V V V  
CC  
Full  
7
-
85  
mA  
OSR  
O
SWITCHING CHARACTERISTICS (ISL81487E)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
15  
-
24  
3
50  
10  
25  
70  
70  
70  
70  
150  
-
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54, C = 100pF, (Figure 2)  
3
-
12  
14  
14  
44  
21  
90  
5
ns  
R
F
L
t
= 100pF, SW = GND, (Figure 2)  
ns  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 2)  
CC  
-
ns  
ZL  
t
= 15pF, SW = GND, (Figure 2)  
-
ns  
HZ  
t
= 15pF, SW = V , (Figure 2)  
CC  
-
ns  
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
30  
-
ns  
PLH PHL  
Receiver Skew | t  
- t  
PLH PHL  
|
t
ns  
SKD  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
C
C
C
C
= 15pF, SW = GND, (Figure 5)  
Full  
Full  
Full  
Full  
Full  
-
9
50  
50  
50  
50  
-
ns  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5)  
CC  
-
9
ns  
ZL  
t
= 15pF, SW = GND, (Figure 5)  
-
9
ns  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
9
ns  
LZ  
f
5
-
Mbps  
MAX  
SWITCHING CHARACTERISTICS (ISL8487E)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
250  
-
650  
160  
900  
1000  
860  
660  
640  
500  
60  
2000  
800  
2000  
2000  
2000  
3000  
3000  
2000  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
kbps  
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54, C = 100pF, (Figure 2)  
250  
250  
250  
300  
300  
250  
-
R
F
L
t
= 100pF, SW = GND, (Figure 3, Note 5)  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 3, Note 5)  
CC  
ZL  
t
= 15pF, SW = GND, (Figure 3)  
HZ  
t
= 15pF, SW = V , (Figure 3)  
CC  
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
PLH PHL  
Receiver Skew | t  
- t  
PLH PHL  
|
t
SKD  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
C
C
C
C
= 15pF, SW = GND, (Figure 5, Note 6)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
-
10  
50  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5, Note 6)  
CC  
-
10  
50  
ZL  
t
= 15pF, SW = GND, (Figure 5)  
-
10  
50  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
10  
50  
LZ  
f
250  
50  
-
-
-
MAX  
Time to Shutdown  
t
(Note 7)  
120  
1000  
600  
2000  
SHDN  
Driver Enable from Shutdown to  
Output High  
t
C
= 100pF, SW = GND, (Figure 3, Notes 7, 8)  
ZH(SHDN)  
L
Driver Enable from Shutdown to  
Output Low  
t
C
= 100pF, SW = V , (Figure 3, Notes 7, 8)  
CC  
Full  
-
1000  
2000  
ns  
ZL(SHDN)  
L
FN6051.6  
5
ISL8487E, ISL81487L, ISL81487E  
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified.  
CC  
CC  
Typicals are at V  
= 5V, T = 25°C, (Note 2) (Continued)  
A
TEMP  
(°C)  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Receiver Enable from Shutdown to  
Output High  
t
C
C
= 15pF, SW = GND, (Figure 5, Notes 7, 9)  
Full  
-
800  
2500  
ns  
ZH(SHDN)  
L
Receiver Enable from Shutdown to  
Output Low  
t
= 15pF, SW = V , (Figure 5, Notes 7, 9)  
CC  
Full  
-
800  
2500  
ns  
ZL(SHDN)  
L
SWITCHING CHARACTERISTICS (ISL81487L)  
Driver Input to Output Delay  
Driver Output Skew  
t
, t  
PLH PHL  
R
R
R
C
C
C
C
= 54, C = 100pF, (Figure 2)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
25  
150  
-
650  
160  
900  
1000  
1000  
750  
750  
175  
13  
1200  
600  
1200  
1500  
1500  
1500  
1500  
250  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
kbps  
ns  
ns  
DIFF  
DIFF  
DIFF  
L
t
= 54, C = 100pF, (Figure 2)  
L
SKEW  
t , t  
Driver Differential Rise or Fall Time  
Driver Enable to Output High  
Driver Enable to Output Low  
Driver Disable from Output High  
Driver Disable from Output Low  
Receiver Input to Output Delay  
= 54, C = 100pF, (Figure 2)  
250  
100  
100  
150  
150  
30  
-
R
F
L
t
= 100pF, SW = GND, (Figure 3, Note 5)  
ZH  
L
L
L
L
t
= 100pF, SW = V , (Figure 3, Note 5)  
CC  
ZL  
t
= 15pF, SW = GND, (Figure 3)  
HZ  
t
= 15pF, SW = V , (Figure 3)  
CC  
LZ  
, t  
t
(Figure 4)  
(Figure 4)  
PLH PHL  
Receiver Skew | t  
- t  
PLH PHL  
|
t
SKD  
Receiver Enable to Output High  
Receiver Enable to Output Low  
Receiver Disable from Output High  
Receiver Disable from Output Low  
Maximum Data Rate  
t
C
C
C
C
= 15pF, SW = GND, (Figure 5, Note 6)  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
-
10  
50  
ZH  
L
L
L
L
t
= 15pF, SW = V , (Figure 5, Note 6)  
CC  
-
10  
50  
ZL  
t
= 15pF, SW = GND, (Figure 5)  
-
10  
50  
HZ  
t
= 15pF, SW = V , (Figure 5)  
CC  
-
10  
50  
LZ  
f
250  
50  
-
-
-
MAX  
Time to Shutdown  
t
(Note 7)  
140  
1100  
600  
2000  
SHDN  
Driver Enable from Shutdown to  
Output High  
t
t
C
C
C
C
= 100pF, SW = GND, (Figure 3, Notes 7, 8)  
ZH(SHDN)  
L
L
L
L
Driver Enable from Shutdown to  
Output Low  
t
= 100pF, SW = V , (Figure 3, Notes 7, 8)  
CC  
Full  
Full  
Full  
-
-
-
1000  
900  
2000  
2000  
2000  
ns  
ns  
ns  
ZL(SHDN)  
Receiver Enable from Shutdown to  
Output High  
= 15pF, SW = GND, (Figure 5, Notes 7, 9)  
ZH(SHDN)  
Receiver Enable from Shutdown to  
Output Low  
t
= 15pF, SW = V , (Figure 5, Notes 7, 9)  
CC  
900  
ZL(SHDN)  
ESD PERFORMANCE  
RS-485 Pins (A/Y, B/Z)  
All Other Pins  
Human Body Model  
25  
25  
-
-
±15  
>±7  
-
-
kV  
kV  
NOTES:  
2. Currents into device pins are positive; currents out of device pins are negative. Voltages are referenced to ground unless otherwise specified.  
3. Supply current specification is valid for loaded drivers when DE = 0V.  
4. Applies to peak current. See “Typical Performance Curves” for more information.  
5. When testing the ISL8487E and ISL81487L, keep RE = 0 to prevent the device from entering SHDN.  
6. When testing the ISL8487E and ISL81487L, the RE signal high time must be short enough (typically <200ns) to prevent the device from entering  
SHDN.  
7. The ISL8487E and ISL81487L are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 50ns, the parts  
are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See  
“Low-Power Shutdown Mode” section.  
8. Keep RE = V , and set the DE signal low time >600ns to ensure that the device enters SHDN.  
CC  
9. Set the RE signal high time >600ns to ensure that the device enters SHDN.  
10. Devices meeting these limits are denoted as “1/8 unit load (1/8 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus,  
so there can be 256 1/8 UL devices on a bus.  
FN6051.6  
6
ISL8487E, ISL81487L, ISL81487E  
Test Circuits and Waveforms  
R
DE  
V
CC  
Z
DI  
V
D
OD  
Y
V
R
OC  
FIGURE 1. DRIVER V  
AND V  
DI  
OD  
OC  
3V  
0V  
1.5V  
PLH  
1.5V  
PHL  
t
t
t
V
OH  
50%  
50%  
50%  
OUT (Y)  
OUT (Z)  
C
= 100pF  
L
V
DE  
DI  
OL  
V
CC  
Z
Y
t
PHL  
PLH  
R
DIFF  
D
V
OH  
C
= 100pF  
L
50%  
90%  
V
SIGNAL  
GENERATOR  
OL  
+V  
OD  
90%  
10%  
DIFF OUT (Y - Z)  
10%  
-V  
OD  
t
t
R
F
SKEW = |t  
PLH  
(Y or Z) - t  
(Z or Y)|  
PHL  
FIGURE 2A. TEST CIRCUIT  
FIGURE 2B. MEASUREMENT POINTS  
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES  
DE  
DI  
Z
Y
500Ω  
V
CC  
GND  
D
3V  
0V  
SW  
SIGNAL  
GENERATOR  
DE  
1.5V  
1.5V  
HZ  
NOTE 7  
C
L
t
, t  
ZH ZH(SHDN)  
NOTE 7  
t
OUTPUT HIGH  
2.3V  
(SHDN) for ISL8487E and ISL81487L only.  
V
OH  
V
- 0.5V  
OH  
PARAMETER OUTPUT  
RE  
X
DI  
SW  
GND  
C (pF)  
L
15  
OUT (Y, Z)  
t
Y/Z  
Y/Z  
Y/Z  
Y/Z  
Y/Z  
Y/Z  
1/0  
0/1  
1/0  
0/1  
1/0  
0/1  
0V  
HZ  
t
X
V
15  
LZ  
CC  
t
, t  
t
ZL ZL(SHDN)  
LZ  
t
0 (Note 5)  
0 (Note 5)  
1 (Note 7)  
1 (Note 7)  
GND  
100  
100  
100  
100  
NOTE 7  
ZH  
V
CC  
OL  
t
V
OUT (Y, Z)  
ZL  
CC  
2.3V  
V
OL  
+ 0.5V  
t
GND  
V
ZH(SHDN)  
OUTPUT LOW  
t
V
CC  
ZL(SHDN)  
FIGURE 3A. TEST CIRCUIT  
FIGURE 3B. MEASUREMENT POINTS  
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES  
FN6051.6  
7
ISL8487E, ISL81487L, ISL81487E  
Test Circuits and Waveforms (Continued)  
RE  
B
A
3V  
0V  
15pF  
A
1.5V  
PLH  
1.5V  
PHL  
+1.5V  
RO  
R
t
t
V
SIGNAL  
GENERATOR  
CC  
50%  
50%  
RO  
0V  
FIGURE 4A. TEST CIRCUIT  
FIGURE 4B. MEASUREMENT POINTS  
FIGURE 4. RECEIVER PROPAGATION DELAY  
RE  
B
1kΩ  
V
CC  
GND  
RO  
R
SW  
SIGNAL  
NOTE 7  
A
GENERATOR  
3V  
15pF  
RE  
1.5V  
1.5V  
HZ  
0V  
(SHDN) for ISL8487E and ISL81487L only.  
t
, t  
ZH ZH(SHDN)  
NOTE 7  
t
OUTPUT HIGH  
1.5V  
PARAMETER  
DE  
0
A
SW  
GND  
V
OH  
V
- 0.5V  
OH  
t
+1.5V  
-1.5V  
+1.5V  
-1.5V  
+1.5V  
-1.5V  
RO  
HZ  
0V  
t
0
V
LZ  
CC  
GND  
t
(Note 6)  
(Note 6)  
0
ZH  
t
, t  
ZL ZL(SHDN)  
NOTE 7  
t
LZ  
t
0
V
ZL  
CC  
GND  
V
CC  
OL  
RO  
t
(Note 7)  
(Note 7)  
0
ZH(SHDN)  
1.5V  
V
+ 0.5V  
OL  
V
t
0
V
CC  
ZL(SHDN)  
OUTPUT LOW  
FIGURE 5A. TEST CIRCUIT  
FIGURE 5B. MEASUREMENT POINTS  
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES  
ground potential differences, as well as voltages induced in  
the cable by external fields.  
Application Information  
RS-485 and RS-422 are differential (balanced) data  
transmission standards for use in long haul or noisy  
environments. RS-422 is a subset of RS-485, so RS-485  
transceivers are also RS-422 compliant. RS-422 is a point-  
to-multipoint (multidrop) standard, which allows only one  
driver and up to 10 (assuming one unit load devices)  
receivers on each bus. RS-485 is a true multipoint standard,  
which allows up to 32 one unit load devices (any  
combination of drivers and receivers) on each bus. To allow  
for multipoint operation, the RS-485 spec requires that  
drivers must handle bus contention without sustaining any  
damage.  
Receiver Features  
These devices utilize a differential input receiver for maximum  
noise immunity and common mode rejection. Input sensitivity  
is ±200mV, as required by the RS-422 and RS-485  
specifications.  
Receiver input resistance of 96ksurpasses the RS-422  
spec of 4k, and is eight times the RS-485 “Unit Load (UL)”  
requirement of 12kminimum. Thus, these products are  
known as “one-eighth UL” transceivers, and there can be up  
to 256 of these devices on a network while still complying  
with the RS-485 loading spec.  
Another important advantage of RS-485 is the extended  
common mode range (CMR), which specifies that the driver  
outputs and receiver inputs withstand signals that range from  
+12V to -7V. RS-422 and RS-485 are intended for runs as  
long as 4000’, so the wide CMR is necessary to handle  
Receiver inputs function with common mode voltages as  
great as ±7V outside the power supplies (i.e., +12V and  
-7V), making them ideal for long networks where induced  
voltages are a realistic concern.  
FN6051.6  
8
ISL8487E, ISL81487L, ISL81487E  
All the receivers include a “fail-safe if open” function that  
guarantees a high level receiver output if the receiver inputs  
are unconnected (floating).  
The driver output stages incorporate short circuit current  
limiting circuitry which ensures that the output current never  
exceeds the RS-485 spec, even at the common mode  
voltage range extremes. Additionally, these devices utilize a  
foldback circuit which reduces the short circuit current, and  
thus the power dissipation, whenever the contending voltage  
exceeds either supply.  
Receivers easily meet the data rates supported by the  
corresponding driver, and receiver outputs are three-statable  
via the active low RE input.  
Driver Features  
In the event of a major short circuit condition, these devices  
also include a thermal shutdown feature that disables the  
drivers whenever the die temperature becomes excessive.  
This eliminates the power dissipation, allowing the die to  
cool. The drivers automatically re-enable after the die  
temperature drops about 15 degrees. If the contention  
persists, the thermal shutdown/re-enable cycle repeats until  
the fault is cleared. Receivers stay operational during  
thermal shutdown.  
The RS-485/422 driver is a differential output device that  
delivers at least 1.5V across a 54load (RS-485), and at  
least 2V across a 100load (RS-422). The drivers feature  
low propagation delay skew to maximize bit width, and to  
minimize EMI.  
Driver outputs are three-statable via the active high DE  
input.  
The ISL8487E and ISL81487L driver outputs are slew rate  
limited to minimize EMI, and to minimize reflections in  
unterminated or improperly terminated networks. Data rate  
on these slew rate limited versions is a maximum of  
250kbps. ISL81487E drivers are not limited, so faster output  
transition times allow data rates of at least 5Mbps.  
Low Power Shutdown Mode (Excluding  
ISL81487E)  
These CMOS transceivers all use a fraction of the power  
required by their bipolar counterparts, but the ISL8487E  
and ISL81487L include a shutdown feature that reduces  
the already low quiescent I  
to a 500nA trickle. They  
CC  
enter shutdown whenever the receiver and driver are  
simultaneously disabled (RE = V and DE = GND) for a  
Data Rate, Cables, and Terminations  
CC  
RS-485/422 are intended for network lengths up to 4000’,  
but the maximum system data rate decreases as the  
transmission length increases. Devices operating at 5Mbps  
are limited to lengths less than a few hundred feet, while the  
250kbps versions can operate at full data rates with lengths  
in excess of 1000’.  
period of at least 600ns. Disabling both the driver and the  
receiver for less than 50ns guarantees that shutdown is not  
entered.  
Note that receiver and driver enable times increase when  
enabling from shutdown. Refer to Notes 5-9, at the end of  
the Electrical Specification table, for more information.  
Twisted pair is the cable of choice for RS-485/422 networks.  
Twisted pair cables tend to pick up noise and other  
electromagnetically induced voltages as common mode  
signals, which are effectively rejected by the differential  
receivers in these ICs.  
ESD Protection  
All pins on these interface devices include class 3 Human  
Body Model (HBM) ESD protection structures, but the  
RS-485 pins (driver outputs and receiver inputs)  
To minimize reflections, proper termination is imperative  
when using the 5Mbps device. Short networks using the  
250kbps versions need not be terminated, but, terminations  
are recommended unless power dissipation is an overriding  
concern.  
incorporate advanced structures allowing them to survive  
ESD events in excess of ±15kV HBM. The RS-485 pins are  
particularly vulnerable to ESD damage because they  
typically connect to an exposed port on the exterior of the  
finished product. Simply touching the port pins, or  
connecting a cable, can cause an ESD event that might  
destroy unprotected ICs. These new ESD structures  
protect the device whether or not it is powered up, protect  
without allowing any latchup mechanism to activate, and  
without degrading the RS-485 common mode range of -7V  
to +12V. This built-in ESD protection eliminates the need  
for board level protection structures (e.g., transient  
suppression diodes), and the associated, undesirable  
capacitive load they present.  
In point-to-point, or point-to-multipoint (single driver on bus)  
networks, the main cable should be terminated in its  
characteristic impedance (typically 120) at the end farthest  
from the driver. In multi-receiver applications, stubs  
connecting receivers to the main cable should be kept as  
short as possible. Multipoint (multi-driver) systems require  
that the main cable be terminated in its characteristic  
impedance at both ends. Stubs connecting a transceiver to  
the main cable should be kept as short as possible.  
Built-In Driver Overload Protection  
As stated previously, the RS-485 spec requires that drivers  
survive worst case bus contentions undamaged. These  
devices meet this requirement via driver output short circuit  
current limits, and on-chip thermal shutdown circuitry.  
FN6051.6  
9
ISL8487E, ISL81487L, ISL81487E  
HBM method determines an IC’s ability to withstand the ESD  
Human Body Model Testing  
events typically present during handling and manufacturing.  
As the name implies, this test method emulates the ESD  
event delivered to an IC during human handling. The tester  
delivers the charge stored on a 100pF capacitor through a  
1.5kcurrent limiting resistor into the pin under test. The  
The RS-485 pin survivability on this high ESD family has  
been characterized to be in excess of ±15kV, for discharges  
to GND.  
Typical Performance Curves V = 5V, T = 25°C, ISL8487E, ISL81487L and ISL81487E;  
CC  
A
Unless Otherwise Specified  
3.6  
3.4  
3.2  
3
90  
80  
70  
60  
50  
40  
30  
R
= 100Ω  
DIFF  
2.8  
2.6  
2.4  
2.2  
2
R
= 54Ω  
DIFF  
20  
10  
0
0
1
2
3
4
5
-40  
0
50  
85  
-25  
25  
75  
DIFFERENTIAL OUTPUT VOLTAGE (V)  
TEMPERATURE (°C)  
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL  
OUTPUT VOLTAGE  
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs  
TEMPERATURE  
400  
160  
ISL81487E, DE = V , RE = X  
CC  
140  
120  
100  
80  
ISL81487E  
350  
300  
Y OR Z = LOW  
ISL81487E, DE = GND, RE = X  
ISL8487E, ISL81487L  
60  
40  
20  
0
-20  
-40  
-60  
250  
200  
150  
100  
Y OR Z = HIGH  
ISL8487E, ISL81487L, DE = V , RE = X  
CC  
ISL81487E  
ISL8487E, ISL81487L  
-80  
-100  
ISL8487E, ISL81487L, DE = GND, RE = GND  
-120  
-40  
0
50  
85  
-7 -6  
-4  
-2  
0
2
4
6
8
10  
12  
-25  
25  
75  
OUTPUT VOLTAGE (V)  
TEMPERATURE (°C)  
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT  
VOLTAGE  
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE  
FN6051.6  
10  
ISL8487E, ISL81487L, ISL81487E  
Typical Performance Curves V = 5V, T = 25°C, ISL8487E, ISL81487L and ISL81487E;  
CC  
A
Unless Otherwise Specified (Continued)  
250  
750  
700  
650  
600  
550  
500  
450  
200  
t
PLHY  
t
PLHZ  
|t  
- t |  
PLHY PHLZ  
150  
100  
50  
|t |  
- t  
PHLY PLHZ  
t
PHLY  
t
PHLZ  
|CROSS PT. OF Y& Z- CROSS PT. OF Y& Z|  
0
-40  
0
50  
85  
-40  
0
50  
85  
-25  
25  
TEMPERATURE (°C)  
75  
-25  
25  
TEMPERATURE (°C)  
75  
FIGURE 10. DRIVER PROPAGATION DELAY vs  
TEMPERATURE (ISL8487E, ISL81487L)  
FIGURE 11. DRIVER SKEW vs TEMPERATURE  
(ISL8487E, ISL81487L)  
30  
28  
5
4
|t  
- t  
PHLY PLHZ|  
26  
24  
22  
20  
18  
16  
3
2
1
0
|t  
- t  
PLHY PHLZ|  
t
PLHY  
t
PHLZ  
t
PLHZ  
|CROSSING PT. OF Y& Z- CROSSING PT. OF Y& Z|  
t
PHLY  
-25  
-40  
0
50  
85  
-40  
0
50  
85  
25  
75  
-25  
25  
75  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
FIGURE 12. DRIVER PROPAGATION DELAY vs  
FIGURE 13. DRIVER SKEW vs TEMPERATURE  
TEMPERATURE (ISL81487E)  
(ISL81487E)  
5
0
5
0
R
= 54, C = 100pF  
L
DI  
DI  
DIFF  
R
= 54, C = 100pF  
L
DIFF  
5
0
5
0
RO  
ISL81487L  
RO  
RO  
ISL81487L  
5
0
5
0
ISL8487E  
RO  
ISL8487E  
4
4
B/Z  
A/Y  
A/Y  
B/Z  
3
3
2
2
1
0
1
0
TIME (400ns/DIV)  
TIME (400ns/DIV)  
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,  
LOW TO HIGH (ISL8487E, ISL81487L)  
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS,  
HIGH TO LOW (ISL8487E, ISL81487L)  
FN6051.6  
11  
ISL8487E, ISL81487L, ISL81487E  
Typical Performance Curves V = 5V, T = 25°C, ISL8487E, ISL81487L and ISL81487E;  
CC  
A
Unless Otherwise Specified (Continued)  
R
= 54, C = 100pF  
L
R
= 54, C = 100pF  
DIFF  
DIFF  
L
5
0
5
0
DI  
DI  
5
0
5
0
RO  
RO  
4
4
B/Z  
A/Y  
A/Y  
B/Z  
3
3
2
1
0
2
1
0
TIME (20ns/DIV)  
TIME (20ns/DIV)  
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS,  
LOW TO HIGH (ISL81487E)  
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS,  
HIGH TO LOW (ISL81487E)  
Die Characteristics  
SUBSTRATE POTENTIAL (POWERED UP):  
GND  
TRANSISTOR COUNT:  
518  
PROCESS:  
Si Gate CMOS  
FN6051.6  
12  
ISL8487E, ISL81487L, ISL81487E  
Dual-In-Line Plastic Packages (PDIP)  
E8.3 (JEDEC MS-001-BA ISSUE D)  
N
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE  
E1  
INDEX  
AREA  
INCHES  
MILLIMETERS  
1 2  
3
N/2  
SYMBOL  
MIN  
-
MAX  
0.210  
-
MIN  
-
MAX  
5.33  
-
NOTES  
-B-  
A
A1  
A2  
B
4
-A-  
D
E
0.015  
0.115  
0.014  
0.045  
0.008  
0.355  
0.005  
0.300  
0.240  
0.39  
2.93  
0.356  
1.15  
0.204  
9.01  
0.13  
7.62  
6.10  
4
BASE  
0.195  
0.022  
0.070  
0.014  
0.400  
-
4.95  
0.558  
1.77  
0.355  
10.16  
-
-
PLANE  
A2  
A
-C-  
C
-
SEATING  
PLANE  
L
C
L
B1  
C
8, 10  
D1  
B1  
eA  
-
A
A
1
D1  
e
D
5
eC  
C
eB  
B
D1  
E
5
0.010 (0.25) M  
B S  
0.325  
8.25  
6
NOTES:  
E1  
e
0.280  
7.11  
5
1. Controlling Dimensions: INCH. In case of conflict between  
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
-
English and Metric dimensions, the inch dimensions control.  
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
-
0.430  
-
10.92  
7
3. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication No. 95.  
L
0.115  
0.150  
2.93  
3.81  
4
9
4. Dimensions A, A1 and L are measured with the package seated  
N
8
8
in JEDEC seating plane gauge GS-3.  
Rev. 0 12/93  
5. D, D1, and E1 dimensions do not include mold flash or protru-  
sions. Mold flash or protrusions shall not exceed 0.010 inch  
(0.25mm).  
e
6. E and  
are measured with the leads constrained to be per-  
A
-C-  
pendicular to datum  
.
7. e and e are measured at the lead tips with the leads uncon-  
B
C
strained. e must be zero or greater.  
C
8. B1 maximum dimensions do not include dambar protrusions.  
Dambar protrusions shall not exceed 0.010 inch (0.25mm).  
9. N is the maximum number of terminal positions.  
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,  
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch  
(0.76 - 1.14mm).  
FN6051.6  
13  
ISL8487E, ISL81487L, ISL81487E  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
N
INDEX  
0.25(0.010)  
M
L
B M  
H
AREA  
INCHES MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
-
1
2
3
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
3
h x 45°  
D
4
-C-  
0.050 BSC  
1.27 BSC  
-
α
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
6
0.25(0.010) M  
C
A M B S  
N
α
8
8
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Rev. 1 6/05  
Publication Number 95.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6051.6  
14  

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