ISL8491EIB-T [INTERSIL]
+-15kV ESD Protected, 5V, Low Power, High Speed and Slew Rate Limited, Full Duplex, RS-485/RS-422 Transceivers; + -15kV的ESD保护，+ 5V ，低功耗，高速和限摆率，全双工， RS - 485 / RS -422收发器
| 型号： | ISL8491EIB-T |
| 厂家： | 
Intersil |
| 描述： | +-15kV ESD Protected, 5V, Low Power, High Speed and Slew Rate Limited, Full Duplex, RS-485/RS-422 Transceivers |
| 文件： | 总13页 (文件大小：525K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL8488E, ISL8489E, ISL8491E
®
Data Sheet
October 20, 2004
FN6073.3
±15kV ESD Protected, 5V, Low Power,
High Speed and Slew Rate Limited, Full
Duplex, RS-485/RS-422 Trans ceivers
Features
• RS-485 I/O Pin ESD Protection . . . . . . . . . . . . . ±15kV HBM
- Class 3 ESD Level on all Other Pins . . . . . . >7kV HBM
The ISL8488E, ISL8489E, ISL8491E devices are ESD
protected, BiCMOS, 5V powered, single transceivers that
meet both the RS-485 and RS-422 standards for balanced
communication. Each driver output and receiver input is
protected against ±15kV ESD strikes, without latch-up.
Unlike competitive versions, these Intersil devices are
specified for 10% tolerance supplies (4.5V to 5.5V).
• High Data Rates (ISL8491E) . . . . . . . . . . . up to 10Mbps
• Slew Rate Limited for Error Free Data Transmission
(ISL8488E, ISL8489E)
• Single Unit Load Allows up to 32 Devices on the Bus
(See ISL4489E, ISL4491E for 256 Devices on Bus)
• Low Quiescent Current:
- 120µA (ISL8488E)
- 140µA (ISL8489E)
- 370µA (ISL8491E)
These devices are configured for full duplex (separate Rx
input and Tx output pins) applications, so they are ideal for
RS-422 networks requiring high ESD tolerance on the bus
pins. The ISL8488E is an 8 lead version without Rx and Tx
output enables. The other two versions include Rx and Tx
output enable pins in a standard 14 lead pinout.
• -7V to +12V Common Mode Input Voltage Range
• Three-State Rx and Tx Outputs (Except ISL8488E)
• Full Duplex Pinout
The ISL8488E, ISL8489E utilize slew rate limited drivers
which reduce EMI, and minimize reflections from improperly
terminated transmission lines, or unterminated stubs in
multidrop and multipoint applications.
• Operates from a Single +5V Supply (10% Tolerance)
• Current Limiting and Thermal Shutdown for Driver
Overload Protection
Data rates up to 10Mbps are achievable by using the
ISL8491E, which features higher slew rates.
• Pb-free available (RoHS Compliant)
The devices present a “single unit load” to the RS-485 bus,
which allows a total of 32 transmitters and receivers on the
network. For “1/8 unit load” versions (256 devices on the
bus), please refer to the ISL4489E, ISL4491E data sheet.
Applications
• Factory Automation
• Security Networks
• Building Environmental Control Systems
• Industrial/Process Control Networks
• Level Translators (e.g., RS-232 to RS-422)
• RS-232 “Extension Cords”
Receiver (Rx) inputs feature a “fail-safe if open” design,
which ensures a logic high Rx output if Rx inputs are floating.
Driver (Tx) outputs are short circuit protected, even for
voltages exceeding the power supply voltage. Additionally,
on-chip thermal shutdown circuitry disables the Tx outputs to
prevent damage if power dissipation becomes excessive.
TABLE 1. SUMMARY OF FEATURES
PART
HALF/FULL
DUPLEX
NO. OF DEVICES
DATA RATE SLEW-RATE
RECEIVER/
QUIESCENT
(µA)
PIN
NUMBER
HIGH ESD?
Yes
ALLOWED ON BUS
(Mbps)
0.25
0.25
10
LIMITED?
DRIVER ENABLE?
I
COUNT
CC
120
ISL8488E
ISL8489E
ISL8491E
Full
Full
Full
32
32
32
Yes
No
Yes
Yes
8
Yes
Yes
140
370
14
14
Yes
No
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
ISL8488E, ISL8489E, ISL8491E
Ordering Information
Pinouts
ISL8488E (SOIC)
PART NO. *
(BRAND)
TEMP.
TOP VIEW
RANGE (°C)
PACKAGE
8 Ld SOIC
PKG. DWG. #
ISL8488EIB
(8488EIB)
-40 to 85
-40 to 85
M8.15
V
1
8
7
6
5
A
B
Z
CC
R
RO
DI
2
3
ISL8488EIBZA
(8488EIBZ,
See Note)
8 Ld SOIC
(Pb-free)
M8.15
D
GND
4
Y
ISL8489EIB
-40 to 85
-40 to 85
14 Ld SOIC
M14.15
M14.15
ISL8489EIBZ
(See Note)
14 Ld SOIC
(Pb-free)
ISL8489E, ISL8491E (SOIC)
TOP VIEW
ISL8491EIB
-40 to 85
-40 to 85
14 Ld SOIC
M14.15
M14.15
NC
RO
1
2
3
4
5
6
7
14 V
CC
ISL8491EIBZ
(See Note)
14 Ld SOIC
(Pb-free)
13 NC
12 A
11 B
10 Z
R
D
RE
*Add “-T” suffix to part number for tape and reel packaging.
DE
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
DI
GND
GND
9
8
Y
NC
Truth Tables (For ISL8488E, only the DE = 1 and RE = 0 entries are valid)
TRANSMITTING
RECEIVING
INPUTS
OUTPUTS
INPUTS
OUTPUT
RE
X
DE
1
DI
1
Z
0
1
Y
RE
0
DE
X
A-B
≥ +0.2V
≤ -0.2V
Inputs Open
X
RO
1
0
1
X
1
0
0
X
0
1
X
0
X
High-Z
High-Z
0
X
1
X
High-Z
Pin Descriptions
PIN
FUNCTION
RO
RE
DE
DI
Receiver output: If A > B by at least 0.2V, RO is high; If A < B by 0.2V or more, RO is low; RO = High if A and B are unconnected (floating).
Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is low.
Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI forces output Y high and output Z low.
Ground connection.
GND
A
±15kV HBM ESD Protected, Noninverting receiver input.
B
±15kV HBM ESD Protected, Inverting receiver input.
Y
±15kV HBM ESD Protected, Noninverting driver output.
Z
±15kV HBM ESD Protected, Inverting driver output.
V
System power supply input (4.5V to 5.5V).
CC
NC
No Connection.
FN6073.3
2
ISL8488E, ISL8489E, ISL8491E
Typical Operating Circuit
ISL8488E
+5V
+5V
+
+
0.1µF
0.1µF
1
1
V
CC
V
CC
R
A
B
8
7
Y
Z
T
5
6
2
3
RO
DI
3
2
DI
R
D
R
6
5
Z
Y
T
B
A
7
8
RO
R
D
GND
GND
4
4
ISL8489E, ISL8491E
+5V
+5V
+
+
0.1µF
0.1µF
14
14
V
CC
V
CC
R
A
B
12
11
Y
T
9
DI
2
5
RO
R
Z
D
10
3
4
RE
DE
4
3
DE
RE
R
10
9
Z
Y
T
B
A
11
12
5
DI
RO
2
R
D
GND
6, 7
GND
6, 7
FN6073.3
3
ISL8488E, ISL8489E, ISL8491E
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 1)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
θ
JA
(°C/W)
170
128
CC
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V
Input/Output Voltages
+0.5V)
CC
A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +12.5V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to (V
Short Circuit Duration
+0.5V)
CC
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C,
A
CC
CC
Note 2
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
(°C)
MIN
TYP
MAX UNITS
DC CHARACTERISTICS
Driver Differential V
Driver Differential V
(no load)
V
V
Full
Full
Full
Full
-
2
-
3
V
V
V
V
V
OUT
OUT
OD1
OD2
CC
-
(with load)
R = 50Ω (RS-422) (Figure 1)
R = 27Ω (RS-485) (Figure 1)
R = 27Ω or 50Ω (Figure 1)
1.5
-
2.3
0.01
5
Change in Magnitude of Driver
Differential V for Complementary
∆V
0.2
OD
OUT
Output States
Driver Common-Mode V
V
R = 27Ω or 50Ω (Figure 1)
R = 27Ω or 50Ω (Figure 1)
Full
Full
-
-
-
3
V
V
OUT
Change in Magnitude of Driver
Common-Mode V for
OC
∆V
0.01
0.2
OC
OUT
Complementary Output States
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
V
DE, DI, RE
DE, DI, RE
DI
Full
Full
Full
Full
Full
Full
Full
Full
25
2
0.8
-2
-40
-
-
-
-
V
V
IH
V
-
IL
I
-
2
µA
µA
mA
mA
µA
V
IN1
DE, RE (Note 6)
-
40
1
Input Current (A, B) (Note 5)
I
DE = 0V, V = 0V or 4.5 V = 12V
-
IN2
CC
IN
to 5.5V
V
= -7V
-0.8
-100
-0.2
-
-
-
IN
Driver Three-State Output Current (Y, Z)
Receiver Differential Threshold Voltage
Receiver Input Hysteresis
I
DE = 0V, -7V ≤ V ≤ 12V (Note 6)
-
100
0.2
-
OZD
O
V
-7V ≤ V
≤ 12V
-
TH
CM
= 0V
∆V
V
70
mV
V
TH
CM
Receiver Output High Voltage
Receiver Output Low Voltage
V
I
I
= -4mA, V = 200mV
ID
Full
Full
Full
Full
Full
Full
Full
Full
3.5
-
-
-
OH
O
O
V
= 4mA, V = 200mV
ID
-
-
0.4
±1
-
V
OL
Receiver Three-State Output Current
Receiver Input Resistance
I
RE = V , 0.4V ≤ V ≤ 2.4V (Note 6)
CC
-
µA
kΩ
µA
µA
µA
mA
OZR
O
R
-7V ≤ V
≤ 12V
12
-
-
IN
CM
ISL8488E, DI = 0V or V
No-Load Supply Current (Note 3)
I
120
140
370
-
140
190
460
250
CC
CC
ISL8489E, DE, DI, RE = 0V or V
ISL8491E, DE, DI, RE = 0V or V
-
CC
CC
-
Driver Short-Circuit Current,
I
DE = V , -7V ≤ V or V ≤ 12V (Note 4)
CC
35
OSD1
Y
Z
V
= High or Low
O
Receiver Short-Circuit Current
I
0V ≤ V ≤ V
CC
Full
7
-
85
mA
OSR
O
FN6073.3
4
ISL8488E, ISL8489E, ISL8491E
Electrical Specifications Test Conditions: V = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at V
= 5V, T = 25°C,
A
CC
CC
Note 2 (Continued)
TEMP
PARAMETER
SYMBOL
TEST CONDITIONS
(°C)
MIN
TYP
MAX UNITS
SWITCHING CHARACTERISTICS (ISL8488E, ISL8489E)
Driver Input to Output Delay
Driver Output Skew
t
, t
PLH PHL
R
R
R
C
C
C
C
= 54Ω, C = 100pF (Figure 2)
Full
Full
Full
Full
Full
Full
Full
Full
25
250
-
400
160
600
1000
860
660
640
500
60
2000
800
2000
2000
2000
3000
3000
2000
-
ns
ns
DIFF
DIFF
DIFF
L
t
= 54Ω, C = 100pF (Figure 2)
L
SKEW
t , t
Driver Differential Rise or Fall Time
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable from Output High
Driver Disable from Output Low
Receiver Input to Output Delay
= 54Ω, C = 100pF (Figure 2)
250
250
250
300
300
250
-
ns
R
F
L
t
= 100pF, SW = GND (Figure 3, Note 6)
ns
ZH
L
L
L
L
t
= 100pF, SW = V
(Figure 3, Note 6)
ns
ZL
CC
= 15pF, SW = GND (Figure 3, Note 6)
= 15pF, SW = V (Figure 3, Note 6)
t
ns
HZ
t
ns
LZ
, t
CC
t
(Figure 4)
(Figure 4)
ns
PLH PHL
Receiver Skew | t
- t
PLH PHL
|
t
ns
SKD
Receiver Enable to Output High
Receiver Enable to Output Low
Receiver Disable from Output High
Receiver Disable from Output Low
Maximum Data Rate
t
C
C
C
C
= 15pF, SW = GND (Figure 5, Note 6)
Full
Full
Full
Full
Full
-
10
50
ns
ZH
L
L
L
L
t
= 15pF, SW = V
(Figure 5, Note 6)
-
10
50
ns
ZL
CC
= 15pF, SW = GND (Figure 5, Note 6)
= 15pF, SW = V (Figure 5, Note 6)
t
-
10
50
ns
HZ
t
-
10
50
ns
LZ
CC
f
250
-
-
kbps
MAX
SWITCHING CHARACTERISTICS (ISL8491E)
Driver Input to Output Delay
Driver Output Skew
t
, t
PLH PHL
R
R
R
C
C
C
C
= 54Ω, C = 100pF (Figure 2)
Full
Full
Full
Full
Full
Full
Full
Full
25
13
-
24
3
50
10
25
70
70
70
70
150
-
ns
ns
DIFF
DIFF
DIFF
L
t
= 54Ω, C = 100pF (Figure 2)
L
SKEW
t , t
Driver Differential Rise or Fall Time
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable from Output High
Driver Disable from Output Low
Receiver Input to Output Delay
= 54Ω, C = 100pF (Figure 2)
5
-
12
14
14
44
21
90
5
ns
R
F
L
t
= 100pF, SW = GND (Figure 3)
ns
ZH
L
L
L
L
t
= 100pF, SW = V
(Figure 3)
-
ns
ZL
CC
= 15pF, SW = GND (Figure 3)
= 15pF, SW = V (Figure 3)
t
-
ns
HZ
t
-
ns
LZ
, t
CC
t
(Figure 4)
(Figure 4)
30
-
ns
PLH PHL
Receiver Skew | t
- t
PLH PHL
|
t
ns
SKD
Receiver Enable to Output High
Receiver Enable to Output Low
Receiver Disable from Output High
Receiver Disable from Output Low
Maximum Data Rate
t
C
C
C
C
= 15pF, SW = GND (Figure 5)
Full
Full
Full
Full
Full
-
9
50
50
50
50
-
ns
ZH
L
L
L
L
t
= 15pF, SW = V
(Figure 5)
-
9
ns
ZL
CC
= 15pF, SW = GND (Figure 5)
= 15pF, SW = V (Figure 5)
t
-
9
ns
HZ
t
-
9
ns
LZ
CC
f
10
-
Mbps
MAX
ESD PERFORMANCE
RS-485 Pins (A, B, Y, Z)
All Other Pins
Human Body Model
25
25
-
-
±15
>±7
-
-
kV
kV
NOTES:
2. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
3. Supply current specification is valid for loaded drivers when DE = 0V.
4. Applies to peak current. See “Typical Performance Curves” for more information.
5. Devices meeting these limits are denoted as “single unit load (1 UL)” transceivers. The RS-485 standard allows up to 32 Unit Loads on the bus.
6. Not applicable to the ISL8488E.
FN6073.3
5
ISL8488E, ISL8489E, ISL8491E
Test Circuits and Waveforms
R
DE
V
CC
Z
DI
V
D
OD
Y
V
R
AND V
DI
OC
FIGURE 1. DRIVER V
OD
OC
3V
0V
1.5V
1.5V
PHL
t
t
PLH
C
= 100pF
= 100pF
L
V
OH
DE
DI
50%
50%
50%
50%
V
OUT (Y)
OUT (Z)
CC
Z
Y
V
OL
R
DIFF
D
t
t
PLH
PHL
C
L
V
OH
SIGNAL
GENERATOR
V
OL
+V
OD
90%
10%
90%
10%
t
DIFF OUT (Y - Z)
-V
OD
t
R
F
SKEW = |t
(Y or Z) - t
(Z or Y)|
PHL
PLH
FIGURE 2A. TEST CIRCUIT
FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FN6073.3
6
ISL8488E, ISL8489E, ISL8491E
Test Circuits and Waveforms (Continued)
DE
3V
0V
Z
Y
500Ω
V
DI
CC
DE
1.5V
1.5V
HZ
D
GND
SW
SIGNAL
GENERATOR
C
L
t
ZH
t
OUTPUT HIGH
2.3V
V
OH
V
- 0.5V
OH
OUT (Y, Z)
OUT (Y, Z)
0V
PARAMETER OUTPUT
RE
DI
SW
GND
C
L
(pF)
t
t
ZL
t
Y/Z
Y/Z
Y/Z
Y/Z
X
X
X
X
1/0
0/1
1/0
0/1
15
15
LZ
HZ
V
CC
OL
t
V
LZ
CC
GND
2.3V
t
100
100
V
+ 0.5V
ZH
OL
V
OUTPUT LOW
t
V
CC
ZL
FIGURE 3A. TEST CIRCUIT
FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8488E)
RE
B
A
3V
0V
15pF
A
1.5V
1.5V
PHL
+1.5V
RO
R
t
t
PLH
V
CC
SIGNAL
GENERATOR
50%
50%
RO
0V
FIGURE 4B. MEASUREMENT POINTS
FIGURE 4A. TEST CIRCUIT
FIGURE 4. RECEIVER PROPAGATION DELAY
RE
B
3V
0V
1kΩ
RE
V
CC
GND
1.5V
1.5V
HZ
RO
R
SW
SIGNAL
A
GENERATOR
15pF
t
ZH
t
OUTPUT HIGH
V
OH
V
- 0.5V
OH
RO
RO
1.5V
0V
PARAMETER
DE
X
X
X
X
A
SW
GND
t
+1.5V
-1.5V
+1.5V
-1.5V
t
ZL
t
HZ
LZ
V
t
V
CC
LZ
CC
GND
V
CC
1.5V
t
t
ZH
V
+ 0.5V
OL
V
OL
ZL
OUTPUT LOW
FIGURE 5A. TEST CIRCUIT
FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER ENABLE AND DISABLE TIMES (EXCLUDING ISL8488E)
FN6073.3
7
ISL8488E, ISL8489E, ISL8491E
Data Rate, Cables, and Terminations
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a point-
to-multipoint (multidrop) standard, which allows only one
driver and up to 10 (assuming one unit load devices)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (any combination
of drivers and receivers) on each bus. To allow for multipoint
operation, the RS-485 spec requires that drivers must handle
bus contention without sustaining any damage.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
RS-485/422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 10Mbps
are limited to lengths of a few hundred feet, while the
250kbps versions can operate at full data rates with lengths
in excess of 1000’.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Proper termination is imperative, when using the 10Mbps
devices, to minimize reflections. Short networks using the
250kbps versions need not be terminated, but, terminations
are recommended unless power dissipation is an overriding
concern. In point-to-point, or point-to-multipoint (single driver
on bus) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs
Receiver Features
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems require
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
These devices utilize a differential input receiver for
maximum noise immunity and common mode rejection.
Input sensitivity is ±200mV, as required by the RS-422 and
RS-485 specifications.
Receiver input resistance surpasses the RS-422 spec of
4kΩ, and meets the RS-485 “Unit Load” requirement of 12kΩ
minimum.
Built-In Driver Overload Protection
As stated previously, the RS-485 spec requires that drivers
survive worst case bus contentions undamaged. The
ISL84XXE devices meet this requirement via driver output
short circuit current limits, and on-chip thermal shutdown
circuitry.
Receiver inputs function with common mode voltages as
great as ±7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. Additionally, these devices utilize a
foldback circuit which reduces the short circuit current, and
thus the power dissipation, whenever the contending voltage
exceeds either supply.
All the receivers include a “fail-safe if open” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating).
Receivers easily meet the data rate supported by the
corresponding driver. ISL8489E/91E receiver outputs are
three-statable via the active low RE input.
Driver Features
In the event of a major short circuit condition, ISL84XXE
devices also include a thermal shutdown feature that
disables the drivers whenever the die temperature becomes
excessive. This eliminates the power dissipation, allowing
the die to cool. The drivers automatically reenable after the
die temperature drops about 15 degrees. If the contention
persists, the thermal shutdown/reenable cycle repeats until
the fault is cleared. Receivers stay operational during
thermal shutdown.
The RS-485/422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at
least 2V across a 100Ω load (RS-422). The drivers feature
low propagation delay skew to maximize bit width, and to
minimize EMI. ISL8489E/91E driver outputs are three-
statable via the active high DE input.
The ISL8488E/89E driver outputs are slew rate limited to
further reduce EMI, and to minimize reflections in
unterminated or improperly terminated networks. Data rates
on these slew rate limited versions are a maximum of
250kbps. Outputs of ISL8491E drivers are not limited, so
faster output transition times allow data rates of at least
10Mbps.
ESD Protection
All pins on these devices include class 3 Human Body Model
(HBM) ESD protection structures, but the RS-485 pins
(driver outputs and receiver inputs) incorporate advanced
structures allowing them to survive ESD events in excess of
FN6073.3
8
ISL8488E, ISL8489E, ISL8491E
±15kV HBM. The RS-485 pins are particularly vulnerable to
protect without allowing any latch-up mechanism to activate,
and without degrading the RS-485 common mode range of
-7V to +12V. This built-in ESD protection eliminates the need
for board level protection structures (e.g., transient
suppression diodes), and the associated, undesirable
capacitive load they present.
ESD damage because they typically connect to an exposed
port on the exterior of the finished product. Simply touching
the port pins, or connecting a cable, can cause an ESD
event that might destroy unprotected ICs. These new ESD
structures protect the device whether or not it is powered up,
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified
CC
A
3.6
3.4
3.2
3
90
80
70
60
50
40
30
R
= 100Ω
DIFF
2.8
2.6
2.4
2.2
2
R
= 54Ω
DIFF
20
10
0
0
1
2
3
4
5
-40
0
50
85
-25
25
75
DIFFERENTIAL OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 6. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE
FIGURE 7. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
400
160
140
120
100
80
60
40
20
0
-20
-40
-60
ISL8491E
350
300
250
200
150
100
50
ISL8491E, DE = X, RE = X
Y OR Z = LOW
ISL8488E/89E
Y OR Z = HIGH
ISL8489E, DE = X, RE = X
ISL8491E
0
-80
-100
ISL8488E/89E
ISL8488E
-120
-7 -6
-4
-2
2
4
6
8
10
12
-40
0
50
85
-25
25
75
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE
FIGURE 9. SUPPLY CURRENT vs TEMPERATURE
FN6073.3
9
ISL8488E, ISL8489E, ISL8491E
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified (Continued)
CC
A
250
200
150
100
50
750
700
650
600
550
500
450
t
PLHY
t
|t
- t |
PLHY PHLZ
PLHZ
|t |
- t
PHLY PLHZ
t
PHLY
t
PHLZ
|CROSS PT. OF Y↑ & Z↓ - CROSS PT. OF Y↓ & Z↑|
0
-40
0
50
85
-40
0
50
85
-25
25
TEMPERATURE (°C)
75
-25
25
TEMPERATURE (°C)
75
FIGURE 10. DRIVER PROPAGATION DELAY vs
TEMPERATURE (ISL8488E/89E)
FIGURE 11. DRIVER SKEW vs TEMPERATURE (ISL8488E/89E)
30
28
5
4
|t
- t
PHLY PLHZ|
26
24
3
2
1
0
|t
- t
PLHY PHLZ|
t
PLHY
22
20
18
16
t
PHLZ
t
PLHZ
|CROSSING PT. OF Y↑ & Z↓ - CROSSING PT. OF Y↓ & Z↑|
t
PHLY
-25
-40
0
50
85
-40
0
50
85
25
75
-25
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 12. DRIVER PROPAGATION DELAY vs
FIGURE 13. DRIVER SKEW vs TEMPERATURE
TEMPERATURE (ISL8491E)
(ISL8491E)
R
= 54Ω, C = 100pF
L
DIFF
R
= 54Ω, C = 100pF
L
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
4
4
Z
Y
Y
3
2
3
Z
2
1
0
1
0
TIME (400ns/DIV)
TIME (400ns/DIV)
FIGURE 14. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL8488E/89E)
FIGURE 15. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL8488E/89E)
FN6073.3
10
ISL8488E, ISL8489E, ISL8491E
Typical Performance Curves V = 5V, T = 25°C; Unless Otherwise Specified (Continued)
CC
A
R
= 54Ω, C = 100pF
L
R
= 54Ω, C = 100pF
L
DIFF
DIFF
5
0
5
0
DI
DI
5
0
5
0
RO
RO
4
4
Y
Z
Y
3
2
3
Z
2
1
0
1
0
TIME (20ns/DIV)
TIME (20ns/DIV)
FIGURE 16. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL8491E)
FIGURE 17. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL8491E)
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
518
PROCESS:
Si Gate BiCMOS
FN6073.3
11
ISL8488E, ISL8489E, ISL8491E
Small Outline Plas tic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
INDEX
0.25(0.010)
M
L
B M
H
AREA
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
-
9
SEATING PLANE
A
0.0075
0.1890
0.1497
0.0098
0.1968
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
C
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
8
8
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 0 12/93
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN6073.3
12
ISL8488E, ISL8489E, ISL8491E
Small Outline Plas tic Packages (SOIC)
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
INCHES
MILLIMETERS
-B-
SYMBOL
MIN
MAX
MIN
1.35
0.10
0.33
0.19
8.55
3.80
MAX
1.75
0.25
0.51
0.25
8.75
4.00
NOTES
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
0.0688
0.0098
0.020
-
1
2
3
L
-
SEATING PLANE
A
9
0.0075
0.3367
0.1497
0.0098
0.3444
0.1574
-
-A-
o
h x 45
D
3
4
-C-
α
µ
0.050 BSC
1.27 BSC
-
e
A1
C
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
B
0.10(0.004)
5
0.25(0.010) M
C A M B S
L
6
N
α
14
14
7
NOTES:
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Rev. 0 12/93
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension“E”doesnotincludeinterleadflashorprotrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6073.3
13
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