ISL9021_技术文档

ISL9021

®

Datasheet

January 14, 2010

FN6867.2

250mA Single LDO with Low I , Low

Q

Features

Noise and High PSRR LDO

• High Performance LDO with 250mA guaranteed

continuous output current

The ISL9021 is a single LDO providing high performance

low input voltage, high PSRR. It delivers guaranteed

continuous 250mA load current and is stable with 1µF to

4.7µF of output capacitance (±30%) with an ESR range of

5mΩ to 400mΩ.

• Input Voltage Range: 1.5V to 5.5V

• Output Voltage Range: 0.9V to 3.3V

• High PSRR: 75dB @ 10kHz, 50dB @ 1MHz

• Low Quiescent Current: 35µA

The input voltage range for the ISL9021 is between 1.5V to

5.5V and the output voltage comes in many fixed voltage

options with ±1.8% accuracy over temperature, line and load

ranges. Other output voltage within the range of 0.9V to 3.3V

may be available upon request. The ISL9021 has typical

PSRR of 75dB @ 10kHz and 50dB @ 1MHz.

• Dropout Voltage: <150mV @ 250mA

• Stable with 1µF to 4.7µF Output Capacitance (±30%) with

an ESR range of 5mΩ to 400mΩ

• ±1.8% Output Accuracy Over-Temperature/Load/Line

• Soft-start Limits Input Current Surge During Enable

• Current Limit and Overheat Protection

The reverse current protection feature prevents current from

flowing back to the power source when the output voltage is

pulled higher than the input.

• -40°C to +85°C Operating Temperature Range

The ISL9021 is offered in tiny 4-bump 1.155mmx0.975mm

WLCSP and 1.6mmx1.6mm 6 Ld µTDFN packages.

• Available in 1.155mmx0.975mm 4-bump WLCSP

Package and 1.6mmx1.6mm 6 Ld µTDFN

Pinouts

• Pb-free (RoHS compliant)

ISL9021

(6 LD 1.6x1.6 µTDFN)

TOP VIEW

Applications

• PDAs, Cell Phones and Smart Phones

• Portable Instruments, MP3 Players

• Handheld Devices including Medical Handhelds

6

5

4

VIN

NC

EN

1

2

3

VO

NC

GND

ISL9021

(4 BALL 1.155x0.975 WLCSP)

TOP VIEW

GND

EN

VOUT

VIN

A2

A1

B2

B1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

All other trademarks mentioned are the property of their respective owners.

ISL9021

Ordering Information

PACKAGE

Tape & Reel

(Pb-free)

PART NUMBER

PART

MARKING

V

Voltage

TEMP RANGE

(°C)

PACKAGE

DWG. #

O

(Note 2)

1.1

2.1

1.3

1.0

1.5

1.8

2.5

2.7

2.8

2.85

3.0

3.3

1.85

2.6

1.6

1.9

1.2

0.9

1.1

2.1

1.3

1.0

1.5

1.8

2.5

2.7

2.8

2.85

3.0

3.3

1.85

2.6

1.6

1.9

1.2

0.9

ISL9021II1Z-T (Notes 1, 3)

ISL9021II2Z-T (Notes 1, 3)

ISL9021II3Z-T (Notes 1, 3)

ISL9021II4Z-T (Notes 1, 3)

ISL9021IIBZ-T (Notes 1, 3)

ISL9021IICZ-T (Notes 1, 3)

ISL9021IIFZ-T (Notes 1, 3)

ISL9021IIGZ-T (Notes 1, 3)

ISL9021IIJZ-T (Notes 1, 3)

ISL9021IIKZ-T (Notes 1, 3)

ISL9021IIMZ-T (Notes 1, 3)

ISL9021IINZ-T (Notes 1, 3)

ISL9021IIPZ-T (Notes 1, 3)

ISL9021IIRZ-T (Notes 1, 3)

ISL9021IISZ-T (Notes 1, 3)

ISL9021IITZ-T (Notes 1, 3)

ISL9021IIWZ-T (Notes 1, 3)

ISL9021IIYZ-T (Notes 1, 3)

ISL9021IRU1Z-T (Notes 1, 4)

ISL9021IRU2Z-T (Notes 1, 4)

ISL9021IRU3Z-T (Notes 1, 4)

ISL9021IRU4Z-T (Notes 1, 4)

0211

0212

-40 to +85

4 Ball WLCSP

6 Ld µTDFN

W2x2.4

0213

0214

021B

021C

021F

021G

021J

021K

021M

021N

021P

021R

021S

021T

021W

021Y

S1

W2x2.4

L6.1.6x1.6

S9

S3

S0

ISL9021IRUBZ-T (Notes 1, 4) S4

ISL9021IRUCZ-T (Notes 1, 4) S6

ISL9021IRUFZ-T (Notes 1, 4) T0

ISL9021IRUGZ-T (Notes 1, 4) T2

ISL9021IRUJZ-T (Notes 1, 4)

T3

ISL9021IRUKZ-T (Notes 1, 4) T4

ISL9021IRUMZ-T (Notes 1, 4) T5

ISL9021IRUNZ-T (Notes 1, 4) R8

ISL9021IRUPZ-T (Notes 1, 4) S7

ISL9021IRURZ-T (Notes 1, 4) T1

ISL9021IRUSZ-T (Notes 1, 4) S5

ISL9021IRUTZ-T (Notes 1, 4) S8

ISL9021IRUWZ-T (Notes 1, 4) S2

ISL9021IRUYZ-T (Notes 1, 4) R9

NOTES:

1. Please refer to TB347 for details on reel specifications.

2. For other output voltages, contact Intersil Marketing.

3. These Intersil Pb-free WLCSP and BGA packaged products employ special Pb-free material sets; molding compounds/die attach materials and

SnAgCu - e1 solder ball terminals, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free

WLCSP and BGA packaged products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

4. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu

plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products

are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

FN6867.2

January 14, 2010

2

ISL9021

Absolute Maximum Ratings

Thermal Information

Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.5V

All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)V

Thermal Resistance (Typical, Note 5)

θ

(°C/W)

JA

135.64

140

4 Ball WLCSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6 Lead µTDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Junction Temperature Range . . . . . . . . . . . . . . . . .-40°C to +125°C

Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Recommended Operating Conditions

Ambient Temperature Range (T ) . . . . . . . . . . . . . . .-40°C to +85°C

A

Supply Voltage (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 to 5.5V

IN

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

NOTE:

5. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

JA

Tech Brief TB379.

Electrical Specifications T = -40°C to +85°C; V = (V + 0.5V) to 5.5V with a minimum V of 1.5V; C = 1µF; C = 1µF; Parameters

A

IN

O

IN

O

with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits

established by characterization and are not production tested.

PARAMETER

DC CHARACTERISTICS

Supply Voltage

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX UNIT

V

1.5

5.5

1.5

V

IN

V

Undervoltage Lockout

V

Rising

Falling

1.425

IN

UVLO+

IN

Threshold

V

1.3 1.375

V

UVLO-

Ground Current

I

Output Enabled; I = 0; V = 1.5V to 5.5V

IN

35

0.1

50

µA

%

DD

O

Shutdown Current

Output Voltage Accuracy

I

V

= 5.5V, EN = Low, I = 0

1.0

DDS

IN

O

= V + 0.5V to 5.5V, I = 1mA to 150mA, T = +25°C

-0.8

+0.8

+1.8

O

J

= V + 0.5V to 5.5V, I = 1mA to 150mA, T = -40°C to +125°C -1.8

O

J

Maximum Output Current

Internal Current Limit

I

Continuous

250

260

mA

mV

°C

MAX

I

LIM

Dropout Voltage (Notes 6, 7)

Thermal Shutdown Temperature

Thermal Shutdown Hysteresis

AC CHARACTERISTICS

Ripple Rejection (Note 6)

V

I

= 250mA; V > 1.8V

150

160

20

250

DO

SD

O

T

°C

V

= 4.5V, V = 3.3V @ 1kHz

60

75

dB

IN

O

= 4.5V, V = 3.3V @ 10kHz

O

= 4.5V, V = 3.3V @ 1MHz

50

O

Output Noise Voltage (Note 6)

= 4.2V, T = +25°C, BW = 10Hz to 100kHz, I = 10mA

8.5*V

µV

RMS

A

O

DEVICE START-UP CHARACTERISTICS

Device Enable Time

t

Time from assertion of the EN pin to when the output voltage

250

30

600

60

µs

EN

reaches 95% of the V (nom)

O

LDO Soft-start Ramp Rate

EN LOGIC CHARACTERISTICS

Input Low Voltage

t

Slope of linear portion of LDO output voltage ramp during start-up

µs/V

SSR

V

0.4

0.1

V

IL

Input High Voltage

V

1.1

IH

Input Leakage Current

NOTES:

I

µA

IL, IH

6. Limits established by characterization and are not production tested.

7. Dropout voltage is measured as V - V , when V is 4% lower than the value of V ; when V = V + 0.5V.

IN IN

O

FN6867.2

January 14, 2010

3

ISL9021

Typical Operating Performance

45

40

35

30

25

20

15

10

5

45

T = +85°C

T = +45°C

T = ROOM TEMP

T = +85°C

T = ROOM TEMP

T = +45°C

40

35

30

25

T = 0°C

20

T = -25°C

15

T = -40°C

10

5

0

1.5

2.5

3.5

4.5

5.5

1.5

2.5

3.5

4.5

5.5

INPUT VOLTAGE (V)

FIGURE 2. QUIESCENT CURRENT vs INPUT VOLTAGE

(V = 1.85V)

FIGURE 1. QUIESCENT CURRENT vs INPUT VOLTAGE

(V = 0.9V)

OUT

1.95

1.90

1.85

1.80

1.75

1.70

1.65

1.60

50

40

30

20

10

0

T = +45°C

T = ROOM TEMP

T = +85°C

+25°C

-40°C

+85°C

T = 0°C

T = -25°C

T = -40°C

-10

3.5

4.0

4.5

5.0

5.5

6.0

0

50

100

150

200

250

300

INPUT VOLTAGE (V)

Io (mA)

FIGURE 4. LOAD REGULATION vs TEMPERATURE

(V = 1.85V)

FIGURE 3. QUIESCENT CURRENT vs INPUT VOLTAGE

(V = 3.3V)

OUT

2.00

1.95

1.90

1.85

1.80

1.75

1.70

1.65

1.60

1.55

1.50

3.5

3.4

3.3

3.2

3.1

3.0

2.9

2.8

+25°C

+85°C

-40°C

0

50

100

150

Io (mA)

200

250

300

2.5

3.5

4.5

(V)

5.5

6.5

V

IN

FIGURE 6. LOAD REGULATION vs TEMPERATURE

(V = 3.3V)

FIGURE 5. LINE REGULATION vs TEMPERATURE

(V = 1.85V)

OUT

FN6867.2

January 14, 2010

4

ISL9021

Typical Operating Performance (Continued)

1.05

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65

0.60

3.50

3.45

+25°C

3.40

+85°C

+25°C

3.35

3.30

3.25

3.20

3.15

3.10

3.05

3.00

+85°C

-40°C

3.5

4.0

4.5

5.0

5.5

6.0

0

50

100

150

200

250

300

Io (mA)

V

(V)

IN

FIGURE 8. LOAD REGULATION vs TEMPERATURE

FIGURE 7. LINE REGULATION vs TEMPERATURE

(V = 3.3V)

(V

= 0.9V)

OUT

V

= 2.7V

IN

1.00

0.95

0.90

0.85

0.80

0.75

0.70

C

= 1µF

OUT

V

= 1.85V

OUT

V

OUT

+25°C

+85°C

-40°C

I

OUT

I

= 1mA TO 250mA

OUT

3.0

3.5

4.0

4.5

(V)

5.0

5.5

6.0

V

IN

FIGURE 9. LINE REGULATION vs TEMPERATURE

FIGURE 10. LOAD TRANSIENT RESPONSE

(V

= 0.9V)

OUT

V

= 2.7V

IN

C

= 4.7µF

OUT

V

= 1.85V

OUT

V

OUT

I

OUT

I

= 1mA TO 250mA

OUT

FIGURE 11. LOAD TRANSIENT RESPONSE

FIGURE 12. ENABLE FUNCTION (V = 3.6V, V

IN

= 1.85V,

OUT

C

1µF)

OUT

FN6867.2

January 14, 2010

5

ISL9021

Typical Operating Performance (Continued)

-20

V

= 4.5VDC + 50mVAC

IN

-30

-40

-50

-60

-70

-80

-90

C

= 1µF

OUT

I

= 10mA

O

I

= 0A

1k

O

100

10k

100k

1M

FREQUENCY (Hz)

FIGURE 13. POWER SUPPLY REJECTION vs FREQUENCY

Pin Descriptions

NAME

DESCRIPTION

VIN

GND

EN

IC Supply/LDO Input. Connect a 1µF capacitor to GND.

System ground pin.

LDO Enable. When this signal goes high, the LDO is turned on.

LDO Output. Connect a 1µF to 4.7µF capacitor to GND.

VO

E-Pad

For µTDFN package option only. Connect it to the system ground.

Typical Application

ISL9021

VIN (1.5V TO 5.5V)

VOUT

VIN

EN

VO

ON

ENABLE

OFF

GND

C1

C2

C1, C2: 1µF X5R CERAMIC CAPACITOR

FN6867.2

January 14, 2010

6

ISL9021

Block Diagram

PASS ELEMENT

VIN

EN

VOUT

SHORT-CIRCUIT

PROTECTION

THERMAL PROTECTION

SOFT-START

TEMP

SENSOR

CONTROL

LOGIC

VOLTAGE

AND

REFERENCE

GENERATOR

+

BANDGAP

GND

FN6867.2

January 14, 2010

7

ISL9021

The ISL9021’s reverse current protection is intended to

block reverse conduction if output voltage is higher than

input voltage.

Functional Description

The ISL9021 is a high performance low-dropout regulator

(LDO) with 250mA sourcing capability. The extra low ground

current makes this part a good choice for handheld product

applications. The device also incorporates overcurrent,

thermal shutdown, reverse current protections, and soft-start

features.

Input and Output Capacitors

The ISL9021 provides a linear regulator that has low

quiescent current, fast transient response, and overall stable

operation across the recommended operating conditions. A

ceramic capacitor (X5R or X7R) with a capacitance of 1µF to

4.7µF with an ESR up to 400mΩ is suitable for the ISL9021

to maintain its output stability. The ground connection of the

output capacitor should be routed directly to the GND pin of

the device, and also placed close to the IC. Similarly for the

input capacitor, usually a 1µF ceramic capacitor (X5R or 7R)

is suitable for most cases, but if a large, fast rising load

transient condition is expected, a higher value input

capacitor may be necessary to achieve satisfactory

performance.

Thermal shutdown protects the device against overheating.

Soft-start limits the start-up input current surges. In some

applications, the output voltage may be externally pulled

higher than input, or the input voltage could be connected to

ground, or connected to some voltage lower than the output

side. The ISL9021 features reverse current protection; that

can block the reverse current from output to input.

Enable Control

The ISL9021 has an enable pin. When EN is low, the IC is in

shutdown mode. In this condition, all on-chip circuits are off,

and the device draws minimum current, typically less than

0.1µA(typ). Driving this pin high will turn on the device.

Board Layout Recommendations

A good PCB layout is an important step to achieve good

performance. It is recommended to design the board with

separate ground planes for input and output, and connect

both ground planes at the GND pin of the IC. Consideration

should be taken when placing the components and routing

the trace to minimize the ground impedance, and keep the

parasitic inductance low. Usually the input/output capacitors

should be placed as close to the IC as possible with a good

ground connection.

LDO Protections

The ISL9021 offers several protection functions, making it ideal

for use in battery-powered applications.The ISL9021 provides

short-circuit protection by limiting the output current at current

limit of 260mA(min). If the short circuit lasts long enough, the

die temperature increases, and the over-temperature protection

circuit will shut down the output. When the die temperature

reaches about +145°C, thermal protection starts to work with

output being loaded with at least 50mA. Once the die

temperature drops to about +110°C, the LDO will resume

operation beginning with a soft-start.

FN6867.2

January 14, 2010

8

ISL9021

Wafer Level Chip Scale Package

(WLCSP 0.4mm Ball Pitch)

W2x2.4

2x2 ARRAY 4 BALL WAFER LEVEL CHIP SCALE PACKAGE

SYMBOL

MILLIMETERS

0.44 Min, 0.495 Nom, 0.55 Max

0.190 ±0.030

D

A

A1

A2

b

0.305 ±0.025

E

0.270 ±0.030

D

1.155 ±0.020

D1

E

0.400 BASIC

PIN 1

TOP VIEW

0.975 ±0.020

E1

e

0.400 BASIC

SD

SE

0.200 BASIC

0.00 BASIC

NUMBER OF BUMPS: 4

Rev. 2 6/08

A2

NOTES:

1. All dimensions are in millimeters.

A

A1

b

SIDE VIEW

e ( D1 )

2

SE

e ( E1 )

1

B

A

b

SD

BOTTOM VIEW

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6867.2

January 14, 2010

9

ISL9021

Package Outline Drawing

L6.1.6x1.6

6 LEAD ULTRA THIN DUAL FLAT NO-LEAD COL PLASTIC PACKAGE (UTDFN COL)

Rev 1, 11/07

2X 1.00

1.60

A

PIN #1 INDEX AREA

6

4X 0.50

PIN 1

INDEX AREA

B

1

3

5X 0 . 40 ± 0 . 1

1X 0.5 ±0.1

1.60

(4X)

0.15

4

6

0.10 M C A B

TOP VIEW

4

0.25 +0.05 / -0.07

BOTTOM VIEW

( 6X 0 . 25 )

SEE DETAIL "X"

( 1X 0 .70 )

0 . 55 MAX

C

0.10

BASE PLANE

SEATING PLANE

C

0.08

C

( 1 . 4 )

SIDE VIEW

0 . 2 REF

C

( 5X 0 . 60 )

0 . 00 MIN.

0 . 05 MAX.

DETAIL "X"

( 4X 0 . 5 )

TYPICAL RECOMMENDED LAND PATTERN

NOTES:

1. Dimensions are in millimeters.

Dimensions in ( ) for Reference Only.

2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.

3. Unless otherwise specified, tolerance : Decimal ± 0.05

4. Dimension b applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

Tiebar shown (if present) is a non-functional feature.

5.

6.

The configuration of the pin #1 identifier is optional, but must be

located within the zone indicated. The pin #1 identifier may be

either a mold or mark feature.

FN6867.2

January 14, 2010

10


型号：	ISL9021
厂家：	Intersil
描述：	250mA Single LDO with Low IQ, Low Noise and High PSRR LDO 250毫安单LDO具有低IQ ，低噪声，高PSRR LDO
文件：	总10页 (文件大小：183K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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