X9015UM8IZ [INTERSIL]
Low Noise, Low Power Volatile; 低噪声,低功耗挥发型号: | X9015UM8IZ |
厂家: | Intersil |
描述: | Low Noise, Low Power Volatile |
文件: | 总11页 (文件大小:308K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
X9015
®
Low Noise, Low Power, Volatile
Data Sheet
September 15, 2005
FN8157.1
Single Digitally Controlled (XDCP™)
Potentiometer
Features
• 32 taps
The Intersil X9015 is a 32 tap potentiometer that is volatile.
The device consists of a string of 31 resistors that can be
programmed to connect the R /V wiper output with any of
the nodes between the connecting resistors. The connection
point of the wiper is determined by information
communicated to the device on the 3-wire port. The 3-wire
port changes the tap position by a falling edge on the
increment pin. The direction the wiper moves is determined by
the state of the up/down pin. The wiper position at power up is
Tap #15.
• Three-wire up/down serial interface
• V
= 2.7V–5V
• Operating I = 50µA max.
CC
W
W
CC
• Standby current = 1µA max.
• R = 10kΩ, 50kΩ, 100kΩ
TOTAL
• Packages SOIC-8, MSOP-8
• Pb-free plus anneal available (RoHS compliant)
The X9015 can be used in a wide variety of applications that
require a digitally controlled variable resistor to set analog
values.
Pinout
SOIC/MSOP
V
CC
CS
R /V
INC
U/D
1
2
3
4
8
7
6
5
X9015
R /V
H
H
L
L
V
R
/V
W
SS
W
Block Diagram
U/D
INC
5-Bit
R /V
H
31
H
Up/Down
Counter
V
(Supply Voltage)
Control
CS
CC
30
29
28
R /V
Up/Down
(U/D)
Increment
(INC)
H
H
One
of
R
/V
W
W
Thirty
Two
Transfer
Gates
Resistor
Array
Device Select
(CS)
Decoder
R /V
L
L
2
V
(Ground)
SS
1
0
Control
General
V
CC
SS
Circuitry
V
R /V
L
W
L
/V
R
W
Detailed
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1
X9015
Ordering Information
TEMPERATURE
RANGE (°C)
PART NUMBER
X9015WS8*
PART MARKING
V
LIMITS (V)
R
(kΩ)
PACKAGE
8 Ld SOIC
CC
TOTAL
5 ±10
10
0 to 70
0 to 70
X9015WS8Z* (Note)
X9015UM8*
X9015W Z
ABB
8 Ld SOIC (Pb-free)
8 Ld MSOP
50
0 to 70
X9015UM8Z* (Note)
X9015UM8I*
DCF
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
ABD
-40 to 85
-40 to 85
0 to 70
X9015UM8IZ* (Note)
X9015US8*
DCD
8 Ld MSOP (Pb-Free)
8 Ld SOIC
X9015U
X9015U Z
X9015U I
X9015U Z I
X9015W F
X9015US8Z* (Note)
X9015US8I*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
-40 to 85
-40 to 85
0 to 70
X9015US8IZ* (Note)
X9015WS8-2.7*
8 Ld SOIC (Pb-free)
8 Ld SOIC
2.7-5.5
10
50
X9015WS8Z-2.7* (Note) X9015W Z F
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
X9015TS8-2.7
X9015T F
ABC
0 to 70
X9015UM8-2.7*
0 to 70
8 Ld MSOP
X9015UM8Z-2.7* (Note)
X9015UM8I-2.7*
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
ABE
-40 to 85
-40 to 85
0 to 70
X9015UM8IZ-2.7* (Note) DCE
8 Ld MSOP (Pb-free)
8 Ld SOIC
X9015US8-2.7*
X9015U F
X9015US8Z-2.7* (Note) X9015U Z F
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
X9015US8I-2.7*
X9015U G
-40 to 85
-40 to 85
X9015US8IZ-2.7* (Note) X9015U Z G
8 Ld SOIC (Pb-free)
* Add “T1” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN8157.1
September 15, 2005
2
X9015
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
Pin Descriptions
R /V and R /V
H
L
H
L
The high (R /V ) and low (R /V ) terminals of the X9015 are
H
L
H
L
equivalent to the fixed terminals of a mechanical
potentiometer. The minimum voltage is V and the
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
SS
L
maximum is V . The terminology of R /V and R /V
H
CC
L
H
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input, and not
the voltage potential on the terminal.
connected to the wiper for t (INC to V change). The
IW
W
R
value for the device can temporarily be reduced by a
TOTAL
significant amount if the wiper is moved several positions.
RW/VW
When the device is powered-down, the wiper position is lost.
When power is restored, the wiper is set to Tap #15.
R /V is the wiper terminal and is equivalent to the movable
W
w
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 200Ω at
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the device is
selected and enabled to respond to the U/D and INC inputs.
HIGH to LOW transitions on INC will increment or decrement
(depending on the state of the U/D input) a five bit counter.
The output of this counter is decoded to select one of thirty
two wiper positions along the resistive array.
V
=5V. At power up the wiper position is at Tap #15.
L
CC
L
(V /R =Tap #0).
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the tap position is incremented or decremented.
Increment (INC)
The system may select the X9015, move the wiper and
deselect the device. The new wiper position will be maintained
until changed by the system or until a power-up/down cycle.
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the U/D
input.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Chip Select (CS)
The device is selected when the CS input is LOW. When CS
is returned HIGH while the INC input is also HIGH the X9015
will be placed in the low power standby mode until the device
is selected once again.
Mode Selection
CS
INC
U/D
MODE
L
H
Wiper up
Pin Names
L
L
X
X
Wiper down
SYMBOL
DESCRIPTION
*
H
L
Standby mode
Normal mode
R /V
High terminal
Wiper terminal
Low terminal
Ground
H
H
W
L
L
R
/V
W
R /V
L
Symbol Table
V
SS
WAVEFORM
INPUTS
OUTPUTS
V
Supply voltage
CC
Must be
steady
Will be
steady
U/D
INC
CS
Up/Down control input
Increment control input
Chip select control input
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Principles Of Operation
There are two sections of the X9015: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single electronic
switch connecting a point on the resistor array to the wiper
output. The resistor array is comprised of 31 individual
resistors connected in series.
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
FN8157.1
September 15, 2005
3
X9015
Absolute Maximum Ratings
Operating Conditions
Temperature Range
Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, V , V and
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
H
L
V
with respect to V
. . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
Supply Voltage (V )
CC
CC
SS
∆V = |V –V | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
X9015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V±10%
X9015-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
H
L
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . .300°C
I
(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7.5mA
W
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
)
Potentiometer Specifications Over recommended operating conditions unless otherwise stated
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
MIN.
–20
0
TYP.
MAX.
UNIT
R
End to End Resistance Variation
+20
%
TOTAL
V
V /R Terminal Voltage
V
V
V
VH
H
H
CC
CC
V
V /R Terminal Voltage
0
V
mW
VL
L
L
Power Rating
R
≤1kΩ
10
TOTAL
R
R
Wiper Resistance
Wiper Resistance
Wiper Current
I
= 1mA, V
= 1mA, V
= 5V
200
400
400
Ω
W
W
W
W
W
CC
CC
I
= 2.7V
1000
3.75
Ω
I
-3.75
mA
Noise
Ref: 1kHz
-120
3
dBV
Resolution
%
Absolute Linearity (Note 1)
Relative Linearity (Note 2)
V
V
–V
w(n)(actual) w(n)(expected)
-1
+1
MI (Note 3)
MI (Note 3)
ppm/°C
ppm/°C
pF
–[V
]
w(n)+MI
-0.2
+0.2
w(n+1)
R
Temperature Coefficient
±300
TOTAL
Ratiometric Temperature Coefficient
Potentiometer Capacitances
±20
C /C /C
W
See circuit #3
10/10/25
H
L
Power Up and Down Requirements
The are no restrictions on the power-up or power-down conditions of V
and the voltages applied to the potentiometer pins
≥ V , V , V . The V ramp rate spec is
CC
is always more positive than or equal to V , V , and V , i.e., V
provided that V
CC
H
L
W
CC
H
L
W
CC
always in effect.
NOTES:
1. Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (V
2. Relative Linearity is a measure of the error in step size between
(actual)–V
(expected)) = ±1 Ml Maximum.
w(n)
w(n)
taps = V
– [V
+ Ml] = ±0.2 Ml.
W
(n+1)
3. 1 Ml = Minimum Increment = R
w(n)
/31.
TOT
4. Typical values are for T = 25°C and nominal supply voltage.
A
5. This parameter is periodically sampled and not 100% tested.
FN8157.1
September 15, 2005
4
X9015
)
D.C. Operating Specifications Over recommended operating conditions unless otherwise specified
TYP.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
(Note 4)
MAX.
UNITS
I
V
V
active current (increment)
CS = V , U/D = V or V and
50
µA
CC1
CC
CC
IL IL IH
INC = 0.4V @ max. t
CYC
I
active current (Store) (EEPROM
Store)
CS = V , U/D = V or V and
IH IL IH
400
1
µA
µA
CC2
INC = V @ max. t
IH WR
I
Standby supply current
CS = V
– 0.3V, U/D and
CC
SB
INC = V or V
– 0.3V
SS
CC
I
CS, INC, U/D input leakage current
CS, INC, U/D input HIGH voltage
CS, INC, U/D input LOW voltage
V
= V to V
±10
µA
V
LI
IN
SS
CC
V
V
x 0.7
V
+ 0.5
CC
IH
CC
-0.5
V
V
x 0.1
V
IL
CC
10
C
(Note 5) CS, INC, U/D input capacitance
V
= 5V, V = V , T = 25°C,
pF
IN
CC
IN
SS
A
f = 1MHz
TEST CIRCUIT #1
TEST CIRCUIT #2
CIRCUIT #3 SPICE MACRO MODEL
R
V /R
TOTAL
H
H
V /R
H
H
R
R
L
H
Test Point
C
L
C
W
C
H
10pF
V
S
Test Point
V
/R
W
W
25pF
V
/R
Force
Current
W
W
10pF
V /R
L
L
V /R
R
L
L
W
A.C. Conditions of Test
Input pulse levels
0V to 3V
10ns
Input rise and fall times
Input reference levels
1.5V
FN8157.1
September 15, 2005
5
X9015
A.C. Operating Specifications Over recommended operating conditions unless otherwise specified
SYMBOL
PARAMETER
MIN.
100
100
2.9
1
TYP. (Note 6)
MAX.
UNIT
ns
t
CS to INC setup
Cl
lD
DI
t
INC HIGH to U/D change
U/D to INC setup
ns
t
µs
t
INC LOW period
µs
lL
lH
lC
t
t
INC HIGH period
1
µs
INC inactive to CS inactive
CS deselect time (NO STORE)
CS deselect time (STORE)
INC to Vw change
1
µs
t
t
100
10
ns
CPH
CPH
ms
µs
t
1
5
5
IW
t
INC cycle time
4
µs
CYC
t
t
(Note 7) INC input rise and fall time
500
5
µs
R, F
(Note 7)
t
Power up to wiper stable
(Note 7) V power-up rate
µs
PU
t
V
0.2
50
10
V/ms
ms
R
CC
CC
Store cycle
t
WR
A.C. Timing
CS
t
CYC
(store)
t
CPH
t
t
t
t
CI
IL
IH
IC
90%
90%
INC
U/D
10%
t
t
t
t
R
ID
DI
F
t
IW
(8)
MI
V
W
NOTES:
6. Typical values are for T = 25°C and nominal supply voltage.
A
7. This parameter is periodically sampled and not 100% tested.
8. MI in the A.C. timing diagram refers to the minimum incremental change in the V output due to a change in the wiper position.
W
FN8157.1
September 15, 2005
6
X9015
Performance Characteristics (Typical)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
0
10
20 30
40 50
60 70
80 90 100 110 120 130 140 150 160 170 180 190 200
FREQUENCY (kHz)
FIGURE 1. TYPICAL NOISE
10000
9800
9600
9400
9200
9000
8800
8600
8400
8200
8000
-55
-45 -35 -25 -15 -5
5
35 45
C°
85 95 105 115 125
15
25
55 65
TEMPERATURE75
FIGURE 2. TYPICAL RTOTAL VS. TEMPERATURE
0
-50
-100
-150
-200
-250
-300
-350
PPM
-55 -45 -35 -25 -15
-5
5
15
25
35
45
55
65
75
85
95
105 115 125 °C
TEMPERATURE
FIGURE 3. TYPICAL TOTAL RESISTANCE TEMPERATURE COEFFICIENT
FN8157.1
7
September 15, 2005
X9015
Performance Characteristics (Typical) (Continued)
800
700
600
500
400
300
200
100
0
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
V
= 2.7V
CC
TAP
FIGURE 4. TYPICAL WIPER RESISTANCE
40.0%
30.0%
20.0%
10.0%
0.0%
-10.0%
-20.0%
-30.0%
-40.0%
0
3
6
9
12
15
18
21
24
27
30
Tap
FIGURE 5. TYPICAL ABSOLUTE% ERROR PER TAP POSITION
20.0%
15.0%
10.0%
5.0%
0.0%
-5.0%
-10.0%
-15.0%
-20.0%
0
3
6
9
12
15
18
21
24
27
30
TAP
FIGURE 6. TYPICAL RELATIVE% ERROR PER TAP POSITION
FN8157.1
8
September 15, 2005
X9015
Applications Information
Electronic digitally controlled potentiometers provide two powerful application advantages: (1) the variability and reliability of a
solid-state potentiometer, and (2) the flexibility of computer-based digital controls.
Basic Configurations of Electronic Potentiometers
V
R
V
R
V /R
H
H
V
/R
W
W
V /R
L
L
I
Three terminal potentiometer;
variable voltage divider
Two terminal variable resistor;
variable current
Basic Circuits
Noninverting Amplifier
Buffered Reference Voltage
Cascading Techniques
R
+5V
1
+V
+V
LM308A
+V
V
+
–
S
+5V
V
O
V
/R
W
W
OP-07
+
–
V
REF
–5V
X
V
OUT
V
/R
W
W
R
2
+V
–5V
= V
R
1
V
/R
W
V
W
OUT
W
(a)
(b)
V
= (1+R /R )V
2 1 S
O
Voltage Regulator
317
Offset Voltage Adjustment
Comparator with Hysteresis
R
R
2
1
V
V (REG)
O
IN
LT311A
V
S
V
–
+
S
V
O
R
1
100kΩ
–
+
V
O
I
adj
TL072
R
2
10kΩ
10kΩ
+12V
R
R
1
2
V
V
= {R /(R +R )} V (max)
1 1 2 O
UL
LL
10kΩ
= {R /(R +R )} V (min)
1
1
2
O
V
(REG) = 1.25V (1+R /R )+I
R
O
2
1
adj 2
-12V
(for additional circuits see AN115)
FN8157.1
September 15, 2005
9
X9015
MSOP Packaging Information
8-Lead Miniature Small Outline Gull Wing Package Type M
0.118 ± 0.002
(3.00 ± 0.05)
0.012 + 0.006 / -0.002
0.0256 (0.65) Typ.
(0.30 + 0.15 / -0.05)
R 0.014 (0.36)
0.118 ± 0.002
(3.00 ± 0.05)
0.030 (0.76)
0.0216 (0.55)
7° Typ.
0.036 (0.91)
0.032 (0.81)
0.040 ± 0.002
0.008 (0.20)
0.004 (0.10)
(1.02 ± 0.05)
0.0256" Typical
0.025"
Typical
0.150 (3.81)
Ref.
0.193 (4.90)
Ref.
0.007 (0.18)
0.005 (0.13)
0.220"
0.020"
Typical
FOOTPRINT
8 Places
NOTE: ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
FN8157.1
10
September 15, 2005
X9015
SOIC Packaging Information
8-Lead Plastic Small Outline Gull Wing Package Type S
0.150 (3.80)
0.158 (4.00)
0.228 (5.80)
0.244 (6.20)
Pin 1 Index
Pin 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.050 (1.27)
0.010 (0.25)
0.020 (0.50)
0.050" Typical
X 45°
0.050"
Typical
0° - 8°
0.0075 (0.19)
0.010 (0.25)
0.250"
0.016 (0.410)
0.037 (0.937)
0.030"
Typical
FOOTPRINT
8 Places
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8157.1
11
September 15, 2005
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RENESAS
X9015US8
50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 32 POSITIONS, PDSO8, PLASTIC, MS-012AA, SOIC-8
ROCHESTER
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