X9116WM8ZT1 [INTERSIL]

Digitally Controlled Potentiometer; 数字控制电位器
X9116WM8ZT1
型号: X9116WM8ZT1
厂家: Intersil    Intersil
描述:

Digitally Controlled Potentiometer
数字控制电位器

电位器
文件: 总9页 (文件大小:199K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
X9116  
Low Noise, Low Power, Low Cost  
®
Data Sheet  
September 26, 2006  
FN8160.2  
Digitally Controlled Potentiometer  
(XDCP™)  
Features  
• Solid-state nonvolatile  
The Intersil X9116 is a digitally controlled nonvolatile  
potentiometer designed to be used in trimmer applications.  
The pot consists of 15 equal resistor segments that connect  
to the wiper pin through programmable CMOS switches. The  
tap position is programmed through a 3-wire up/down serial  
port. The last position of the wiper is stored in a nonvolatile  
memory location which is recalled at the time of power up of  
the device.  
• 16 wiper taps  
• 3-wire up/down serial interface  
• V  
CC  
= 2.7V and 5V  
• Active current < 50µA max.  
• Standby current < 1µA max.  
• R  
= 10kΩ  
• Packages: 8 Ld MSOP, 8 Ld SOIC  
TOTAL  
The wiper moves through sequential tap positions with  
inputs on the serial port. A falling edge on INC (bar) causes  
the tap position to increment one position up or down based  
on whether the U/D (bar) pin is held high or low.  
• Pb-free plus anneal available (RoHS compliant)  
Pinout  
The X9116 can be used in many applications requiring a  
variable resistance. In many cases it can replace a  
mechanical trimmer and offers many advantages such as  
temperature and time stability as well as the reliability of a  
solid state solution.  
SOIC/MSOP  
V
INC  
U/D  
1
2
3
4
8
7
6
5
CC  
CS  
X9116  
V /R  
L
V /R  
L
H
H
V
V
/R  
W
SS  
W
Block Diagram  
V
(Supply Voltage)  
CC  
R /V  
H
H
Up/Down  
(U/D)  
Control  
and  
Memory  
Increment  
(INC)  
R
/V  
W
W
Device Select  
(CS)  
R /V  
L
L
V
(Ground)  
SS  
R
-R Resistance  
L
W
General  
15  
10kΩ  
R
H
14  
9.34kΩ  
13  
8.68kΩ  
* kΩ  
*
3
2.08kΩ  
1.42kΩ  
2
1
760Ω  
100Ω  
0
R
L
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
X9116  
Ordering Information  
PART NUMBER  
V
LIMITS  
(V)  
R
TEMP. RANGE  
(°C)  
PKG.  
DWG. #  
CC  
TOTAL  
(kΩ)  
(BRAND)  
PART MARKING  
PACKAGE  
X9116WM8T1  
AAZ  
AKY  
5V ±10%  
10  
0 to +70  
0 to +70  
8 Ld MSOP Tape and Reel M8.118  
X9116WM8ZT1 (Note)  
8 Ld MSOP (Pb-free)  
Tape and Reel  
M8.118  
X9116WM8I*  
AFL  
-40 to +85  
-40 to +85  
0 to +70  
8 Ld MSOP  
M8.118  
M8.118  
M8.15  
M8.15  
M8.15  
M8.15  
M8.118  
M8.118  
M8.118  
M8.118  
M8.15  
M8.15  
M8.15  
M8.15  
X9116WM8IZ* (Note)  
X9116WS8*  
DCG  
8 Ld MSOP (Pb-free)  
8 Ld SOIC  
X9116W  
X9116W Z  
X9116W I  
X9116W ZI  
AFK  
X9116WS8Z* (Note)  
X9116WS8I*  
0 to +70  
8 Ld SOIC (Pb-free)  
8 Ld SOIC  
-40 to +85  
-40 to +85  
0 to +70  
X9116WS8IZ* (Note)  
X9116WM8-2.7**  
8 Ld SOIC (Pb-free)  
8 Ld MSOP  
-2.7-5.5  
X9116WM8Z-2.7* (Note)  
X9116WM8I-2.7*  
AOJ  
0 to +70  
8 Ld MSOP (Pb-free)  
8 Ld MSOP  
ABA  
-40 to +85  
-40 to +85  
0 to +70  
X9116WM8IZ-2.7* (Note)  
X9116WS8-2.7*  
AKS  
8 Ld MSOP (Pb-free)  
8 Ld SOIC  
X9116W F  
X9116W ZF  
X9116W G  
X9116W ZG  
X9116WS8Z-2.7* (Note)  
X9116WS8I-2.7*  
0 to +70  
8 Ld SOIC (Pb-free)  
8 Ld SOIC  
-40 to +85  
-40 to +85  
X9116WS8IZ-2.7* (Note)  
8 Ld SOIC (Pb-free)  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and  
100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering  
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free  
requirements of IPC/JEDEC J STD-020.  
*Add "T1" suffix for tape and reel.  
**Add “T2” suffix for tape and reel.  
Chip Select (CS)  
Pin Descriptions  
The device is selected when the CS input is LOW. The  
current counter value is stored in nonvolatile memory when  
CS is returned HIGH while the INC input is also HIGH. After  
the store operation is complete the X9116 will be placed in  
the low power standby mode until the device is selected  
once again.  
V /R and V /R  
L
H
H
L
The high (V /R ) and low (V /R ) terminals of the X9116  
H
H
L
L
are equivalent to the fixed terminals of a mechanical  
potentiometer. The minimum voltage is V and the  
SS  
maximum is V  
.
CC  
VW/RW  
Pin Descriptions  
R /R is the wiper terminal and is equivalent to the movable  
w
w
terminal of a mechanical potentiometer. The position of the  
wiper within the array is determined by the control inputs.  
The wiper terminal series resistance is typically 200Ω to  
SYMBOL  
DESCRIPTION  
V /R  
High Terminal  
H
H
W
L
V
/R  
Wiper Terminal  
Low Terminal  
W
400Ω depending upon V  
.
CC  
V /R  
L
Up/Down (U/D)  
V
Ground  
The U/D input controls the direction of the wiper movement  
and whether the counter is incremented (up) or decremented  
(down).  
SS  
V
Supply Voltage  
Up/Down Control Input  
Increment Control Input  
Chip Select Input  
CC  
U/D  
INC  
CS  
Increment (INC)  
The INC input is negative-edge triggered. Toggling INC will  
move the wiper and either increment or decrement the  
counter in the direction indicated by the logic level on the  
U/D input.  
FN8160.2  
September 26, 2006  
2
X9116  
This procedure allows the system to always power-up to a  
preset value stored in nonvolatile memory; then during  
system operation, minor adjustments could be made. The  
adjustments might be based on user preference, system  
parameter changes due to temperature drift, etc.  
Principles of Operation  
There are three sections of the X9116: the input control,  
counter and decode section; the nonvolatile memory; and  
the resistor array. The input control section operates just like  
an up/down counter. The output of this counter is decoded to  
turn on a single electronic switch connecting a point on the  
resistor array to the wiper output. Under the proper  
conditions the contents of the counter can be stored in  
nonvolatile memory and retained for future use. The resistor  
array is comprised of 15 individual resistors connected in  
series. At either end of the array and between each resistor  
is an electronic switch that transfers the potential at that  
point to the wiper pin.  
The state of U/D may be changed while CS remains LOW.  
This allows the host system to enable the device and then  
move the wiper up and down until the proper trim is attained.  
Mode Selection  
CS  
INC  
U/D  
MODE  
L
H
Wiper Up  
L
L
Wiper Down  
The wiper, when at either fixed terminal, acts like its  
mechanical equivalent and does not move beyond the last  
position. That is, the counter does not wrap around when  
clocked to either extreme.  
H
X
L
X
Store Wiper Position  
Standby Current  
H
X
X
No Store, Return to Standby  
The electronic switches on the device operate in a “make  
before break” mode when the wiper changes tap positions. If  
the wiper is moved several positions, multiple taps are  
Symbol Table  
connected to the wiper for t (INC to V change). The  
IW  
W
WAVEFORM  
INPUTS  
OUTPUTS  
R
value for the device can temporarily be reduced by  
TOTAL  
a significant amount if the wiper is moved several positions.  
Must be  
steady  
Will be  
steady  
When the device is powered-down, the last wiper position  
stored will be maintained in the nonvolatile memory. When  
power is restored, the contents of the memory are recalled  
and the wiper is set to the value last stored.  
May change  
from Low to  
High  
Will change  
from Low to  
High  
May change  
from High to  
Low  
Will change  
from High to  
Low  
Instructions and Programming  
Don’t Care:  
Changes  
Allowed  
Changing:  
State Not  
Known  
The INC, U/D and CS inputs control the movement of the  
wiper along the resistor array. With CS set LOW, the device  
is selected and enabled to respond to the U/D and INC  
inputs. HIGH to LOW transitions on INC will increment or  
decrement (depending on the state of the U/D input) a four  
bit counter. The output of this counter is decoded to select  
one of 16 wiper positions along the resistive array.  
N/A  
Center Line  
is High  
Impedance  
The value of the counter is stored in nonvolatile memory  
whenever CS transitions HIGH while the INC input is also  
HIGH.  
The system may select the X9116, move the wiper, and  
deselect the device without having to store the latest wiper  
position in nonvolatile memory. After the wiper movement is  
performed as described above and once the new position is  
reached, the system must keep INC LOW while taking CS  
HIGH. The new wiper position will be maintained until  
changed by the system or until a power-up/down cycle  
recalls the previously stored data.  
FN8160.2  
September 26, 2006  
3
X9116  
Absolute Maximum Ratings  
Recommended Operating Conditions  
Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Temperature Range  
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C  
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C  
Voltage on CS, INC, U/D, V /R , V /R  
H
H
L
L
and V  
with respect to V . . . . . . . . . . . . . . . . . . . . . -1V to +7V  
Supply Voltage (V ) Limits  
X9116. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%  
X9116-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V  
CC  
ΔV = |V /R -V /R |. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V  
SS  
CC  
H
H
L
L
Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . .+300°C  
I
(10 seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±10.0mA  
W
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
Potentiometer Specifications Over recommended operating conditions unless otherwise stated  
SYMBOL  
PARAMETER  
TEST CONDITIONS/NOTES  
MIN  
TYP  
MAX  
UNIT  
R
End to end resistance variation  
-20  
+20  
%
TOTAL  
V
V /R terminal voltage  
V
V
= 0V  
= 0V  
V
V
V
V
V
V
VH  
H
H
SS  
SS  
SS  
SS  
CC  
CC  
V
V /R terminal voltage  
L L  
VL  
Power rating  
R
= 10kΩ  
10  
mW  
TOTAL  
R
R
Wiper resistance  
Wiper resistance  
Wiper current  
I
I
= 1mA, V  
= 5V  
200  
400  
400  
Ω
W
W
W
W
W
CC  
CC  
= 1mA, V  
= 2.7V  
1000  
+5.0  
Ω
I
-5.0  
mA  
Noise  
Ref: 1kHz  
-120  
6
dBVHz  
%
Resolution  
Absolute linearity (Note 1)  
Relative linearity (Note 2)  
V
V
- V  
-1  
+1  
MI (Note 3)  
MI (Note 3)  
ppm/°C  
ppm/°C  
pF  
w(n)(actual)  
- [V  
w(n)(expected)  
]
-0.2  
+0.2  
w(n+1)  
w(n) + MI  
R
temperature coefficient  
±300  
TOTAL  
Ratiometric temperature coefficient  
Potentiometer capacitances  
±20  
C /C /C  
W
See Circuit #3  
10/10/25  
H
L
NOTES:  
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V  
(actual) - V  
(expected)) = ±1 Ml Maximum.  
w(n)  
w(n)  
2. Relative linearity is a measure of the error in step size between taps = V  
-[V  
+ Ml] = ±0.2 Ml.  
w(n)  
W(n+1 )  
3. 1 Ml = Minimum Increment = R  
/15.  
TOT  
FN8160.2  
September 26, 2006  
4
X9116  
DC Electrical Specifications Over recommended operating conditions unless otherwise specified  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
MIN TYP (Note 4)  
MAX  
UNIT  
I
V
V
active current (Increment)  
CS = V , U/D = V or V and  
150  
µA  
CC1  
CC  
IL IL IH  
INC = 0.4V/2.4V @ max t  
CYC  
I
active current (Store) (EEPROM Store) CS = V , U/D = V or V and  
IH IL IH  
400  
1
µA  
µA  
CC2  
CC  
INC = V @ max t  
IH WR  
I
Standby supply current  
CS = V  
– 0.3V, U/D and INC = V or  
SS  
SB  
CC  
– 0.3V  
V
CC  
I
CS, INC, U/D input leakage current  
CS, INC, U/D input HIGH voltage  
CS, INC, U/D input LOW voltage  
V
= V to V  
SS CC  
±10  
µA  
V
LI  
IN  
V
2V  
V
+ 0.5  
CC  
IH  
V
-0.5  
0.8  
10  
V
IL  
C
(Note 5) CS, INC, U/D input capacitance  
V
= 5V, V = V , T = 25°C,  
IN SS  
pF  
IN  
CC  
A
f = 1MHz  
4. Typical values are for T = +25°C and nominal supply voltage.  
A
5. This parameter is periodically sampled and not 100% tested.  
Endurance And Data Retention  
PARAMETER  
MIN  
UNIT  
Data changes per bit  
Years  
Minimum endurance  
100,000  
100  
Data retention  
Test Circuit #1  
Test Circuit #2  
Circuit #3 SPICE Macro Model  
V /R  
V /R  
H
H
H
H
R
TOTAL  
R
R
H
L
C
L
C
W
V
S
C
Test Point  
H
Test Point  
/R  
10pF  
V
/R  
W
W
V
W
W
Force  
25pF  
Current  
10pF  
V /R  
V /R  
L
L
L
L
R
W
A.C. Conditions of Test  
Input pulse levels  
0V to 3V  
10ns  
Input rise and fall times  
Input reference levels  
1.5V  
FN8160.2  
September 26, 2006  
5
X9116  
DC Electrical Specifications Over recommended operating conditions unless otherwise specified  
SYMBOL  
PARAMETER  
CS to INC setup  
MIN  
100  
100  
2.9  
1
TYP (NOTE 6)  
MAX  
UNIT  
ns  
t
t
Cl  
lD  
DI  
INC HIGH to U/D change  
U/D to INC setup  
ns  
t
µs  
t
INC LOW period  
µs  
lL  
lH  
lC  
t
t
INC HIGH period  
1
µs  
INC inactive to CS inactive  
CS deselect time (STORE)  
INC to Vw change  
1
µs  
t
t
10  
ms  
µs  
CPH  
t
1
5
5
IW  
INC cycle time  
4
µs  
CYC  
t
t
(Note 7)  
INC input rise and fall time  
Power up to wiper stable  
500  
5
µs  
R, F  
t
(Note 7)  
µs  
PU  
t
V
(Note 7)  
V
Power-up rate  
15  
50  
10  
mV/µs  
ms  
R
CC  
CC  
t
Store cycle  
WR  
Power Up and Down Requirements  
There are no restrictions on the power-up or power-down conditions of V  
and the voltages applied to the potentiometer pins  
CC  
provided that V  
is always more positive than or equal to V , V , and V , i.e., V  
V , V , V . The V  
ramp rate spec is  
CC  
H
L
W
CC  
H
L
W
CC  
always in effect.  
A.C. Timing  
CS  
t
CYC  
(store)  
t
t
t
t
t
CPH  
CI  
IL  
IH  
IC  
90%  
90%  
INC  
U/D  
10%  
t
t
t
t
R
ID  
DI  
F
t
IW  
(NOTE 8)  
MI  
V
W
NOTES:  
6. Typical values are for T = +25°C and nominal supply voltage.  
A
7. This parameter is not 100% tested.  
8. MI in the A.C. timing diagram refers to the minimum incremental change in the V output due to a change in the wiper position.  
W
FN8160.2  
September 26, 2006  
6
X9116  
Basic Configurations of Electronic Potentiometers  
V
R
V
R
V
V
H
L
V
/R  
W
W
I
THREE-TERMINAL POTENTIOMETER;  
VARIABLE VOLTAGE DIVIDER  
TWO-TERMINAL VARIABLE RESISTOR;  
VARIABLE CURRENT  
Basic Circuits  
NONINVERTING AMPLIFIER  
BUFFERED REFERENCE VOLTAGE  
CASCADING TECHNIQUES  
R
1
+5V  
+V  
+V  
LM308A  
+V  
V
+
S
+5V  
V
O
V
W
OP-07  
+
V
REF  
-5V  
X
V
OUT  
V
/R  
W
W
R
2
+V  
–5V  
R
1
V
= V /R  
W
V
W
OUT  
W
(a)  
(b)  
V
= (1+R /R )V  
2 1 S  
O
VOLTAGE REGULATOR  
COMPARATOR WITH HYSTERESIS  
V
V
(REG)  
317  
IN  
O
LT311A  
V
+
S
V
O
R
1
I
adj  
R
2
R
R
1
2
V
V
= {R /(R +R )} V (max)  
1 1 2 O  
UL  
LL  
= {R /(R +R )} V (min)  
1 1 2 O  
V
(REG) = 1.25V (1+R /R )+Iadj R  
2 1 2  
O
(FOR ADDITIONAL CIRCUITS, SEE AN115)  
FN8160.2  
September 26, 2006  
7
X9116  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES  
MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
-
1
2
3
L
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
3
h x 45°  
D
4
-C-  
0.050 BSC  
1.27 BSC  
-
α
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
6
0.25(0.010) M  
C
A M B S  
N
α
8
8
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 1 6/05  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
FN8160.2  
September 26, 2006  
8
X9116  
Mini Small Outline Plastic Packages (MSOP)  
N
M8.118 (JEDEC MO-187AA)  
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE  
INCHES  
MILLIMETERS  
E1  
E
SYMBOL  
MIN  
MAX  
MIN  
0.94  
0.05  
0.75  
0.25  
0.09  
2.95  
2.95  
MAX  
1.10  
0.15  
0.95  
0.36  
0.20  
3.05  
3.05  
NOTES  
A
A1  
A2  
b
0.037  
0.002  
0.030  
0.010  
0.004  
0.116  
0.116  
0.043  
0.006  
0.037  
0.014  
0.008  
0.120  
0.120  
-
-B-  
0.20 (0.008)  
INDEX  
AREA  
1 2  
A
B
C
-
-
TOP VIEW  
4X θ  
9
0.25  
(0.010)  
R1  
c
-
R
GAUGE  
PLANE  
D
3
E1  
e
4
SEATING  
PLANE  
L
0.026 BSC  
0.65 BSC  
-
-C-  
4X θ  
L1  
A
A2  
E
0.187  
0.016  
0.199  
0.028  
4.75  
0.40  
5.05  
0.70  
-
L
6
SEATING  
PLANE  
L1  
N
0.037 REF  
0.95 REF  
-
0.10 (0.004)  
-A-  
C
C
b
8
8
7
-H-  
A1  
e
R
0.003  
0.003  
-
-
0.07  
0.07  
-
-
-
D
0.20 (0.008)  
C
R1  
0
-
o
o
o
o
5
15  
5
15  
-
a
SIDE VIEW  
C
L
o
o
o
o
0
6
0
6
-
α
E
1
-B-  
Rev. 2 01/03  
0.20 (0.008)  
C
D
END VIEW  
NOTES:  
1. These package dimensions are within allowable dimensions of  
JEDEC MO-187BA.  
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.  
3. Dimension “D” does not include mold flash, protrusions or gate  
burrs and are measured at Datum Plane. Mold flash, protrusion  
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.  
4. Dimension “E1” does not include interlead flash or protrusions  
- H -  
and are measured at Datum Plane.  
Interlead flash and  
protrusions shall not exceed 0.15mm (0.006 inch) per side.  
5. Formed leads shall be planar with respect to one another within  
0.10mm (0.004) at seating Plane.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. Dimension “b” does not include dambar protrusion. Allowable  
dambar protrusion shall be 0.08mm (0.003 inch) total in excess  
of “b” dimension at maximum material condition. Minimum space  
between protrusion and adjacent lead is 0.07mm (0.0027 inch).  
- B -  
to be determined at Datum plane  
-A -  
10. Datums  
and  
.
- H -  
11. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are for reference only.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN8160.2  
September 26, 2006  
9

相关型号:

X9116WM8ZT13

Digital Potentiometer
RENESAS

X9116WM8ZT7

Digital Potentiometer
RENESAS

X9116WS8

Low Noise, Low Power, Low Cost
INTERSIL

X9116WS8

Digitally Controlled Potentiometer (XDCP)
XICOR

X9116WS8-2.7

Low Noise, Low Power, Low Cost
INTERSIL

X9116WS8-2.7

Digitally Controlled Potentiometer (XDCP)
XICOR

X9116WS8-2.7T1

10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 16 POSITIONS, PDSO8, PLASTIC, MS-012AA, SOIC-8
RENESAS

X9116WS8I

Low Noise, Low Power, Low Cost
INTERSIL

X9116WS8I

Digitally Controlled Potentiometer (XDCP)
XICOR

X9116WS8I-2.7

Low Noise, Low Power, Low Cost
INTERSIL

X9116WS8I-2.7

Digitally Controlled Potentiometer (XDCP)
XICOR

X9116WS8I-2.7

10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 16 POSITIONS, PDSO8, PLASTIC, MS-012AA, SOIC-8
ROCHESTER