X93156WM8I [INTERSIL]
Digitally Controlled Potentiometer; 数字控制电位器
| 型号： | X93156WM8I |
| 厂家： | 
Intersil |
| 描述： | Digitally Controlled Potentiometer |
| 文件： | 总8页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
X93156
®
Data Sheet
September 16, 2005
FN8182.2
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X93156 is a three-terminal digitally controlled
potentiometer (XDCP). The device consists of a resistor
array, wiper switches, a control section, and nonvolatile
memory. The wiper position is controlled by an Up/Down
interface.
Features
• Solid-state potentiometer
• Up/Down interface
• 32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
• 31 resistive elements
- Temperature compensated
- Maximum resistance tolerance of ± 25%
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of the wiper element is controlled by
the CS, U/D, and INC inputs. The position of the wiper can
be stored in nonvolatile memory and then be recalled upon a
subsequent power-up operation.
- Terminal voltage, 0 to V
CC
• Low power CMOS
- VCC = 2.7 V - 5.5 V
The device can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including the programming of bias voltages,
LCD brightness and contrast control as well as the
implementation of ladder networks.
- Active current, 200µA typ.
- Standby current, 2µA max.
• High reliability
- Endurance 200,000 data changes per bit
- Register data retention, 100 years
• RTOTAL value = 12.5kΩ, 50kΩ
• Packages
- 8 Ld MSOP, TDFN
- Pb-free plus anneal available (RoHS compliant)
Pinouts
X93156
X93156
(8 LD MSOP)
(8 LD TDFN)
TOP VIEW
TOP VIEW
8
1
V
CC
INC
U/D
8
7
6
5
INC
U/D
1
2
3
4
V
CC
2
3
4
7
6
CS
CS
X93156
X93156
R
H
R
L
R
H
R
L
V
5
Rw
SS
V
Rw
SS
**Contact factory for TDFN ordering info.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1
X93156
Ordering Information
PART NUMBER
PART MARKING
RTOTAL (kΩ)
TEMP RANGE (°C)
-40 to +85
PACKAGE
8 Ld MSOP
PKG. DWG. #
M8.118
X93156WM8I
12.5
X93156WM8IZ (See Note)
X93156WM8I-2.7*
-40 to +85
8 Ld MSOP (Pb-free)
8 Ld MSOP
M8.118
(AGR)
(AGP)
-40 to +85
M8.118
X93156WM8IZ-2.7* (See Note)
X93156UM8I-2.7*
-40 to +85
8 Ld MSOP (Pb-free)
8 Ld MSOP
M8.118
50
-40 to +85
M8.118
X93156UM8IZ-2.7* (See Note)
-40 to +85
8 Ld MSOP (Pb-free)
M8.118
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add “T1” suffix for tape and reel.
Block Diagram
V
(Supply Voltage)
CC
U/D
INC
CS
5-Bit
Up/Down
Counter
R
31
H
30K
30
29
28
R
H
Up/Down
(U/D)
5-Bit
Nonvolatile
Memory
Control
and
Memory
Increment
(INC)
One
of
Thirty
Two
R
W
R
W
Transfer
Gates
Resistor
Array
Device Select
(CS)
Store and
Control
Recall
Decoder
2
Circuitry
R
L
1
0
V
V
CC
SS
V
(Ground)
SS
R
L
General
Detailed
Pin Descriptions
MSOP, TDFN SYMBOL
BRIEF DESCRIPTION
1
2
3
INC
U/D
RH
Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or
decrement the counter in the direction indicated by the logic level on the U/D input.
Up/Down (U/D). The U/D input controls the direction of the wiper movement and whether the counter is incremented
or decremented.
RH. The RH and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The
minimum voltage is V
and the maximum is V . The terminology of RH and RL references the relative position of
CC
SS
the terminal in relation to wiper movement direction selected by the U/D input.
4
5
VSS
Rw
Ground.
RW. The Rw pin of the X93156 is the wiper terminal of the potentiometer which is equivalent to the movable terminal
of a mechanical potentiometer.
6
7
8
RL
CS
RL. The RH and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The
minimum voltage is V
and the maximum is V . The terminology of RH and RL references the relative position of
CC
SS
the terminal in relation to wiper movement direction selected by the U/D input.
Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile
memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X93156
will be placed in the low power standby mode until the device is selected once again.
VCC
Supply Voltage.
FN8182.2
2
September 16, 2005
X93156
Absolute Maximum Ratings
Thermal Information
Thermal Resistance (Typical, Note 1)
8 Ld MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, R , R and VCC
θJA (°C/W)
190
H
L
with respect to VSS. . . . . . . . . . . . . . . . . . . . . . . . . . .-1V to +6.5V
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . .300°C
Maximum reflow temperature (40s) . . . . . . . . . . . . . . . . . . . . .240°C
Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA
Recommended Operating Conditions
Temperature Range
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage
V
CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V (Note 8)
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; the functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Potentiometer Specifications Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
MIN
9.375
37.5
0
TYP
12.5
50
MAX
15.625
62.5
VCC
1
UNIT
kΩ
kΩ
V
RTOT
End to end resistance
VR
RH, RL terminal voltages
Power rating
mW
(Note 7)
Noise
Ref: 1kHz
(Note 6)
-120
3
dBV
(Note 7)
RW
IW
Wiper Resistance
Wiper Current
1100
±0.6
Ω
mA
%
Resolution
Absolute linearity (Note 2)
V
H(n)(actual)-VH(n)(expected)
H(n+1)-[VH(n)+MI
±1
MI
(Note 4)
Relative linearity (Note 3)
V
]
±0.5
MI
(Note 4)
RTOTAL temperature coefficient
(Note 7)
±35
ppm/°C
CH/CL/CW
Potentiometer capacitances
See circuit #2
10/10/25
pF
(Note 7)
NOTES:
2. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V
1 .. 29 only
(actual)-V
(expected)) = ±1 Ml Maximum. n =
H(n)
H(n)
3. Relative linearity is a measure of the error in step size between taps = V
—[V
+ Ml] = ±0.5 Ml, n = 1 .. 29 only.
H(n)
H(n+1)
4. 1 Ml = Minimum Increment = R
/31.
TOT
5. Typical values are for TA = 25°C and nominal supply voltage.
6. This parameter is periodically sampled and not 100% tested
7. This parameter is not 100% tested.
8. When performing multiple write operations, VCC must not decrease by more than 150mV from it’s initial value.
FN8182.2
3
September 16, 2005
X93156
DC Electrical Specifications Over recommended operating conditions unless otherwise specified.
TYP
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 5)
MAX
UNIT
ICC1
V
active current (Increment)
CS = VIL, U/D = VIL or VIH and INC = 0.4V
@ max. tCYC VCC=3V
50
250
µA
CC
CC
CS = VIL, U/D = VIL or VIH and INC = 0.4V
@ max. tCYC VCC = 5V
200
300
600
1400
1
µA
µA
µA
µA
µA
ICC2
V
active current (Store)
CS = VIH, U/D = VIL or VIH and INC = VIH
max. tWR VCC = 3V
@
(EEPROM Store)
CS = VIH, U/D = VIL or VIH and INC = VIH
max. tWR VCC = 5V
@
ISB
Standby supply current
CS = VCC - 0.3V, U/D and INC = VSS or VCC
- 0.3V VCC = 3V
CS = VCC - 0.3V, U/D and INC = VSS or VCC
- 0.3V VCC = 5V
2
ILI
ILI
CS input leakage current
VIN = VCC
±1
150
µA
µA
µA
µA
V
CS input leakage current
VCC = 3V, CS = 0
VCC = 5V, CS = 0
VIN = VSS to VCC
60
100
200
ILI
CS input leakage current
120
250
ILI
INC, U/D input leakage current
CS, INC, U/D input HIGH voltage
CS, INC, U/D input LOW voltage
CS, INC, U/D input capacitance
±1
VIH
VIL
VCC x 0.7
-0.5
VCC + 0.5
VCC x 0.1
10
V
CIN
(Notes 7, 8)
VCC = 3V, VIN = VSS, TA = 25°C, f = 1MHz
pF
Circuit #2 SPICE Macro Model
Endurance and Data Retention
PARAMETER
Minimum endurance
Data retention
MIN
200,000
100
UNIT
Data changes per bit
Years
R
TOTAL
R
R
L
H
C
L
C
W
C
H
10pF
25pF
Test Circuit #1
10pF
Test Point
V /R
H
H
AC Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
Input reference levels
10ns
1.5V
AC Electrical Specifications Over recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
MIN
100
100
100
1
TYP
MAX
UNIT
tCl
tlD
CS to INC setup
ns
ns
ns
µs
µs
µs
ns
INC HIGH to U/D change
U/D to INC setup
tDI
tlL
INC LOW period
tlH
INC HIGH period
1
tlC
INC Inactive to CS inactive
CS Deselect time (NO STORE)
1
tCPH
250
FN8182.2
September 16, 2005
4
X93156
AC Electrical Specifications Over recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
MIN
10
2
TYP
MAX
UNIT
ms
µs
tCPH
CS Deselect time (STORE)
tCYC
INC cycle time
tR, tF
INC input rise and fall time
500
10,000
10
µs
(Note 7)
t
R VCC
(Note 7)
V
power-up rate
0.2
V/ms
ms
CC
tWR
Store cycle
5
A.C. Timing
CS
tCYC
tCPHNS
tCI
tIL
tIH
tIC
tCPHS
90%
90%
INC
10%
tID
tDI
tF
tR
U/D
RW
tIW
(Note 4)
MI
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Power Up and Down Requirements
There are no restrictions on the power-up or power-down
conditions of VCC and the voltages applied to the
potentiometer pins provided that VCC is always more
Increment (INC)
positive than or equal to VH and VL, i.e., VCC ≥ VH,VL. The
CC ramp rate spec is always in effect.
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
V
Pin Descriptions
R and R
H
L
Chip Select (CS)
The RH and RL pins of the X93156 are equivalent to the fixed
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the X93156 will be placed in
the low power standby mode until the device is selected
once again.
terminals of a mechanical potentiometer. The minimum
voltage is V and the maximum is V . The terminology of
SS
CC
RH and RL references the relative position of the terminal in
relation to wiper movement direction selected by the U/D
input.
R
w
The Rw pin of the X93156 is the wiper terminal of the
potentiometer which is equivalent to the movable terminal of
a mechanical potentiometer
FN8182.2
5
September 16, 2005
X93156
This procedure allows the system to always power-up to a
Principles of Operation
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, or other system
trim requirements.
There are three sections of the X93156: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 31 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the connection at that
point to the wiper.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Mode Selection
CS
INC
U/D
H
L
MODE
L
Wiper Up
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
L
Wiper Down
H
X
L
L
L
X
Store Wiper Position
H
X
Standby Current
If the wiper is moved several positions, multiple taps are
connected to the wiper for tIW (INC to VW change). The
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
X
No Store, Return to Standby
Wiper Up (not recommended)
Wiper Down (not recommended)
H
L
Symbol Table
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
Instructions and Programming
May change
from Low to
High
Will change
from Low to
High
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the device
is selected and enabled to respond to the U/D and INC
inputs. HIGH to LOW transitions on INC will increment or
decrement (depending on the state of the U/D input) a five
bit counter. The output of this counter is decoded to select
one of thirty two wiper positions along the resistive array.
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
The value of the counter is stored in nonvolatile memory
whenever CS transitions HIGH while the INC input is also
HIGH. In order to avoid an accidental store during power-up,
CS must go HIGH with VCC during initial power-up. When
left open, the CS pin is internally pulled up to VCC by an
internal 30K resistor.
The system may select the X93156, move the wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as described above and once the new position is
reached, the system must keep INC LOW while taking CS
HIGH. The new wiper position will be maintained until
changed by the system or until a power-up/down cycle
recalled the previously stored data. In order to recall the
stored position of the wiper on power-up, the CS pin must be
held HIGH.
FN8182.2
September 16, 2005
6
X93156
Mini Small Outline Plas tic Packages (MSOP)
N
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
E1
E
SYMBOL
MIN
MAX
MIN
0.94
0.05
0.75
0.25
0.09
2.95
2.95
MAX
1.10
0.15
0.95
0.36
0.20
3.05
3.05
NOTES
A
A1
A2
b
0.037
0.002
0.030
0.010
0.004
0.116
0.116
0.043
0.006
0.037
0.014
0.008
0.120
0.120
-
-B-
0.20 (0.008)
INDEX
AREA
1 2
A
B
C
-
-
TOP VIEW
4X θ
9
0.25
(0.010)
R1
c
-
R
GAUGE
PLANE
D
3
E1
e
4
SEATING
PLANE
L
0.026 BSC
0.65 BSC
-
-C-
4X θ
L1
A
A2
E
0.187
0.016
0.199
0.028
4.75
0.40
5.05
0.70
-
L
6
SEATING
PLANE
L1
N
0.037 REF
0.95 REF
-
0.10 (0.004)
-A-
C
C
b
8
8
7
-H-
A1
e
R
0.003
0.003
5o
-
-
0.07
0.07
5o
-
-
-
D
0.20 (0.008)
C
R1
0
-
15o
6o
15o
6o
-
a
SIDE VIEW
C
L
0o
0o
-
α
E
1
-B-
Rev. 2 01/03
0.20 (0.008)
C
D
END VIEW
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
- H -
and are measured at Datum Plane.
Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
- B -
to be determined at Datum plane
-A -
10. Datums
and
.
- H -
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
FN8182.2
7
September 16, 2005
X93156
Thin Dual Flat No-Lead Plastic Package (TDFN)
2X
L8.2.5x2
0.15
C A
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
A
D
2X
MILLIMETERS
0.15
C B
SYMBOL
MIN
0.70
NOMINAL
MAX
0.80
NOTES
A
A1
A3
b
0.75
-
E
-
0.20
0.90
1.20
-
0.20 REF
0.25
0.05
-
6
-
INDEX
AREA
0.30
1.10
1.40
5, 8
D
2.00 BSC
1.00
-
B
A
TOP VIEW
SIDE VIEW
D2
E
7, 8
2.50 BSC
1.30
-
// 0.10
0.08
C
E2
e
7, 8
C
0.50 BSC
-
-
C
A3
k
0.20
0.30
-
-
SEATING
PLANE
L
0.40
0.50
8
N
8
2
D2
D2/2
2
7
8
(DATUM B)
Nd
4
3
Rev. 0 8/05
1
NX k
6
NOTES:
INDEX
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
AREA
(DATUM A)
E2
4. All dimensions are in millimeters. Angles are in degrees.
E2/2
5. Dimension b applies to the metallized terminal and is measured
between 0.25mm and 0.30mm from the terminal tip.
NX L
8
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
N
N-1
e
NX b
5
7. Dimensions D2 and E2 are for the exposed pads which provide
0.10
M
C A B
(Nd-1)Xe
REF.
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
BOTTOM VIEW
C
L
(A1)
NX (b)
5
L
SECTION "C-C"
C C
TERMINAL TIP
e
FOR EVEN TERMINAL/SIDE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8182.2
8
September 16, 2005
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XICOR
X93156WM8IZ
Single Digitally Controlled Potentiometer (XDCP™), Low Noise, Low Power, 3 wire Up/Down, 32 Taps; MSOP8; Temp Range: See Datasheet
RENESAS
X93156WM8IZ-2.7
Single Digitally Controlled Potentiometer (XDCP™), Low Noise, Low Power, 3 wire Up/Down, 32 Taps; MSOP8; Temp Range: See Datasheet
RENESAS
X93156WM8IZ-2.7T1
Single Digitally Controlled Potentiometer (XDCP™), Low Noise, Low Power, 3 wire Up/Down, 32 Taps; MSOP8; Temp Range: See Datasheet
RENESAS
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