IS24C04-2PLI [ISSI]
EEPROM, 512X8, Serial, CMOS, PDIP8;
| 型号： | IS24C04-2PLI |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | EEPROM, 512X8, Serial, CMOS, PDIP8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 光电二极管 |
| 文件： | 总16页 (文件大小：68K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
IS24C01 IS24C02
IS24C04 IS24C08 IS24C16
ISSI
1K-bit/2K-bit/4K-bit/8K-bit/16K-bit
2-WIRE SERIAL CMOS EEPROM
MARCH2004
FEATURES
DESCRIPTION
• Low Power CMOS Technology
–Standby Current less than 8 µA (5.5V)
–Read Current (typical) less than 1 mA (5.5V)
–Write Current (typical) less than 3 mA (5.5V)
• Flexible Voltage Operation
The IS24CXX (refers to IS24C01, IS24C02, IS24C04,
IS24C08, IS24C16) family is a low-cost and low voltage 2-
wireSerialEEPROM. ItisfabricatedusingISSI’sadvanced
CMOSEEPROMtechnologyandprovidesalowpowerand
lowvoltageoperation.TheIS24CXXfamilyfeaturesawrite
protection feature, and is available in 8-pin DIP and 8-pin
SOIC packages.
–Vcc = 1.8V to 5.5V for –2 version
–Vcc = 2.5V to 5.5V for –3 version
• 400 KHz (I2C Protocol) Compatibility
The IS24C01 is a 1K-bit EEPROM; IS24C02 is a 2K-bit
EEPROM;IS24C04isa4K-bitEEPROM;IS24C08isa8K-
bit EEPROM; IS24C16 is a 16K-bit EEPROM.
• Hardware Data Protection
–Write Protect Pin
The IS24C01 and IS24C02 are available in 8-pin MSOP
package. TheIS24C01,IS24C02,IS24C04,andIS24C08
are available in 8-Pin TSSOP package.
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• 8-pin PDIP and 8-pin SOIC packages
• 8-pin TSSOP (1K,2K, 4K & 8K only)
• 8-pin MSOP (1K,2K only)
Automotive data is preliminary.
• Self time write cycle with auto clear
5 ms @ 2.5V
The devices IS24C04, IS24C08, and IS24C16 are not
recommendedfornewdesigns.PleaserefertoIS24C04A,
IS24C08A,andIS24C16A.
• Organization:
–IS24C01 128x8 (one block of 128 bytes)
–IS24C02 256x8 (one block of 256 bytes)
–IS24C04 512x8 (two blocks of 256 bytes)
–IS24C08 1024x8 (four blocks of 256 bytes)
–IS24C16 2048x8 (eight blocks of 256 bytes)
• Page Write Buffer
• Two-Wire Serial Interface
–Bi-directional data transfer protocol
• High Reliability
–Endurance: 1,000,000 Cycles
–Data Retention: 100 Years
• Commercial, Industrial and Automotive tempera-
ture ranges
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
1
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
FUNCTIONAL BLOCK DIAGRAM
HIGH VOLTAGE
GENERATOR,
TIMING & CONTROL
8
Vcc
5
6
7
SDA
SCL
WP
CONTROL
LOGIC
EEPROM
ARRAY
SLAVE ADDRESS
REGISTER &
COMPARATOR
WORD ADDRESS
COUNTER
Y
DECODER
ACK
Clock
DI/O
DATA
REGISTER
4
GND
>
nMOS
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
PIN CONFIGURATION
8-Pin DIP and SOIC
8 Pin TSSOP (1K, 2K, 4K and 8K)
8-Pin MSOP (1K, 2K)
A0
A1
1
2
3
4
8
7
6
5
VCC
WP
A2
SCL
SDA
GND
PIN DESCRIPTIONS
TheIS24C04usesA1andA2pinsforhardwireaddressingand
atotaloffourdevicesmaybeaddressedonasinglebussystem.
The A0 pin is not used by IS24C04. This pin can be left floating
or tied to GND or Vcc.
A0-A2
SDA
SCL
WP
Address Inputs
Serial Address/Data I/O
Serial Clock Input
Write Protect Input
Power Supply
The IS24C08 only use A2 input for hardwire addressing and a
total of two devices may be addressed on a single bus system.
TheA0andA1pinsarenotusedbyIS24C08. Theymaybeleft
floating or tied to either GND or Vcc.
Vcc
GND
Ground
These pins are not used by IS24C16. A0 and A1 may be left
floating or tied to either GND or Vcc. A2 should be tied to either
GND or Vcc.
SCL
This input clock pin is used to synchronize the data
transfer to and from the device.
WP
WPistheWriteProtectpin.Onthe24C01,24C02,IS24C04
and 24C08, if the WP pin is tied to VCC the entire array
becomes Write Protected (Read only). On the 24C16, if the
WP pin is tied to Vcc the upper half array becomes Write
Protected (Read only). When WP is tied to GND or left
floating normal read/write operations are allowed to the
device.
SDA
TheSDAisaBi-directionalpinusedtotransferaddressesanddata
intoandoutofthedevice. TheSDApinisanopendrainoutputand
canbewire-Oredwithotheropendrainoropencollectoroutputs.
TheSDAbusrequiresapullupresistortoVcc.
A0, A1, A2
TheA0,A1andA2arethedeviceaddressinputs.TheIS24C01and
IS24C02usetheA0,A1,andA2forhardwareaddressinganda
total of 8 devices may be used on a single bus system.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
3
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
DEVICE OPERATION
The IS24CXX family features a serial communication and
supports a bi-directional 2-wire bus transmission protocol.
For the IS24C04 out of the next three bytes, B0 is for
MemoryPageAddressing(theIS24C04isorganizedastwo
blocks of 256 bytes) and A2 and A1 bytes are used as
device address bytes and must compare to its hard-wire
inputs pins (A2 and A1). Up to four IS24C04's may be
individuallyaddressedbythesystem. Thepageaddressing
bytesforIS24Cxxshouldbeconsideredthemostsignificant
bytes of the data word address which follows.
2-WIREBUS
Thetwo-wirebusisdefinedasaSerialDataline(SDA),and
aSerialClockLine(SCL). Theprotocoldefinesanydevice
that sends data onto the SDA bus as a transmitter, and the
receiving devices as a receiver. The bus is controlled by
MASTERdevicewhichgeneratestheSCL,controlsthebus
access and generates the STOP and START conditions.
The IS24CXX is the SLAVE device on the bus.
FortheIS24C08outofthenextthreebytes, B1andB0 are
formemorypageaddressing(theIS24C08isorganizedas
four blocks of 256 bytes) and the A2 bit is used as device
address bit and must compare to its hard-wired input pin
(A2). UptotwoIS24C08maybeindividuallyaddressedby
the system. The page addressing bytes for IS24CXX
shouldbeconsideredthemostsignificantbytesofthedata
word address which follows.
THEBUSPROTOCOL:
-- Data transfer may be initiated only when the bus is not
busy
-- During a data transfer, the data line must remain stable
whenevertheclocklineishigh. Anychangesinthedata
line while the clock line is high will be interpreted as a
START or STOP condition.
FortheIS24C01andIS24C02,theA0,A1,andA2areused
as device address bytes and must compare to its hard-
wiredinputpins(A0,A1,andA2)UptoEightIS24C01and/
orIS24C02'smaybeindividuallyaddressedbythesystem.
The state of the data line represents valid data when after
a START condition, the data line is stable for the duration
of the HIGH period of the clock signal. The data on the line
mustbechangedduringtheLOWperiodoftheclocksignal.
There is one clock pulse per bit of data. Each data transfer
is initiated with a START condition and terminated with a
STOP condition.
The last bit of the slave address specifies whether a Read
or Write operation is to be performed. When this bit is set
to1,aReadoperationisselected,andwhensetto0,aWrite
operation is selected.
After the MASTER sends a START condition and the
SLAVE address byte, the IS24CXX monitors the bus and
responds with an Acknowledge (on the SDA line) when its
address matches the transmitted slave address. The
IS24CXX pulls down the SDA line during the ninth clock
cycle, signalingthatitreceivedtheeightbytesofdata. The
IS24CXXthenperformsaReadorWriteoperationdepending
on the state of the R/W bit.
STARTCONDITION
The START condition precedes all commands to the
devicesandisdefinedasaHIGHtoLOWtransitionofSDA
when SCL is HIGH. The IS24CXX monitors the SDA and
SCLlinesandwillnotresponduntiltheSTARTconditionis
met.
STOPCONDITION
TheSTOPconditionisdefinedasaLOWtoHIGHtransition
of SDA when SCL is HIGH. All operations must end with a
STOP condition.
WRITE OPERATION
BYTE WRITE
In the Byte Write mode, the Master device sends the
START condition and the slave address information(with
the R/W set to Zero) to the Slave device. After the Slave
generates an acknowledge, the Master sends the byte
address that is to be written into the address pointer of the
IS24CXX. After receiving another acknowledge from the
Slave, the Master device transmits the data byte to be
written into the address memory location. The IS24CXX
acknowledges once more and the Master generates the
STOPcondition,atwhichtimethedevicebeginsitsinternal
programmingcycle. Whilethisinternalcycleisinprogress,
the device will not respond to any request from the Master
device.
ACKNOWLEDGE
After a successful data transfer, each receiving device is
requiredtogenerateanacknowledge. TheAcknowledging
device pulls down the SDA line.
DEVICEADDRESSING
The MASTER begins a transmission by sending a START
condition. The MASTER then sends the address of the
particular slave devices it is requesting. The SLAVE
address is 8 bytes.
The four most significant bytes of the address are fixed as
1010 for the IS24CXX.
For the IS24C16, the bytes(B2, B1 and B0) are used for
memory page addressing (the IS24C16 is organized as
eight blocks of 256 bytes).
4
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
PAGE WRITE
TheIS24CXXiscapableofpage-WRITE(8-bytefor24C01/
02and16-bytefor24C04/08/16)operation.Apage-WRITE
is initiated in the same manner as a byte write, but instead
ofterminatingtheinternalwritecycleafterthefirstdataword
istransferred, themasterdevicecantransmituptoNmore
bytes(N=7for24C01/02andN=15for24C04/08/16).After
the receipt of each data word, the IS24CXX responds
immediately with an ACKnowledge on SDA line, and the
three lower (24C01/24C02) or four lower (24C04/24C08/
24C16) order data word address bits are internally
incremented by one, while the higher order bits of the data
wordaddressremainconstant.Ifthemasterdeviceshould
transmit more than N+1 (N=7 for 24C01/02 and N=15 for
24C04/08/16) words, prior to issuing the STOP condition,
the address counter will “roll over,” and the previously
written data will be overwritten. Once all N+1 (N=7 for
24C01/02 and N=15 for 24C04/08/16) bytes are received
and the STOP condition has been sent by the Master, the
internalprogrammingcyclebegins.Atthispoint,allreceived
data is written to the IS24CXX in a single write cycle. All
inputs are disabled until completion of the internal WRITE
cycle.
condition and the IS24CXX discontinues transmission. If
'n'isthelastbyteofthememory,thenthedatafromlocation
'0' will be transmitted. (Refer to Current Address Read
Diagram.)
RANDOMADDRESSREAD
Selective READ operations allow the Master device to
selectatrandomanymemorylocationforaREADoperation.
TheMasterdevicefirstperformsa'dummy'writeoperation
by sending the START condition, slave address and word
addressofthelocationitwishestoread.AftertheIS24CXX
acknowledgethewordaddress,theMasterdeviceresends
the START condition and the slave address, this time with
theR/W bitsettoone.TheIS24CXXthenrespondswithits
acknowledge and sends the data requested. The master
device does not send an acknowledge but will generate a
STOPcondition.(RefertoRandomAddressReadDiagram.)
SEQUENTIALREAD
Sequential Reads can be initiated as either a Current
AddressReadorRandomAddressRead.AftertheIS24CXX
sendsinitialbytesequence,themasterdevicenowresponds
withanACKnowledgeindicatingitrequiresadditionaldata
from the IS24CXX. The IS24CXX continues to output data
for each ACKnowledge received. The master device
terminates the sequential READ operation by pulling SDA
HIGH(noACKnowledge)indicatingthelastdatawordtobe
read, followed by a STOP condition.
ACKNOWLEDGEPOLLING
The disabling of the inputs can be used to take advantage
of the typical write cycle time. Once the stop condition is
issued to indicate the end of the host's write operation, the
IS24CXX initiates the internal write cycle. ACK polling can
be initiated immediately. This involves issuing the start
conditionfollowedbytheslaveaddressforawriteoperation.
IftheIS24CXXisstillbusywiththewriteoperation,noACK
will be returned. If the IS24CXX has completed the write
operation, an ACK will be returned and the host can then
proceed with the next read or write operation.
The data output is sequential, with the data from
address n followed by the data from address n+1, ... etc.
The address counter increments by one automatically,
allowing the entire memory contents to be serially read
duringsequentialreadoperation.Whenthememoryaddress
boundary (127 for IS24C01; 255 for IS24C02; 511 for
IS24C04;1023forIS24C08;2047forIS24C16)isreached,
the address counter “rolls over” to address 0, and the
IS24CXX continues to output data for each ACKnowledge
received.(RefertoSequentialReadOperationStartingwith
aRandomAddressREADDiagram.)
READ OPERATION
READ operations are initiated in the same manner as
WRITE operations, except that the read/write bit of the
slaveaddressissetto“1”.TherearethreeREADoperation
options: current address read, random address read and
sequentialread.
CURRENTADDRESSREAD
The IS24CXX contains an internal address counter which
maintainstheaddressofthelastbyteaccessed,incremented
by one. For example, if the previous operation is either a
readorwriteoperationaddressedtotheaddresslocationn,
the internal address counter would increment to address
location n+1. When the IS24CXX receives the Device
Addressing Byte with a READ operation (read/write bit set
to “1”), it will respond an ACKnowledge and transmit the 8-
bitdatawordstoredataddresslocationn+1.Themasterwill
not acknowledge the transfer but does generate a STOP
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
5
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
TYPICALSYSTEMBUSCONFIGURATION
Vcc
SDA
SCL
Master
Transmitter/
Receiver
IS24Cxx
OUTPUTACKNOWLEDGE
SCL from
Master
1
8
9
Data Output
from
Transmitter
t
AA
tAA
Data Output
from
ACK
Receiver
STARTANDSTOPCONDITIONS
SCL
SDA
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
DATAVALIDITYPROTOCOL
Data Change
SCL
Data Stable
Data Stable
SDA
SLAVEADDRESS
BIT
BIT
7
6
5
4
3
2
1
0
IS24C01
IS24C02
1
0
1
0
A2 A1 A0 R/W
7
6
5
4
3
2
1
0
IS24C04
1
0
1
0
A2 A1 B0 R/W
BIT
BIT
7
6
5
4
3
2
1
0
1
0
1
0
A2 B1 B0 R/W
IS24C08
IS24C16
7
6
5
4
3
2
1
0
1
0
1
0
B2 B1 B0 R/W
LSB
MSB
BYTE WRITE
S
T
A
R
T
W
R
I
T
E
S
T
O
P
Device
Address
Data
Word Address
SDA
Bus
Activity
A
C
K
A
C
K
A
C
K
M
S
B
L
S
B
M
S
B
R/W
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
7
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
PAGE WRITE
S
T
A
R
T
W
R
I
T
E
S
T
Device
Address
O
Data (n)
Data (n+1)
Data (n+P*)
Word Address (n)
P
SDA
Bus
Activity
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
M
S
B
L
S
B
* P = 7 for IS24C01 and IS24C02
P = 15 for IS24C04, IS24C08 and IS24C16
R/W
CURRENTADDRESSREAD
S
T
A
R
T
R
E
A
D
S
T
O
P
Device
Address
Data
SDA
Bus
Activity
A
C
K
M
S
B
L
S
B
N
O
A
C
K
R/W
RANDOMADDRESSREAD
S
W
S
T
A
R
T
T
R
I
R
S
T
O
P
A
R
T
E
A
D
Device
Address
Device
Address
Word
Address (n)
T
E
Data n
SDA
Bus
Activity
A
C
K
A
C
K
A
C
K
M
S
B
L
S
B
N
O
A
C
K
R/W
DUMMY WRITE
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
SEQUENTIALREAD
R
E
A
D
S
T
Device
Address
O
Data Byte n
Data Byte n+1
Data Byte n+2
Data Byte n+X
P
SDA
Bus
Activity
A
C
K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
R/W
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
9
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
0.5 to +6.25
–0.5 to Vcc + 0.5
–40 to +85
–65 to +150
5
Unit
V
VS
VP
SupplyVoltage
Voltage on Any Pin
TemperatureUnderBias
StorageTemperature
OutputCurrent
V
TBIAS
TSTG
IOUT
°C
°C
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extendedperiodsmayaffectreliability.
OPERATING RANGE
(IS24C01-2, IS24C02-2, IS24C04-2 IS24C08-2, & IS24C16-2)
Range
Ambient Temperature
0°C to +70°C
VCC
Commercial
Industrial
1.8V to 5.5V
1.8V to 5.5V
–40°Cto+85°C
OPERATING RANGE
(IS24C01-3, IS24C02-3, IS24C04-3, IS24C08-3, & IS24C16-3)
Range
AmbientTemperature
0°C to +70°C
VCC
Commercial
Industrial
2.5V to 5.5V
2.5V to 5.5V
–40°Cto+85°C
Automotive
–40°Cto+125°C
2.7V to 5.5V
Note: Automotive data is preliminary.
OPERATING RANGE
(IS24C01-5, IS24C02-5,IS24C04-5IS24C08-5,&IS24C16-5)
Range
AmbientTemperature
VCC
Auromotive
–40°Cto+125°C
4.5V to 5.5V
Note: Automotive data is preliminary.
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter
TestConditions
Min.
—
Max.
Unit
V
VOL1
VOL2
VIH
VIL
OutputLOWVoltage
VCC = 1.8V, IOL = 0.15 mA
VCC = 2.5V, IOL = 1.0 mA
0.2
0.4
OutputLOWVoltage
Input HIGH Voltage
Input LOW Voltage
—
V
VCC X 0.7 VCC + 0.5
V
–1.0
—
VCC X 0.3
V
ILI
InputLeakageCurrent
OutputLeakageCurrent
VIN = VCC max.
3
3
µA
µA
ILO
—
Notes: VIL min and VIH max are reference only and are not tested.
POWER SUPPLY CHARACTERISTICS
Symbol Parameter
TestConditions
Min.
—
Max.
1.0
Unit
mA
mA
µA
ICC1
ICC2
ISB1
ISB2
VccOperatingCurrent
READ at 100 KHz (Vcc = 5V)
WRITE at 100 KHz (Vcc = 5V)
Vcc = 1.8V
VccOperatingCurrent
StandbyCurrent
—
3.0
—
4.0
StandbyCurrent
Vcc = 5.5V
—
8.0
µA
CAPACITANCE(1,2)
Symbol
CIN
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
Input Capacitance
Output Capacitance
6
8
COUT
VOUT = 0V
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
11
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
AC ELECTRICAL CHARACTERISTICS (Over Operating Rnage)
Commercial (TA = 0°C to +70°C) Industrial (TA = –40°C to +85°C)
1.8V-5.5V
Min. Max.
2.5V-5.5V
Min. Max.
Symbol Parameter
Test Conditions
Unit
fSCL
SCL Clock Frequency
0
—
4.7
4
4.7
4.7
4.7
4
4
200
0
100
0.1
—
—
—
100
100
—
—
—
—
—
—
—
—
—
—
4.5
1000
300
10
0
—
400
50
—
—
—
—
—
—
—
—
—
—
0.9
300
300
5
KHz
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
ns
ns
ms
T
Noise Suppression Time(1)
tLOW
tHIGH
tBUF
Clock LOW Period
Clock HIGH Period
1.2
0.6
1.2
0.6
0.6
0.6
0.6
100
0
50
0.1
—
—
—
Bus Free Time Before New Transmission(1)
Start Condition Setup Time
Stop Condition Setup Time
Start Condition Hold Time
Stop Condition Hold Time
Data In Setup Time
Data In Hold Time
Data Out Hold Time
Clock to Output
tSU:STA
tSU:STO
tHD:STA
tHD:STO
tSU:DAT
tHD:DAT
tDH
SCL LOW to SDA Data Out Change
SCL LOW to SDA Data Out Valid
tAA
tR
SCL and SDA Rise Time(1)
SCL and SDA Fall Time(1)
Write Cycle Time
tF
tWR
Note:
1. This parameter is characterized but not 100% tested.
AC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Automotive (TA = –40°C to +125°C)
2.7V-5.5V
4.5V-5.5V
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Unit
fSCL
SCL Clock Frequency
0
—
4.7
4
4.7
4.7
4.7
4
4
200
0
100
0.1
—
—
—
100
100
—
—
—
—
—
—
—
—
—
—
4.5
1000
300
10
0
—
400
50
—
—
—
—
—
—
—
—
—
—
0.9
300
300
10
KHz
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
ns
ns
ms
T
Noise Suppression Time(1)
tLOW
tHIGH
tBUF
Clock LOW Period
Clock HIGH Period
1.2
0.6
1.2
0.6
0.6
0.6
0.6
100
0
50
0.1
—
—
—
Bus Free Time Before New Transmission(1)
Start Condition Setup Time
Stop Condition Setup Time
Start Condition Hold Time
Stop Condition Hold Time
Data In Setup Time
Data In Hold Time
Data Out Hold Time
Clock to Output
tSU:STA
tSU:STO
tHD:STA
tHD:STO
tSU:DAT
tHD:DAT
tDH
SCL LOW to SDA Data Out Change
SCL LOW to SDA Data Out Valid
tAA
tR
SCL and SDA Rise Time(1)
SCL and SDA Fall Time(1)
Write Cycle Time
tF
tWR
Note:
1. This parameter is characterized but not 100% tested.
2. Automotive data is preliminary.
12
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
AC WAVEFORMS
BUSTIMING
t
R
t
F
t
HIGH
t
LOW
tSU:STO
SCL
t
BUF
t
SU:STA
tHD:DAT
t
HD:STA
tSU:DAT
SDAIN
t
AA
tDH
SDAOUT
WRITE CYCLE TIMING
SCL
ACK
SDA
t
WR
WORD n
STOP
Condition
START
Condition
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
13
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Voltage
Frequency Range
Part Number Package
100 KHz
1.8V
to 5.5V
IS24C01-2P
IS24C01-2G
IS24C01-2S
IS24C01-2Z
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
100 KHz
1.8V
to 5.5V
IS24C02-2P
IS24C02-2G
IS24C02-2S
IS24C02-2Z
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
400 KHz
400 KHz
2.5V
to 5.5V
IS24C01-3P
IS24C01-3G
IS24C01-3S
IS24C01-3Z
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
2.5V
to 5.5V
IS24C02-3P
IS24C02-3G
IS24C02-3S
IS24C02-3Z
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Voltage
Frequency Range
Part Number Package
100 KHz
1.8V
to 5.5V
IS24C01-2PI 300-mil Plastic DIP
IS24C01-2GI Small Outline (JEDEC STD)
IS24C01-2SI MSOP
IS24C01-2ZI
TSSOP
100 KHz
1.8V
to 5.5V
IS24C02-2PI
IS24C02-2GI
IS24C02-2SI
IS24C02-2ZI
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
400 KHz
400 KHz
2.5V
to 5.5V
IS24C01-3PI 300-mil Plastic DIP
IS24C01-3GI Small Outline (JEDEC STD)
IS24C01-3SI MSOP
IS24C01-3ZI
TSSOP
2.5V
to 5.5V
IS24C02-3PI
IS24C02-3GI
IS24C02-3SI
IS24C02-3ZI
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
14
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Voltage
Frequency Range
PartNumber Package
100 KHz
1.8V
to 5.5V
IS24C01-2PL 300-mil Plastic DIP, Lead-free
IS24C01-2GL Small Outline (JEDEC STD), Lead-free
IS24C01-2SL MSOP,Lead-free
IS24C01-2ZL TSSOP,Lead-free
100 KHz
1.8V
to 5.5V
IS24C02-2PL 300-mil Plastic DIP, Lead-free
IS24C02-2GL Small Outline (JEDEC STD), Lead-free
IS24C02-2SL MSOP,Lead-free
IS24C02-2ZL TSSOP,Lead-free
400 KHz
400 KHz
2.5V
to 5.5V
IS24C01-3PL 300-mil Plastic DIP, Lead-free
IS24C01-3GL Small Outline (JEDEC STD), Lead-free
IS24C01-3SL MSOP,Lead-free
IS24C01-3ZL TSSOP,Lead-free
2.5V
to 5.5V
IS24C02-3PL 300-mil Plastic DIP, Lead-free
IS24C02-3GL Small Outline (JEDEC STD), Lead-free
IS24C02-3SL MSOP,Lead-free
IS24C02-3ZL TSSOP,Lead-free
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Voltage
Frequency Range
PartNumber Package
100 KHz
1.8V
to 5.5V
IS24C01-2PLI 300-mil Plastic DIP, Lead-free
IS24C01-2GLI Small Outline (JEDEC STD), Lead-free
IS24C01-2SLI MSOP,Lead-free
IS24C01-2ZLI TSSOP,Lead-free
100 KHz
1.8V
to 5.5V
IS24C02-2PLI 300-mil Plastic DIP, Lead-free
IS24C02-2GLI Small Outline (JEDEC STD), Lead-free
IS24C02-2SLI MSOP,Lead-free
IS24C02-2ZLI TSSOP,Lead-free
400 KHz
400 KHz
2.5V
to 5.5V
IS24C01-3PLI 300-mil Plastic DIP, Lead-free
IS24C01-3GLI Small Outline (JEDEC STD), Lead-free
IS24C01-3SLI MSOP,Lead-free
IS24C01-3ZLI TSSOP,Lead-free
2.5V
to 5.5V
IS24C02-3PLI 300-mil Plastic DIP, Lead-free
IS24C02-3GLI Small Outline (JEDEC STD), Lead-free
IS24C02-3SLI MSOP,Lead-free
IS24C02-3ZLI TSSOP,Lead-free
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
15
03/24/04
®
IS24C01 IS24C02 IS24C04 IS24C08 IS24C16
ISSI
ORDERING INFORMATION
Automotive Range: –40°C to +125°C
Voltage
Frequency Range
PartNumber Package
100 KHz
2.7V
to 5.5V
IS24C01-3PA 300-mil Plastic DIP
IS24C01-3GA Small Outline (JEDEC STD)
IS24C01-3SA MSOP
IS24C01-3ZA TSSOP
100 KHz
2.7V
to 5.5V
IS24C02-3PA 300-mil Plastic DIP
IS24C02-3GA Small Outline (JEDEC STD)
IS24C02-3SA MSOP
IS24C02-3ZA TSSOP
400 KHz
400 KHz
4.5V
to 5.5V
IS24C01-PA
IS24C01-GA
IS24C01-SA
IS24C01-ZA
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
4.5V
to 5.5V
IS24C02-PA
IS24C02-GA
IS24C02-SA
IS24C02-ZA
300-mil Plastic DIP
Small Outline (JEDEC STD)
MSOP
TSSOP
Note: Automotive data is preliminary.
16
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
03/24/04
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