IS61LV6416-20B [ISSI]
Standard SRAM, 64KX16, 20ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48;
| 型号： | IS61LV6416-20B |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | Standard SRAM, 64KX16, 20ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48 静态存储器 内存集成电路 |
| 文件： | 总10页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
ISSI
IS61LV6416
64K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
OCTOBER 2000
FEATURES
DESCRIPTION
The ISSI IS61LV6416 is a high-speed, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields access times
as fast as 8 ns with low power consumption.
• High-speed access time: 8, 10, 12, 15, and 20 ns
• CMOS low power operation
— 250 mW (typical) operating
— 250 µW (typical) standby
• TTL compatible interface levels
• Single 3.3V power supply
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
• Fully static operation: no clock or refresh
required
• Three state outputs
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs, CE and OE. The active
LOW Write Enable (WE) controls both writing and reading
of the memory.A data byte allows Upper Byte (UB) and
Lower Byte (LB) access.
• Data control for upper and lower bytes
• Industrial temperature available
The IS61LV6416 is packaged in the JEDEC standard
44-pin 400-mil SOJ, 44-pin TSOP, and 48-pin mini BGA
(6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
64K x 16
MEMORY ARRAY
A0-A15
DECODER
VCC
GND
I/O0-I/O7
Lower Byte
I/O
DATA
CIRCUIT
COLUMN I/O
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc.
Rev. D
1
10/20/00
®
IS61LV6416
ISSI
PIN CONFIGURATIONS
44-Pin SOJ
44-Pin TSOP
A15
A14
A13
A12
A11
CE
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A15
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
2
A1
2
3
A2
3
4
OE
4
5
UB
5
6
LB
6
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
7
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
21
22
A3
A3
A4
A5
A6
A4
A8
A5
A8
A7
NC
A7
A6
NC
NC
NC
48-Pin mini BGA (6mm x 8mm)
PIN DESCRIPTIONS
A0-A15
I/O0-I/O15
CE
Address Inputs
1
2
3
4
5
6
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
OE
WE
A0
A3
A1
A4
A2
LB
I/O
OE
UB
N/C
A
B
C
D
E
F
LB
CE
I/O
0
8
UB
I/O
I/O
A5
A6
I/O
I/O
2
9
10
1
NC
GND
Vcc
NC
NC
A14
A12
A7
I/O
I/O
I/O
I/O
I/O
Vcc
11
3
4
5
GND
NC
A15
A13
A10
Vcc
Power
12
I/O
14
I/O
I/O
6
13
GND
Ground
I/O
15
NC
A8
WE
I/O
7
G
H
NC
A9
A11
NC
2
Integrated Silicon Solution, Inc.
Rev. D
10/20/00
®
IS61LV6416
ISSI
TRUTHTABLE
I/O PIN
Mode
WE
CE
OE
LB
UB
I/O0-I/O7
I/O8-I/O15 Vcc Current
1
Not Selected
X
H
X
X
X
High-Z
High-Z
ISB1, ISB2
ICC
Output Disabled
H
X
L
L
H
X
X
H
X
H
High-Z
High-Z
High-Z
High-Z
2
Read
Write
H
H
H
L
L
L
L
L
L
L
H
L
H
L
L
DOUT
High-Z
DOUT
High-Z
DOUT
DOUT
ICC
ICC
L
L
L
L
L
L
X
X
X
L
H
L
H
L
L
DIN
High-Z
DIN
High-Z
DIN
DIN
3
4
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
VTERM
TSTG
PT
Terminal Voltage with Respect to GND –0.5 to Vcc+0.5
V
°C
W
5
Storage Temperature
Power Dissipation
–65 to +150
1.5
20
IOUT
DC Output Current (LOW)
mA
Note:
6
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
7
OPERATING RANGE
8
Range
Ambient Temperature
0°C to +70°C
Vcc(8,10ns)
3.3V+10%,-5%
3.3V+10%,-5%
VCC (12,15,20NS)
3.3V ± 10%
Commercial
Industrial
–40°C to +85°C
3.3V ± 10%
9
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
10
11
12
Symbol Parameter
Test Conditions
Min.
2.4
—
Max.
Unit
V
VOH
VOL
VIH
VIL
ILI
Output HIGH Voltage
VCC = Min., IOH = –4.0 mA
VCC = Min., IOL = 8.0 mA
—
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
0.4
V
2
VCC + 0.3
V
–0.3
–2
0.8
2
V
GND ≤ VIN ≤ VCC
µA
µA
ILO
Output Leakage
GND ≤ VOUT ≤ VCC, Outputs Disabled
–2
2
Notes:
1. VIL (min.) = –2.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc.
Rev. D
3
10/20/00
®
IS61LV6416
ISSI
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-8 ns
-10ns
-12ns
-15ns
-20ns
Symbol Parameter
TestConditions
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
mA
ICC
Vcc Dynamic Operating
VCC = Max.,
IOUT = 0 mA, f = fMAX Ind.
Com.
—
—
210
215
—
—
190
210
—
—
150
170
—
—
130
150
—
—
120
140
SupplyCurrent
ISB1
TTLStandbyCurrent
(TTLInputs)
VCC = Max.,
VIN = VIH or VIL
CE ≥ VIH , f = 0
Com.
Ind.
—
—
25
30
—
—
25
30
—
—
15
25
—
—
15
25
—
—
15
25
mA
mA
ISB2
CMOSStandby
Current(CMOSInputs)
VCC = Max.,
Com.
Ind.
—
—
10
15
—
—
10
15
—
—
10
15
—
—
10
15
—
—
10
15
CE ≥ VCC – 0.2V,
VIN ≥ VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1)
Symbol
CIN
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
Input Capacitance
Input/Output Capacitance
6
8
COUT
VOUT = 0V
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-8 ns
Min. Max.
-10ns
Min. Max.
-12ns
Min. Max.
-15ns
Min. Max.
-20ns
Min. Max.
Symbol Parameter
Unit
tRC
Read Cycle Time
8
—
3
—
8
10
—
3
—
10
—
10
5
12
—
3
—
12
—
12
6
15
—
3
—
15
—
15
7
20
—
3
—
20
—
20
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
Address Access Time
Output Hold Time
tOHA
tACE
tDOE
tHZOE
—
8
CE Access Time
—
—
—
0
—
—
—
0
—
—
—
0
—
—
0
—
—
0
OE Access Time
5
(2)
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
5
5
6
6
8
(2)
(2
tLZOE
—
4
—
5
—
6
0
—
6
0
—
8
tHZCE
0
0
0
0
0
(2)
tLZCE
tBA
3
—
6
3
—
6
3
—
6
3
—
7
3
—
8
—
0
—
0
—
0
—
0
—
0
tHZB
4
5
6
6
8
tLZB
0
—
0
—
0
—
0
—
0
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
outputloadingspecifiedinFigure1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not100%tested.
4
Integrated Silicon Solution, Inc.
Rev. D
10/20/00
®
IS61LV6416
ISSI
AC TEST CONDITIONS
Parameter
Unit
0V to 3.0V
3 ns
Input Pulse Level
Input Rise and Fall Times
1
Input and Output Timing
and Reference Level
1.5V
2
Output Load
See Figures 1a and 1b
3
4
AC TEST LOADS
5
6
319 Ω
319 Ω
3.3V
3.3V
7
OUTPUT
OUTPUT
353 Ω
353 Ω
30 pF
Including
jig and
5 pF
Including
jig and
scope
8
scope
9
Figure 1a.
Figure 1b.
10
11
12
Integrated Silicon Solution, Inc.
Rev. D
5
10/20/00
®
IS61LV6416
ISSI
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS = OE = VIL, UB or LB = VIL)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
LZOE
ACE
t
CE
t
t
HZCE
t
LZCE
LB, UB
t
BA
t
HZB
t
LZB
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
6
Integrated Silicon Solution, Inc.
Rev. D
10/20/00
®
IS61LV6416
ISSI
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
-8 ns
Min. Max.
-10ns
Min. Max.
-12ns
Min. Max.
-15ns
Min. Max.
-20ns
Min. Max.
Symbol Parameter
Unit
ns
1
tWC
tSCE
tAW
Write Cycle Time
8
6
8
—
—
—
10
8
—
—
—
12
9
—
—
—
15
10
10
—
—
—
20
12
12
—
—
—
CE to Write End
ns
Address Setup Time
to Write End
8
9
ns
2
tHA
Address Hold from Write End
Address Setup Time
0
0
—
—
—
—
—
—
4
0
0
—
—
—
—
—
—
5
0
0
—
—
—
—
—
—
6
0
0
—
—
—
—
—
—
7
0
0
—
—
—
—
—
—
9
ns
ns
ns
ns
ns
ns
ns
ns
tSA
3
tPWB
tPWE
tSD
LB, UB Valid to End of Write
WE Pulse Width
7
8
9
10
10
7
12
12
9
6
8
9
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
6
6
6
4
tHD
0
0
0
0
0
(2)
tHZWE
—
3
—
3
—
3
—
3
—
3
(2)
tLZWE
—
—
—
—
—
5
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
outputloadingspecifiedinFigure1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc.
Rev. D
7
10/20/00
®
IS61LV6416
ISSI
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
t
WC
ADDRESS
CE
t
HA
t
SCE
t
PWB
LB, UB
t
AW
t
PWE
WE
t
SA
(1)
WRITE
D
t
SD
t
HD
IN
t
HZWE
t
LZWE
HIGH-Z
HIGH-Z
DOUT
UNDEFINED
UNDEFINED
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
8
Integrated Silicon Solution, Inc.
Rev. D
10/20/00
®
IS61LV6416
ISSI
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
1
Speed (ns)
Order Part No.
Package
8
8
8
IS61LV6416-8B
IS61LV6416-8T
IS61LV6416-8K
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
2
10
10
10
IS61LV6416-10B
IS61LV6416-10T
IS61LV6416-10K
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
3
12
12
12
IS61LV6416-12B
IS61LV6416-12T
IS61LV6416-12K
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
15
15
15
IS61LV6416-15B
IS61LV6416-15T
IS61LV6416-15K
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
4
20
20
20
IS61LV6416-20B
IS61LV6416-20T
IS61LV6416-20K
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
5
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc.
Rev. D
9
10/20/00
®
IS61LV6416
ISSI
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Speed (ns)
Order Part No.
Package
8
8
8
IS61LV6416-8BI
IS61LV6416-8TI
IS61LV6416-8KI
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
10
10
10
IS61LV6416-10BI
IS61LV6416-10TI
IS61LV6416-10KI
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
12
12
12
IS61LV6416-12BI
IS61LV6416-12TI
IS61LV6416-12KI
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
15
15
15
IS61LV6416-15BI
IS61LV6416-15TI
IS61LV6416-15KI
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
20
20
20
IS61LV6416-20BI
IS61LV6416-20TI
IS61LV6416-20KI
mini BGA (6mm x 8mm)
Plastic TSOP
400-milPlasticSOJ
®
ISSI
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Tel: 1-800-379-4774
Fax: (408) 588-0806
E-mail: sales@issi.com
www.issi.com
10
Integrated Silicon Solution, Inc.
Rev. D
10/20/00
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