IS62LV12816L-10TI [ISSI]
Standard SRAM, 128KX16, 100ns, CMOS, PDSO44, TSOP2-44;
| 型号： | IS62LV12816L-10TI |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | Standard SRAM, 128KX16, 100ns, CMOS, PDSO44, TSOP2-44 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总10页 (文件大小：80K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
IS62LV12816L/LL
128K x 16 CMOS STATIC RAM
ISSI
JANUARY 2000
FEATURES
DESCRIPTION
• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
The ISSI IS62LV12816L and IS62LV12816LL are high-
speed, 2,097,152-bit static RAMs organized as 131,072
words by 16 bits. They are fabricated using ISSI's high-
performanceCMOStechnology.Thishighlyreliableprocess
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
– 120 mW (typical) operating
– 6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single 2.5V-3.0V VCC power supply
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
• Fully static operation: no clock or refresh
required
Easy memory expansion is provided by using Chip Enable and
OutputEnableinputs, CEandOE. TheactiveLOWWriteEnable
(WE) controls both writing and reading of the memory. A data
byte allows Upper Byte (UB) and Lower Byte (LB) access.
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
TheIS62LV12816LandIS62LV12816LLarepackagedinthe
JEDECstandard44-pinTSOP(TypeII)and48-pinminiBGA.
• Available in the 44-pin TSOP (Type II) and
48-pin mini BGA
FUNCTIONAL BLOCK DIAGRAM
128K x 16
MEMORY ARRAY
A0-A16
DECODER
VCC
GND
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
CIRCUIT
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
PIN CONFIGURATIONS
44-Pin TSOP (Type II)
48-Pin mini BGA
1
2
3
4
5
6
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
CE
A0
A3
A1
A4
A2
LB
I/O
OE
UB
N/C
A
B
C
D
E
F
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
CE
I/O
0
8
9
I/O
9
I/O
I/O
I/O
A5
A6
I/O
1
I/O
2
10
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
Vcc
NC
NC
A14
A12
A7
I/O
3
I/O
4
I/O
5
Vcc
11
GND
A16
A15
A13
A10
12
I/O
14
I/O
13
I/O
6
I/O
15
NC
A8
WE
A11
I/O
7
G
H
NC
A9
NC
PIN DESCRIPTIONS
A0-A16
I/O0-I/O15
CE
Address Inputs
LB
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
UB
NC
OE
Vcc
GND
Power
WE
Ground
TRUTHTABLE
I/O PIN
Mode
WE
CE
OE
LB
UB
I/O0-I/O7
I/O8-I/O15 Vcc Current
Not Selected
Output Disabled
X
H
X
H
L
L
X
H
X
X
X
H
X
X
H
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
ISB1, ISB2
ICC
Read
Write
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
X
X
X
L
H
L
L
H
L
H
L
L
H
L
L
DOUT
High-Z
DOUT
High-Z
DOUT
DOUT
ICC
ICC
DIN
High-Z
DIN
High-Z
DIN
DIN
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
OPERATING RANGE
Range
Ambient Temperature
VCC
Commercial
Industrial
0°C to +70°C
–40°C to +85°C
2.5V - 3.0V
2.5V - 3.0V
1
2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
VTERM
TBIAS
VCC
Parameter
Value
–0.5 to Vcc+0.5
–40 to +85
–0.3 to +4.0
–65 to +150
1.0
Unit
V
°C
V
°C
W
3
Terminal Voltage with Respect to GND
Temperature Under Bias
Vcc Related to GND
Storage Temperature
Power Dissipation
TSTG
PT
Note:
4
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
5
6
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Min.
2.0
—
Max.
Unit
V
7
VOH
VOL
VIH
Output HIGH Voltage
VCC = Min., IOH = –1 mA
VCC = Min., IOL = 2.1 mA
—
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
0.4
V
2.2
–0.2
–1
VCC + 0.2
V
8
(1)
VIL
ILI
0.4
1
V
GND ≤ VIN ≤ VCC
µA
µA
ILO
Output Leakage
GND ≤ VOUT ≤ VCC, Outputs Disabled
–1
1
9
Notes:
1. VIL (min.) = –2.0V for pulse width less than 10 ns.
10
11
12
CAPACITANCE(1)
Symbol
Parameter
Conditions
VIN = 0V
Max.
Unit
CIN
Input Capacitance
Input/Output Capacitance
6
8
pF
pF
COUT
VOUT = 0V
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Silicon Solution, Inc. — 1-800-379-4774
3
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Unit
0.4V to 2.2V
5 ns
Input and Output Timing
and Reference Level
1.3V
Output Load
See Figures 1 and 2
AC TEST LOADS
3070 Ω
3070 Ω
2.8V
2.8V
OUTPUT
OUTPUT
3150 Ω
3150 Ω
100 pF
5 pF
Including
jig and
scope
Including
jig and
scope
Figure 1
Figure 2
IS62LV12816L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Min. Max.
Symbol Parameter
TestConditions
CC = Max.,
OUT = 0 mA, f = fMAX
Min. Max.
Min. Max.
Unit
mA
ICC
VccDynamicOperating
SupplyCurrent
V
I
Com.
Ind.
—
—
40
60
—
—
30
50
—
20
40
—
I
SB
1
TTLStandbyCurrent
(TTLInputs)
V
CC = Max.,
Com.
Ind.
—
—
0.4
1.0
—
—
0.4
1.0
—
—
0.4
1.0
mA
µA
V
IN = VIH or VIL
CE
≥ VIH , f = 0
ISB
2
CMOSStandby
Current (CMOS Inputs)
V
CC = Max.,
Com.
Ind.
—
—
15
15
—
—
15
15
—
—
15
15
CE
≥
≥
≤
V
CC – 0.2V,
CC – 0.2V, or
0.2V, f = 0
V
V
IN
V
IN
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS62LV12816LL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Test Conditions
CC = Max.,
OUT = 0 mA, f = fMAX
Min. Max.
Min. Max.
Min. Max.
Unit
mA
I
CC
Vcc Dynamic Operating
Supply Current
V
I
Com.
Ind.
—
—
40
60
—
—
30
50
—
—
20
40
I
SB
SB
1
TTL Standby Current
(TTL Inputs)
V
CC = Max.,
Com.
Ind.
—
—
0.4
1.0
—
—
0.4
1.0
—
—
0.4
1.0
mA
µA
V
IN = VIH or VIL
CE
≥ VIH , f = 0
I
2
CMOS Standby
Current (CMOS Inputs)
V
CC = Max.,
Com.
Ind.
—
—
5
5
—
—
5
5
—
—
5
5
CE
≥
≥
≤
V
V
CC – 0.2V,
CC – 0.2V, or
0.2V, f = 0
V
V
IN
IN
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol
tRC
Parameter
Min. Max.
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
Read Cycle Time
55
—
10
—
—
—
5
—
55
—
55
30
20
—
20
—
20
25
—
70
—
10
—
—
—
5
—
70
—
70
35
25
—
25
—
35
25
—
100
—
15
—
—
—
5
—
100
—
tAA
Address Access Time
Output Hold Time
CE Access Time
tOHA
tACE
2
100
50
30
—
tDOE
OE Access Time
(2)
tHZOE
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
3
(2)
tLZOE
(2)
tHZCE
0
0
0
30
—
(2)
tLZCE
10
—
0
10
—
0
10
—
0
4
tBA
50
35
—
tHZB
tLZB
0
0
0
5
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4 to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.
6
7
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)
8
t
RC
ADDRESS
9
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CS, OE, AND UB/LB Controlled)
tRC
ADDRESS
OE
tAA
tOHA
t
HZOE
t
DOE
LZOE
ACE
t
CE
t
t
HZCE
tLZCE
LB, UB
tBA
tHZB
tLZB
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-55
-70
-100
Symbol
tWC
Parameter
Min. Max.
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle Time
55
50
50
0
—
—
—
—
—
—
—
—
—
30
—
70
65
65
0
—
—
—
—
—
—
—
—
—
30
—
100
80
80
0
—
—
—
—
—
—
—
—
—
40
—
tSCE
tAW
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
tHA
tSA
0
0
0
tPWB
tPWE
tSD
LB, UB Valid to End of Write
WE Pulse Width
45
45
25
0
60
60
30
0
80
80
40
0
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
tHD
(3)
tHZWE
—
5
—
5
—
5
(3)
tLZWE
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to
2.2V and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to
the rising or falling edge of the signal that terminates the write.
3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
AC WAVEFORMS
WRITE CYCLE NO. 1(1,2) (CS Controlled, OE = HIGH or LOW)
1
t
WC
VALID ADDRESS
SCS
ADDRESS
CS
2
t
SA
t
t
HA
3
t
AW
t
tPPWWEE21
WE
4
t
PBW
UB, LB
t
HZWE
t
LZWE
5
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
6
DATAIN VALID
DIN
UB_CSWR1.eps
7
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CS) [ (LB) = (UB) ] (WE).
8
9
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
7
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
t
WC
ADDRESS
OE
VALID ADDRESS
t
HA
LOW
CS
t
AW
t
PWE1
WE
t
SA
t
PBW
UB, LB
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
D
OUT
t
SD
t
HD
DATAIN VALID
D
IN
UB_CSWR2.eps
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
t
WC
ADDRESS
VALID ADDRESS
t
HA
LOW
LOW
OE
CS
t
t
AW
t
PWE2
WE
t
SA
t
PBW
UB, LB
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
D
OUT
t
SD
t
HD
DATAIN VALID
D
IN
UB_CSWR3.eps
8
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
DATA RETENTION SWITCHING CHARACTERISTICS (L/LL)
Symbol
VDR
Parameter
TestCondition
Min.
Max.
Unit
V
Vcc for Data Retention
DataRetentionCurrent
SeeDataRetentionWaveform
1.5
3.0
1
IDR
Vcc = 2.0V, CE
≥
Vcc – 0.2V
—
—
15
5
µA
(For -L version)
(For -LL version)
tSDR
tRDR
Data Retention Setup Time See Data Retention Waveform
Recovery Time See Data Retention Waveform
0
—
—
ns
ns
2
tRC
3
DATA RETENTION WAVEFORM (CE Controlled)
4
tSDR
Data Retention Mode
tRDR
V
CC
DR
2.3V
2.0V
5
V
CE ≥ VCC — 0.2V
CE
GND
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
9
Rev. C
03/17/00
®
IS62LV12816L/LL
ISSI
ORDERING INFORMATION
Industrial Range: –40°C to +85°C
Commercial Range: 0°C to +70°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
TSOP (Type II)
IS62LV12816L-55BI Mini BGA
55
IS62LV12816L-55TI
55
IS62LV12816L-55T
IS62LV12816L-55B
TSOP (Type II)
Mini BGA
70
IS62LV12816L-70TI
IS62LV12816L-70BI Mini BGA
TSOP (Type II)
70
IS62LV12816L-70T
IS62LV12816L-70B
TSOP (Type II)
Mini BGA
100
IS62LV12816L-10T
IS62LV12816L-10B
TSOP (Type II)
Mini BGA
100
IS62LV12816L-10TI
IS62LV12816L-10BI
TSOP (Type II)
Mini BGA
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
55
IS62LV12816LL-55TI TSOP (Type II)
55
IS62LV12816LL-55T TSOP (Type II)
IS62LV12816LL-55BI Mini BGA
IS62LV12816LL-55B Mini BGA
70
IS62LV12816LL-70T TSOP (Type II)
IS62LV12816LL-70B Mini BGA
70
IS62LV12816LL-70TI TSOP (Type II)
IS62LV12816LL-70BI Mini BGA
100
IS62LV12816LL-10TI TSOP (Type II)
IS62LV12816LL-10BI Mini BGA
100
IS62LV12816LL-10T TSOP (Type II)
IS62LV12816LL-10B Mini BGA
®
ISSI
Integrated Silicon Solution, Inc.
2231 Lawson Lane
Santa Clara, CA 95054
Tel: 1-800-379-4774
Fax: (408) 588-0806
E-mail: sales@issi.com
www.issi.com
10
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. C
03/17/00
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