IS62UP12816LL-100H [ISSI]

Standard SRAM, 128KX16, 100ns, CMOS, PDSO44, STSOP2-44;
IS62UP12816LL-100H
型号: IS62UP12816LL-100H
厂家: INTEGRATED SILICON SOLUTION, INC    INTEGRATED SILICON SOLUTION, INC
描述:

Standard SRAM, 128KX16, 100ns, CMOS, PDSO44, STSOP2-44

静态存储器 光电二极管 内存集成电路
文件: 总13页 (文件大小:83K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
®
ISSI  
ADVANCE INFORMATION  
APRIL 1999  
TARGET SPECIFICATION  
IS62Ux12816 Series  
128K x 16 LOW VOLTAGE, LOW POWER  
CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
The ISSI IS62Ux12816 series is a low voltage, 131,072  
wordsby16bits,CMOSSRAM.ItisfabricatedusingISSI's  
low voltage, six transistor (6T), CMOS technology. The  
series is targeted to satisfy the demands of the state-of-  
the-art technologies such as cell phones and pagers.  
• Voltage range options  
-- 1.6V to 2.0V: IS62UT12816  
-- 1.8V to 2.2V: IS62US12816  
-- 2.3V to 2.7V: IS62UR12816  
-- 2.7V to 3.3V: IS62UP12816  
When CE is HIGH (deselected), the device assumes a  
standby mode at which the power dissipation can be  
reduced down with CMOS input levels. Additionally, easy  
memory expansion is provided by using Chip Enable and  
Output Enable inputs, CE and OE. The active LOW Write  
Enable (WE) controls both writing and reading of the  
memory. A data byte allows Upper Byte (UB) and Lower  
Byte (LB) access.  
• Battery backup (SL/LL version)  
-- 1.0V (min.) data retention  
• Access times: 55, 70, and 100 ns  
• Fully static operation and tri-state outputs  
• Industrial temperature available  
• Available in 48-ball mini BGA and  
44-pin sTSOP (Type II)  
The IS62Ux12816 series is packaged in the 48-ball mini  
BGA and the 44-pin sTSOP (Type II).  
PRODUCT SERIES OVERVIEW  
Standby Current (µA)  
Part No.  
Voltage (V)  
Speeds (ns)  
Active ICC (mA)  
LL  
SL  
Temperature (°C)  
IS62UP12816  
3.0, ±0.3  
55, 70, 100  
55, 70, 100  
55, 70, 100  
55, 70, 100  
55, 70, 100  
55, 70, 100  
55, 70, 100  
55, 70, 100  
25 @ 70 ns  
25 @ 70 ns  
15 @ 70 ns  
15 @ 70 ns  
10 @ 70 ns  
10 @ 70 ns  
10 @ 70 ns  
10 @ 70 ns  
10  
10  
10  
10  
10  
10  
10  
10  
2
2
2
2
2
2
2
2
0 to 70  
40 to 85  
0 to 70  
40 to 85  
0 to 70  
40 to 85  
0 to 70  
40 to 85  
IS62UP12816(1) 3.0, ±0.3  
IS62UR12816  
IS62UR12816(1) 2.5, ±0.2  
IS62US12816 2.0, ±0.2  
IS62US12816(1) 2.0, ±0.2  
IS62UT12816  
IS62UT12816(1) 1.8, ±0.2  
2.5, ±0.2  
1.8, ±0.2  
Note:  
1. Current value is max.  
This document is a TARGET SPECIFICATION only. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible  
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.  
2231 Lawson Lane • Santa Clara, CA 95054-3311 • 1-800-379-4774 • Fax: (408) 588-0806  
e-mail: sales@issiusa.com • www.issiusa.com  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
1
05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
FUNCTIONAL BLOCK DIAGRAM  
128K x 16  
MEMORY ARRAY  
A0-A16  
DECODER  
VCC  
GND  
I/O0-I/O7  
Lower Byte  
I/O  
DATA  
COLUMN I/O  
CIRCUIT  
I/O8-I/O15  
Upper Byte  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
UB  
LB  
2
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
PIN CONFIGURATIONS  
48-ball mini BGA (B)  
44-pin sTSOP (Type II): (H)  
1
2
3
4
5
6
1
A4  
A3  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A5  
2
A6  
A2  
A1  
3
A7  
4
OE  
2
A0  
5
UB  
A0  
A3  
A1  
A4  
A2  
CE  
LB  
I/O8  
I/O9  
GND  
Vcc  
OE  
UB  
N/C  
I/O0  
I/O2  
A
B
C
D
E
F
CE  
6
LB  
I/O0  
I/O1  
I/O2  
I/O3  
Vcc  
GND  
I/O4  
I/O5  
I/O6  
I/O7  
WE  
7
I/O15  
I/O14  
I/O13  
I/O12  
GND  
Vcc  
I/O11  
I/O10  
I/O9  
I/O8  
NC  
8
3
9
I/O  
10  
A5  
A6  
I/O1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
I/O  
11  
NC  
NC  
A14  
A12  
A7  
I/O3  
I/O4  
I/O5  
Vcc  
I/O  
12  
GND  
A16  
A15  
A13  
A10  
4
I/O  
14  
I/O  
13  
I/O6  
I/O7  
NC  
I/O  
15  
NC  
A8  
WE  
A11  
G
H
5
A16  
A15  
A14  
A13  
A12  
A8  
NC  
A9  
A9  
A10  
A11  
NC  
6
7
PIN DESCRIPTIONS  
8
A0-A16  
I/O0-I/O15  
CE  
Address Inputs  
Data Inputs/Outputs  
Chip Enable Input  
Output Enable Input  
Write Enable Input  
9
OE  
WE  
LB  
Lower-byte Control (I/O0-I/O7)  
Upper-byte Control (I/O8-I/O15)  
No Connection  
10  
11  
12  
UB  
NC  
Vcc  
Power  
GND  
Ground  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
3
05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
TRUTH TABLE  
I/O PIN  
Mode  
WE  
CE  
OE  
LB  
UB  
I/O0-I/O7  
I/O8-I/O15 Vcc Current  
Not Selected  
X
X
H
X
X
X
X
H
X
H
High-Z  
High-Z  
High-Z  
High-Z  
ISB, ISB1  
ICC, ICC1  
ICC, ICC1  
Output Disabled  
Read  
H
X
L
L
H
X
X
H
X
H
High-Z  
High-Z  
High-Z  
High-Z  
H
H
H
L
L
L
L
L
L
L
H
L
H
L
L
DOUT  
High-Z  
DOUT  
High-Z  
DOUT  
DOUT  
Write  
L
L
L
L
L
L
X
X
X
L
H
L
H
L
L
DIN  
High-Z  
DIN  
High-Z  
DIN  
DIN  
ICC, ICC1  
Notes:  
1. H = VIH, L = VIL, X = Don't Care.  
2. UB, LB (Upper, Lower Byte enable).  
These active LOW inputs allow individual bytes to be written or read.  
When LB is LOW, data is written or read to the lower byte, I/O0-I/O7.  
When UB is LOW, data is written or read to the upper byte, I/O8-I/O15.  
OPERATING RANGE  
Range  
Ambient Temperature  
0°C to +70°C  
Commercial  
Industrial  
–40°C to +85°C  
ABSOLUTE MAXIMUM RATINGS(1)  
Symbol Parameter  
Value  
Unit  
V
VCC  
Power Supply Voltage Related to GND  
Terminal Voltage with Respect to GND  
Storage Temperature  
–0.5 to +4.0  
–0.5 to Vcc + 0.5  
–65 to +150  
VTERM  
TSTG  
TBIAS  
V
°C  
Temperature Under Bias  
Com.  
Ind.  
–10 to +85  
–45 to +90  
°C  
°C  
PT  
Power Dissipation  
DC Output Current  
2.0  
W
Iout  
±20  
mA  
Notes:  
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.  
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated  
in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for  
extended periods may affect reliability.  
CAPACITANCE(1)  
Symbol  
Parameter  
Conditions  
VIN = 0V  
Max.  
Unit  
pF  
CIN  
Input Capacitance  
Input/Output Capacitance  
6
8
COUT  
VOUT = 0V  
pF  
Note:  
1. Tested initially and after any design or process changes that may affect these parameters.  
4
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
AC TEST CONDITIONS (Over Operating Range)  
Parameter  
Unit  
Input Pulse Level(1)  
IS62UP12816  
IS62UR12816  
IS62US12816  
IS62UT12816  
0.4V to 2.2V  
0.4V to 2.2V  
0.4V to 1.8V  
0.4V to 1.6V  
1
Input Rise and Fall Times  
5 ns  
2
Input and Output Timing  
and Reference Level  
IS62UP12816  
IS62UR12816  
IS62US12816  
IS62UT12816  
1.5V  
1.1V  
0.9V  
0.8V  
3
Output Load (all test parameters except in Note 2)  
(see Figure 1)  
Output Load(1) (all High-Z and Low-Z parameters)  
(see Figure 1)  
CL1 = 30 pF  
+ 1TTL Load  
CL2 = 5 pF  
4
Notes:  
1. Including jig and scope capacitance.  
2. VTM = 2.8V for Vcc = 3.0V ± 0.3V  
VTM = 2.3V for Vcc = 2.5V ± 0.2V  
VTM = 1.8V for Vcc = 2.0V ± 0.2V  
VTM = 1.6V for Vcc = 1.8V ± 0.2V  
5
6
AC TEST LOADS  
3070  
7
VTM  
DOUT  
8
CL1,  
CL2  
3150 Ω  
9
10  
11  
12  
Figure 1  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
5
05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)  
Symbol Parameter  
Test Conditions  
Min.  
Max.  
Unit  
VOH  
VOL  
VIH  
Output HIGH Voltage  
VCC = 3.0V ± 0.3V, IOH = –2.1 mA  
VCC = 2.5V ± 0.2V, IOH = –0.5 mA  
VCC = 2.0V ± 0.2V, IOH = –0.44 mA  
VCC = 1.8V ± 0.2V, IOH = –0.44 mA  
2.2  
2.0  
1.6  
1.4  
V
Output LOW Voltage  
Input HIGH Voltage  
VCC = 3.0V ± 0.3V, IOL = 2.1 mA  
VCC = 2.5V ± 0.2V, IOL = 0.5 mA  
VCC = 2.0V ± 0.2V, IOL = 0.33 mA  
VCC = 1.8V ± 0.2V, IOL = 0.26 mA  
0.4  
V
V
IS62UP12816  
IS62UR12816  
IS62US12816  
IS62UT12816  
2.2  
2.0  
1.6  
1.4  
VCC + 0.2  
VCC + 0.2  
VCC + 0.2  
VCC + 0.2  
(1)  
VIL  
ILI  
Input LOW Voltage  
Input Leakage  
–0.2  
–1  
0.4  
1
V
GND VIN VCC  
µA  
µA  
ILO  
Output Leakage  
GND VOUT VCC, CE = VIH or OE = VIH or  
–1  
1
WE = VIL or UB = VIH or LB = VIH  
Note:  
1. VIL (min.) = –0.5V for pulse width less than 10 ns.  
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)  
Symbol Parameter  
Test Conditions  
Min. Max.  
Unit  
I
CC  
Static Operating  
Power Supply Current  
CE = VIL, VIN = VIH or VIL  
II/O = 0 mA, f = 0  
,
Vcc = 3.0V ± 0.3V  
Vcc = 2.5V ± 0.2V  
Vcc = 2.0V ± 0.2V  
Vcc = 1.8V ± 0.2V  
15  
10  
8
mA  
6
I
I
I
I
I
CC  
CC  
CC  
CC  
SB  
1
1
1
1
Dynamic Operating  
Power Supply Current  
(IS62UP12816)  
Vcc = 3.0V ± 0.3V  
55 ns  
70 ns  
100 ns  
35  
25  
20  
mA  
mA  
mA  
mA  
mA  
I
OUT = 0 mA, f = fMAX  
Dynamic Operating  
Power Supply Current  
(IS62UR12816)  
Vcc = 2.5V ± 0.2V  
55 ns  
70 ns  
100 ns  
20  
15  
8
I
OUT = 0 mA, f = fMAX  
Dynamic Operating  
Power Supply Current  
(IS62US12816)  
Vcc = 2.0V ± 0.2V  
55 ns  
70 ns  
100 ns  
12  
10  
7
I
OUT = 0 mA, f = fMAX  
Dynamic Operating  
Power Supply Current  
(IS62UT12816)  
Vcc = 1.8V ± 0.2V  
55 ns  
70 ns  
100 ns  
11  
9
6
I
OUT = 0 mA, f = fMAX  
TTL Standby Current  
(TTL Inputs)  
VCC = 3.0V ± 0.3V, CE = VIH  
VCC = 2.5V ± 0.2V, CE = VIH  
VCC = 2.0V ± 0.2V, CE = VIH  
VCC = 1.8V ± 0.2V, CE = VIH  
IS62UP12816  
IS62UR12816  
IS62US12816  
IS62UT12816  
0.5  
0.3  
0.3  
0.3  
I
SB1  
CMOS Standby  
CE VCC – 0.2V  
LL Versions  
SL Versions  
10  
2
µA  
Note:  
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.  
6
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)  
-55  
-70  
-100  
Symbol  
tRC  
Parameter  
Min. Max.  
Min. Max.  
Min. Max.  
Unit  
1
Read Cycle Time  
55  
10  
5
55  
55  
30  
20  
20  
55  
20  
70  
10  
5
70  
70  
35  
25  
25  
70  
25  
100  
10  
5
100  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
Address Access Time  
Output Hold Time  
CE Access Time  
tOHA  
tACE  
2
100  
50  
tDOE  
OE Access Time  
(2)  
tHZOE  
OE to High-Z Output  
OE to Low-Z Output  
CE to High-Z Output  
CE to Low-Z Output  
LB, UB Access Time  
LB, UB to High-Z Output  
LB, UB to Low-Z Output  
30  
3
(2)  
tLZOE  
(2)  
tHZCE  
0
0
0
30  
(2)  
tLZCE  
10  
0
10  
0
10  
0
4
tBA  
100  
35  
tHZB  
tLZB  
5
5
5
5
Notes:  
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels  
of 0.4 to 2.2V and output loading specified in Figure 1.  
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.  
6
7
AC WAVEFORMS  
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL, UB or LB = VIL)  
8
t
RC  
ADDRESS  
9
t
AA  
t
OHA  
t
OHA  
DATA VALID  
DOUT  
PREVIOUS DATA VALID  
10  
11  
12  
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TARGET SPECIFICATION SR065-0T  
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05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
AC WAVEFORMS  
READ CYCLE NO. 2(1,3)  
t
RC  
ADDRESS  
OE  
t
AA  
t
OHA  
t
HZOE  
t
DOE  
t
t
LZOE  
ACE  
CE  
t
HZCE  
t
LZCE  
LB, UB  
t
BA  
t
HZB  
t
LZB  
HIGH-Z  
DOUT  
DATA VALID  
Notes:  
1. WE is HIGH for a Read Cycle.  
2. The device is continuously selected. OE, CE, UB, or LB = VIL.  
3. Address is valid prior to or coincident with CE LOW transition.  
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)  
-55  
Min. Max.  
-70  
Min. Max.  
-100  
Min. Max.  
Symbol  
tWC  
Parameter  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Write Cycle Time  
55  
45  
45  
0
30  
70  
60  
60  
0
30  
100  
80  
80  
0
40  
tSCE  
tAW  
CE to Write End  
Address Setup Time to Write End  
Address Hold from Write End  
Address Setup Time  
LB, UB Valid to End of Write  
WE Pulse Width  
tHA  
tSA  
0
0
0
tPWB  
tPWE1  
tPWE2  
tSD  
45  
45  
45  
25  
0
60  
60  
60  
30  
0
80  
80  
80  
40  
0
WE Pulse Width  
Data Setup to Write End  
Data Hold from Write End  
WE LOW to High-Z Output  
WE HIGH to Low-Z Output  
tHD  
(3)  
tHZWE  
5
5
5
(3)  
tLZWE  
Notes:  
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to  
2.2V and output loading specified in Figure 1.  
2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states  
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to  
the rising or falling edge of the signal that terminates the write.  
3. Tested with the load in Figure 1. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.  
8
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
WRITE CYCLE NO. 1(CE Controlled, OE is HIGH or LOW) (1 )  
tWC  
1
VALID ADDRESS  
ADDRESS  
tSA  
tSCE  
tHA  
2
CE  
tAW  
tPWE1  
WE  
3
tPBW  
UB, LB  
4
tHZWE  
tLZWE  
HIGH-Z  
DATA UNDEFINED  
D
OUT  
5
tSD  
tHD  
DATAIN VALID  
DIN  
6
WRITE CYCLE NO. 2(OE is HIGH During Write Cycle) (1,2)  
tWC  
7
ADDRESS  
OE  
VALID ADDRESS  
tHA  
8
tSCE  
9
CE  
tAW  
tPWE1  
WE  
UB, LB  
DOUT  
10  
11  
12  
tSA  
tPBW  
tHZWE  
tLZWE  
HIGH-Z  
DATA UNDEFINED  
tSD  
tHD  
DATAIN VALID  
DIN  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
9
05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
WRITE CYCLE NO. 3(OE is LOW During Write Cycle) (1)  
t
WC  
ADDRESS  
VALID ADDRESS  
t
HA  
LOW  
OE  
CE  
t
SA  
t
t
SCE  
t
t
AW  
PWE2  
WE  
t
PBW  
UB, LB  
HZWE  
t
LZWE  
HIGH-Z  
DATA UNDEFINED  
D
OUT  
t
SD  
t
HD  
DATAIN VALID  
DIN  
10  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
WRITE CYCLE NO. 4(LB, UB Controlled, Back-to-Back Write) (1,3)  
t
WC  
t
WC  
1
ADDRESS 1  
ADDRESS 2  
ADDRESS  
OE  
CE  
2
t
SA  
3
t
HA  
t
HA  
WE  
4
t
PBW  
t
PBW  
UB, LB  
WORD 1  
WORD 2  
t
HZWE  
t
LZWE  
5
HIGH-Z  
DOUT  
DATA UNDEFINED  
t
HD  
t
SD  
6
DATAIN  
VALID  
DATAIN  
VALID  
DIN  
7
Notes:  
1. The internal Write time is defined by the overlap of CE = LOW, UB and/or LB = LOW, and WE = LOW. All signals must be  
in valid states to initiate a Write, but any can be deasserted to terminate the Write. The tSA, tHA, tSD, and tHD timing is  
referenced to the rising or falling edge of the signal that terminates the Write.  
2. Tested with OE HIGH for a minimum of 4 ns before WE = LOW to place the I/O in a HIGH-Z state.  
3. WE may be held LOW across many address cycles and the LB, UB pins can be used to control the Write function.  
8
9
10  
11  
12  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
11  
05/01/99  
TARGET SPECIFICATION  
®
ISSI  
IS62Ux12816 SERIES  
DATA RETENTION SWITCHING CHARACTERISTICS  
Symbol  
VDR  
Parameter  
Test Condition  
Min.  
Max.  
Unit  
V
Vcc for Data Retention  
Data Retention Current  
See Data Retention Waveform  
1.0  
3.3  
IDR  
Vcc = 1.0V, CE Vcc – 0.2V, VIN VCC – 0.2V  
or VIN 0.2V. No input may exceed Vcc+0.2V  
2
1
µA  
(For -LL version)  
(For -SL version)  
tSDR  
tRDR  
Data Retention Setup Time See Data Retention Waveform  
Recovery Time See Data Retention Waveform  
0
ns  
ns  
tRC  
DATA RETENTION WAVEFORM (CE Controlled)  
Data Retention Mode  
t
SDR  
t
RDR  
V
CC  
DR  
2.7V, 2.2V,  
1.8V, 1.6V  
V
CE VCC – 0.2V  
CE  
GND  
Note:  
1. 2.7V: IS62UP12816; 2.2V: IS62UR12816; 1.8V: IS62US12816; 1.6V: IS62UT12816.  
ORDERING INFORMATION — SL SERIES  
Industrial Range: –40°C to +85°C  
Commercial Range: 0°C to +70°C  
Speed (ns) Order Part No.  
55 IS62UP12816SL-55H  
Package  
Speed (ns) Order Part No.  
55 IS62UP12816SL-55HI  
Package  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
IS62UP12816SL-55BI  
IS62UR12816SL-55HI  
IS62UR12816SL-55BI  
IS62US12816SL-55HI  
IS62US12816SL-55BI  
IS62UT12816SL-55HI  
IS62UT12816SL-55BI  
IS62UP12816SL-55B  
IS62UR12816SL-55H  
IS62UR12816SL-55B  
IS62US12816SL-55H  
IS62US12816SL-55B  
IS62UT12816SL-55H  
IS62UT12816SL-55B  
70  
IS62UP12816SL-70HI  
IS62UP12816SL-70BI  
IS62UR12816SL-70HI  
IS62UR12816SL-70BI  
IS62US12816SL-70HI  
IS62US12816SL-70BI  
IS62UT12816SL-70HI  
IS62UT12816SL-70BI  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
70  
IS62UP12816SL-70H  
IS62UP12816SL-70B  
IS62UR12816SL-70H  
IS62UR12816SL-70B  
IS62US12816SL-70H  
IS62US12816SL-70B  
IS62UT12816SL-70H  
IS62UT12816SL-70B  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
100  
IS62UP12816SL-100H  
IS62UP12816SL-100B  
IS62UR12816SL-100H  
IS62UR12816SL-100B  
IS62US12816SL-100H  
IS62US12816SL-100B  
IS62UT12816SL-100H  
IS62UT12816SL-100B  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
100  
IS62UP12816SL-100HI  
IS62UP12816SL-100BI  
IS62UR12816SL-100HI sTSOP (II)  
IS62UR12816SL-100BI  
IS62US12816SL-100HI  
IS62US12816SL-100BI  
IS62UT12816SL-100HI  
IS62UT12816SL-100BI  
sTSOP (II)  
Mini BGA  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
12  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
05/01/99  
TARGET SPECIFICATION  
®
IS62Ux12816 SERIES  
ISSI  
ORDERING INFORMATION — SL LL RIES  
Industrial Range: –40°C to +85°C  
Commercial Range: 0°C to +70°C  
1
2
3
4
5
6
7
8
9
Speed (ns) Order Part No.  
55 IS62UP12816LL-55H  
Package  
Speed (ns) Order Part No.  
55 IS62UP12816LL-55HI  
Package  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
IS62UP12816LL-55BI  
IS62UR12816LL-55HI  
IS62UR12816LL-55BI  
IS62US12816LL-55HI  
IS62US12816LL-55BI  
IS62UT12816SL-55HI  
IS62UT12816LL-55BI  
IS62UP12816LL-55B  
IS62UR12816LL-55H  
IS62UR12816LL-55B  
IS62US12816LL-55H  
IS62US12816LL-55B  
IS62UT12816LL-55H  
IS62UT12816LL-55B  
70  
IS62UP12816LL-70HI  
IS62UP12816LL-70BI  
IS62UR12816LL-70HI  
IS62UR12816LL-70BI  
IS62US12816LL-70HI  
IS62US12816LL-70BI  
IS62UT12816LL-70HI  
IS62UT12816LL-70BI  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
70  
IS62UP12816LL-70H  
IS62UP12816LL-70B  
IS62UR12816LL-70H  
IS62UR12816LL-70B  
IS62US12816LL-70H  
IS62US12816LL-70B  
IS62UT12816LL-70H  
IS62UT12816LL-70B  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
100  
IS62UP12816LL-100H  
IS62UP12816LL-100B  
IS62UR12816LL-100H  
IS62UR12816LL-100B  
IS62US12816LL-100H  
IS62US12816LL-100B  
IS62UT12816LL-100H  
IS62UT12816LL-100B  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
100  
IS62UP12816LL-100HI  
IS62UP12816LL-100BI  
IS62UR12816LL-100HI  
IS62UR12816LL-100BI  
IS62US12816LL-100HI  
IS62US12816LL-100BI  
IS62UT12816LL-100HI  
IS62UT12816LL-100BI  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
sTSOP (II)  
Mini BGA  
®
ISSI  
Integrated Silicon Solution, Inc. 10  
2231 Lawson Lane  
Santa Clara, CA 95054  
Tel: 1-800-379-4774  
Fax: (408) 588-0806  
E-mail: sales@issi.com  
11  
www.issi.com 12  
Integrated Silicon Solution, Inc. — 1-800-379-4774  
TARGET SPECIFICATION SR065-0T  
13  
05/01/99  

相关型号:

IS62UP12816LL-100HI

Standard SRAM, 128KX16, 100ns, CMOS, PDSO44, STSOP2-44
ISSI

IS62UP12816LL-55B

Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, MINI, BGA-48
ISSI

IS62UP12816LL-55BI

Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, MINI, BGA-48
ISSI

IS62UP12816SL-100BI

Standard SRAM, 128KX16, 100ns, CMOS, PBGA48, MINI, BGA-48
ISSI

IS62UP12816SL-70B

Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, MINI, BGA-48
ISSI

IS62UP12816SL-70BI

Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, MINI, BGA-48
ISSI

IS62UP1288LL-100B

Standard SRAM, 128KX8, 100ns, CMOS, PBGA36, MINI, BGA-36
ISSI

IS62UP1288LL-100BI

Standard SRAM, 128KX8, 100ns, CMOS, PBGA36, MINI, BGA-36
ISSI

IS62UP1288LL-55HI

Standard SRAM, 128KX8, 55ns, CMOS, PDSO32, STSOP1-32
ISSI

IS62UP1288LL-70B

Standard SRAM, 128KX8, 70ns, CMOS, PBGA36, MINI, BGA-36
ISSI

IS62UP1288LL-70HI

Standard SRAM, 128KX8, 70ns, CMOS, PDSO32, STSOP1-32
ISSI

IS62UP1288SL-55B

Standard SRAM, 128KX8, 55ns, CMOS, PBGA36, MINI, BGA-36
ISSI