IS65WV12816BLL-55BA1 [ISSI]
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48;
| 型号： | IS65WV12816BLL-55BA1 |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48 静态存储器 内存集成电路 |
| 文件： | 总17页 (文件大小：383K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IS65WV12816ALL
IS65WV12816BLL
MARCH 2013
128K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
DESCRIPTION
FEATURES
The ISSI IS65WV12816ALL/ IS65WV12816BLL are
high-speed, 2M bit static RAMs organized as 128K words
by 16 bits. It is fabricated using ISSI's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
• High-speed access time: 55ns, 70ns
• CMOS low power operation:
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply:
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected) or when CS1 is LOW, CS2 is HIGH and both
LBandUBareHIGH, thedeviceassumesastandbymode
at which the power dissipation can be reduced down with
CMOS input levels.
1.65V to 2.2V Vdd (65WV12816ALL)
2.5V to 3.6V Vdd (65WV12816BLL)
• Fully static operation: no clock or refresh
Easymemory expansion is provided byusing Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory. A
data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
required
• Three state outputs
• Data control for upper and lower bytes
• 2CS Option Available
• Temperature Offerings:
The IS65WV12816ALL and IS65WV12816BLL are
packged in the JEDEC standard 48-pin mini BGA (6mm
x 8mm) and 44-Pin TSOP (TYPE II).
Option A: 0 to 70oC
Option A1: –40 to +85oC
Option A2: –40 to +105oC
Option A3: –40 to +125oC
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
128K x 16
MEMORY ARRAY
A0-A16
DECODER
VDD
GND
I/O0-I/O7
Lower Byte
I/O
DATA
CIRCUIT
COLUMN I/O
I/O8-I/O15
Upper Byte
CS2
CS1
OE
WE
UB
CONTROL
CIRCUIT
LB
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on
any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
1
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
PIN CONFIGURATIONS
48-Pin mini BGA (6mm x 8mm)
2 CS Option (Package Code B2)
48-Pin mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
1
2
3
4
5
6
A0
A3
A1
A4
A2
A0
A3
A1
A4
A2
LB
I/O
OE
UB
N/C
LB
OE
UB
CS2
A
B
C
D
E
F
A
B
C
D
E
F
CSI
I/O
0
I/O
8
CS1
I/O
0
8
I/O
I/O
A5
A6
I/O
1
I/O
I/O
I/O
A5
A6
I/O
1
I/O
2
9
10
2
9
10
GND
VDD
NC
NC
A14
A12
A7
GND
NC
NC
A14
A12
A7
I/O
I/O
I/O
I/O
I/O
VDD
I/O
I/O
I/O
I/O
I/O
VDD
11
3
4
5
11
3
4
5
GND
GND
A16
A15
A13
A10
V
DD
A16
A15
A13
A10
12
12
I/O
14
I/O
14
I/O
I/O
6
I/O
I/O
6
13
13
I/O
15
NC
A8
WE
I/O
NC
A8
WE
I/O
7
I/O
7
15
G
H
G
H
NC
NC
A9
A11
NC
A9
A11
NC
44-Pin mini TSOP (Type II)
(Package Code T)
PIN DESCRIPTIONS
A0-A16 Address Inputs
I/O0-I/O15
Data Inputs/Outputs
Chip Enable Input
CS1, CS2
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
OE
WE
LB
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
UB
NC
Vdd
GND
9
Power
10
11
12
13
14
15
16
17
18
19
20
21
22
VDD
Ground
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
VDD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
TRUTH TABLE
I/O PIN
I/O0-I/O7 I/O8-I/O15 Vdd Current
Mode
WE CS1 CS2
OE
LB
UB
Not Selected
X
X
X
H
X
X
X
L
X
X
X
X
X
X
H
X
X
H
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Isb1, Isb2
Isb1, Isb2
Isb1, Isb2
Output Disabled
Read
H
H
L
L
H
H
H
H
L
X
X
L
High-Z
High-Z
High-Z
High-Z
Icc
Icc
H
H
H
L
L
L
H
H
H
L
L
L
L
H
L
H
L
L
dout
High-Z
dout
High-Z
dout
dout
Icc
Write
L
L
L
L
L
L
H
H
H
X
X
X
L
H
L
H
L
L
dIn
High-Z
dIn
High-Z
dIn
dIn
Icc
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Vterm
tstg
Parameter
Value
Unit
Terminal Voltage with Respect to GND
Storage Temperature
–0.2 to Vdd+0.3
–65 to +150
1.0
V
°C
W
Pt
Power Dissipation
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli-
ability.
OPERATING RANGE (Vdd)
Option
A
Ambient Temperature
0°C to +70°C
IS65WV12816ALL
1.65V - 2.2V
IS65WV12816BLL
2.5V - 3.6V
A1
–40°C to +85°C
–40°C to +105°C
–40°C to +125°C
1.65V - 2.2V
2.5V - 3.6V
A2
1.65V - 2.2V
2.5V - 3.6V
A3
1.65V - 2.2V
2.5V - 3.6V
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
3
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Vdd
Min.
Max.
Unit
VoH
VoL
VIH
Output HIGH Voltage
IoH = -0.1 mA
IoH = -1 mA
1.65-2.2V
2.5-3.6V
1.4
2.2
—
—
V
V
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
IoL = 0.1 mA
IoL = 2.1 mA
1.65-2.2V
2.5-3.6V
—
—
0.2
0.4
V
V
1.65-2.2V
2.5-3.6V
1.4
2.2
Vdd + 0.2
Vdd + 0.3
V
V
(1)
VIL
1.65-2.2V
2.5-3.6V
–0.2
–0.2
0.4
0.8
V
V
ILI
Input Leakage
GND ≤ VIn ≤ Vdd
GND ≤ Vout ≤ Vdd, Outputs Disabled
–1
–1
1
1
µA
µA
ILo
Output Leakage
Notes:
1. VIL (min.) = –1.0V for pulse width less than 10 ns.
CAPACITANCE(1)
Symbol
cIn
Parameter
Conditions
VIn = 0V
Max.
8
Unit
Input Capacitance
pF
pF
cout
Input/Output Capacitance
Vout = 0V
10
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
4
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
IS65WV12816ALL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
Test Conditions
Options
Max.
-70 ns
15
20
7
7
Unit
mA
mA
mA
I
I
I
cc
cc
Vdd Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
V
I
V
I
dd = Max.,
out = 0 mA, f = fmaX
dd = Max.,
out = 0 mA, f = 0
A, A1
A2, A3
A, A1
A2, A3
A, A1
A2, A3
1
sb1
Vdd = Max.,
0.6
0.6
VIn = VIH or VIL
CS1 = VIH , CS2 = VIL
,
f = 1 MH
z
OR
ULB Control
Vdd = Max., VIn = VIH or VIL
CS1 = VIL, f = 0, UB = VIH, LB = VIH
I
sb2
CMOS Standby
Current (CMOS Inputs) CS1
V
dd = Max.,
A, A1
A2
A3
15
20
50
µA
≥ Vdd – 0.2V,
CS2 ≤ 0.2V,
VIn
≥
≤
V
dd – 0.2V, or
VIn
0.2V, f = 0
OR
ULB Control
Vdd = Max., CS1 = VIL, cs2=VIH
In ≤ 0.2V, f = 0; UB / LB = Vdd – 0.2V
V
IS65WV12816BLL, POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
Symbol Parameter
Test Conditions
Options
Max.
-55 ns -70 ns
25
30
7
7
Max.
Unit
mA
mA
mA
I
I
I
cc
cc
Vdd Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
V
I
V
I
dd = Max.,
out = 0 mA, f = fmaX
dd = Max.,
out = 0 mA, f = 0
A, A1
A2, A3
A, A1
A2, A3
A, A1
A2, A3
20
25
7
7
0.6
0.6
1
sb1
Vdd = Max.,
0.6
0.6
VIn = VIH or VIL
CS1 = VIH , CS2 = VIL
,
f = 1 MH
z
OR
ULB Control
Vdd = Max., VIn = VIH or VIL
CS1 = VIL, f = 0, UB = VIH, LB = VIH
I
sb2
CMOS Standby
Current (CMOS Inputs) CS1
V
dd = Max.,
A, A1
A2
A3
15
25
65
15
25
65
µA
≥ Vdd – 0.2V,
CS2 ≤ 0.2V,
VIn
≥
≤
V
dd – 0.2V, or
VIn
0.2V, f = 0
OR
ULB Control
Vdd = Max., CS1 = VIL, cs2=VIH
In ≤ 0.2V, f = 0; UB / LB = Vdd – 0.2V
V
Note:
1. At f = fmaX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC TEST CONDITIONS
Parameter
65WV12816ALL
(Unit)
65WV12816BLL
(Unit)
Input Pulse Level
0.4V to Vdd-0.2V
0.4V to Vdd-0.3V
Input Rise and Fall Times
5 ns
5ns
Input and Output Timing
and Reference Level
Vref
Vref
Output Load
See Figures 1 and 2
See Figures 1 and 2
65WV12816ALL
65WV12816BLL
(2.5V - 3.6V)
3070
(1.65V-2.2V)
3070
R1(Ω)
R2(Ω)ꢀ
3150
3150
ꢀ VRef
1.5V
0.9V
Vtm
1.8V
2.8V
AC TEST LOADS
R1
R1
VTM
VTM
OUTPUT
OUTPUT
R2
R2
30 pF
5 pF
Including
jig and
Including
jig and
scope
scope
Figure 1
Figure 2
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-55 ns
-70 ns
Symbol
trc
Parameter
Min.
Max.
—
Min.
Max.
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
55
—
10
—
—
—
5
70
—
10
—
—
—
5
taa
Address Access Time
Output Hold Time
55
—
70
—
toHa
tacs1/tacs2
tdoe
CS1/CS2 Access Time
OE Access Time
55
25
20
—
70
35
25
—
(2)
tHzoe
OE to High-Z Output
OE to Low-Z Output
CS1/CS2 to High-Z Output
CS1/CS2 to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
(2)
tLzoe
(2)
tHzcs1/tHzcs2
0
20
—
0
25
—
(2)
tLzcs1/tLzcs2
10
—
0
10
—
0
tba
55
20
—
70
25
—
tHzb
tLzb
0
0
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4 to 1.4V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
7
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)
tRC
ADDRESS
DOUT
tAA
t
OHA
tOHA
DATA VALID
PREVIOUS DATA VALID
AC WAVEFORMS
READ CYCLE NO. 2(1,3) (CS1, CS2, OE, AND UB/LB Controlled)
tRC
ADDRESS
OE
tAA
tOHA
tHZOE
tDOE
tLZOE
CS1
tACE1/tACE2
CS2
t
LZCE1/
tLZCE2
tHZCS1/
tHZCS2
LB, UB
tBA
tHZB
tLZB
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CS1, UB, or LB = VIL. cs2=WE=VIH.
3. Address is valid prior to or coincident with CS1 LOW transition.
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-55 ns
-70 ns
Symbol
Parameter
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
twc
Write Cycle Time
55
45
45
0
—
—
—
—
—
—
—
—
—
20
—
70
60
60
0
—
—
—
—
—
—
—
—
—
20
—
tscs1/tscs2 CS1/CS2 to Write End
taw
tHa
tsa
tPwb
tPwe
tsd
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
0
0
LB, UB Valid to End of Write
WE Pulse Width
45
40
25
0
60
50
30
0
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
tHd
tHzwe
tLzwe
(3)
—
5
—
5
(3)
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V, input pulse levels of 0.4V to 1.4V
and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CS1 LOW, CS2 HIGH and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but
any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the
write.
3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
9
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC WAVEFORMS
WRITE CYCLE NO. 1(1,2) (CS1 Controlled, OE = HIGH or LOW)
t
WC
ADDRESS
CS1
t
HA
tSCS1
tSCS2
CS2
tAW
t
PWE
WE
tPWB
LB, UB
t
SA
tHZWE
t
LZWE
HIGH-Z
SD
DOUT
DIN
DATA UNDEFINED
t
tHD
DATA-IN VALID
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 , CS2 and WE inputs and at
least one of the LB and UB inputs being in the LOW state.
2. WRITE = (CS1) [ (LB) = (UB) ] (WE).
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC WAVEFORMS
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
t
WC
ADDRESS
OE
t
HA
tSCS1
CS1
tSCS2
CS2
t
AW
t
PWE
WE
LB, UB
DOUT
DIN
t
SA
tHZWE
t
LZWE
HIGH-Z
SD
DATA UNDEFINED
t
t
HD
DATA-IN VALID
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
11
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC WAVEFORMS
WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle)
t
WC
ADDRESS
OE
t
HA
tSCS1
CS1
t
SCS2
CS2
t
AW
t
PWE
WE
LB, UB
DOUT
DIN
t
SA
tHZWE
t
LZWE
HIGH-Z
SD
DATA UNDEFINED
t
t
HD
DATA-IN VALID
12
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
AC WAVEFORMS
WRITE CYCLE NO. 4 (UB/LB Controlled)
t
WC
t
WC
ADDRESS
OE
ADDRESS 1
ADDRESS 2
t
SA
LOW
HIGH
CS1
t
HA
SA
t
HA
CS2
t
WE
t
PBW
t
PBW
WORD 1
WORD 2
LB, UB
DOUT
DIN
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
t
HD
t
HD
t
SD
t
SD
DATAIN
VALID
DATAIN
VALID
UB_CSWR4.eps
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13
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
DATA RETENTION SWITCHING CHARACTERISTICS (LL)
Symbol
Vdr
Parameter
Test Condition
Options
Min.
1.2
—
Typ.(1)
—
Max.
3.6
15
Unit
V
Vdd for Data Retention
Data Retention Current
See Data Retention Waveform
Vdd = 1.2V, CS1 ≥ Vdd – 0.2V
Idr
A, A1
A2
5
µA
—
—
25
A3
—
—
65
tsdr
trdr
Data Retention Setup Time See Data Retention Waveform
0
—
—
ns
ns
Recovery Time
See Data Retention Waveform
trc
—
—
o
Note 1: Typical values are measured at Vdd = 3.0V, Ta = 25 c and not 100% tested.
DATA RETENTION WAVEFORM (CS1 Controlled)
tSDR
Data Retention Mode
tRDR
VDD
1.65V
1.4V
VDR
CS1 ≥ VDD - 0.2V
CS1
GND
DATA RETENTION WAVEFORM (CS2 Controlled)
Data Retention Mode
VDD
3.0
tSDR
t
RDR
CE2
VDR
2.2V
CS2 ≤ 0.2V
0.4V
GND
14
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
ORDERING INFORMATION
IS65WV12816ALL (1.65V - 2.2V)
Temperature Range (A): 0°C to +70°C
Speed (ns)Order Part No.
70IS65WV12816ALL-70TA
IS65WV12816ALL-70BA
IS65WV12816ALL-70B2A
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Temperature Range (A1): –40°C to +85°C
Speed (ns)Order Part No.
70IS65WV12816ALL-70TA1
IS65WV12816ALL-70BA1
IS65WV12816ALL-70B2A1
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Temperature Range (A2): –40°C to +105°C
Speed (ns)Order Part No.
70IS65WV12816ALL-70TA2
IS65WV12816ALL-70BA2
IS65WV12816ALL-70B2A2
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Temperature Range (A3): –40°C to +125°C
Speed (ns)Order Part No.
70IS65WV12816ALL-70TA3
IS65WV12816ALL-70BA3
IS65WV12816ALL-70B2A3
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
15
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
ORDERING INFORMATION
IS65WV12816BLL (2.5V - 3.6V)
Temperature Range (A): 0°C to +70°C
Speed (ns)Order Part No.
55IS65WV12816BLL-55TA
IS65WV12816BLL-55BA
IS65WV12816BLL-55B2A
70IS65WV12816BLL-70TA
IS65WV12816BLL-70BA
IS65WV12816BLL-70B2A
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Temperature Range (A1): –40°C to +85°C
Speed (ns)Order Part No.
55IS65WV12816BLL-55TA1
IS65WV12816BLL-55BA1
IS65WV12816BLL-55B2A1
70IS65WV12816BLL-70TA1
IS65WV12816BLL-70BA1
IS65WV12816BLL-70B2A1
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
16
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
03/6/13
IS65WV12816ALL, IS65WV12816BLL
ORDERING INFORMATION (continual)
IS65WV12816BLL (2.5V - 3.6V)
TEMPERATURE RANGE (A2): –40°C TO +105°C
Speed (ns)Order Part No.
55IS65WV12816BLL-55TA2
IS65WV12816BLL-55BA2
IS65WV12816BLL-55B2A2
70IS65WV12816BLL-70TA2
IS65WV12816BLL-70BA2
IS65WV12816BLL-70B2A2
Package
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Temperature Range (A3): –40°C to +125°C
Speed (ns)Order Part No.
Package
55IS65WV12816BLL-55TA3
IS65WV12816BLL-55TLA3
TSOP
TSOP, Lead-free
IS65WV12816BLL-55BA3
IS65WV12816BLL-55BLA3
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), Lead-free
IS65WV12816BLL-55B2A3
70IS65WV12816BLL-70TA3
IS65WV12816BLL-70BA3
IS65WV12816BLL-70B2A3
mini BGA (6mm x 8mm), 2 CS Option
TSOP
mini BGA (6mm x 8mm)
mini BGA (6mm x 8mm), 2 CS Option
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
17
Rev. C
03/6/13
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