IS93C76A-3ZI [ISSI]
EEPROM, 512X16, Serial, CMOS, PDSO8, 0.169 INCH, TSSOP-8;
| 型号： | IS93C76A-3ZI |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | EEPROM, 512X16, Serial, CMOS, PDSO8, 0.169 INCH, TSSOP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
| 文件： | 总13页 (文件大小：94K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
IS93C76A IS93C86A
ISSI
8,192/16,384-BIT SERIAL ELECTRICALLY
ERASABLE PROM
Preliminary Information
May 2004
FEATURES
DESCRIPTION
®
• Industry-standard Microwire Interface
— Non-volatile data storage
IS93C76A/86A are 8kb/16kb non-volatile, ISSI
serial EEPROMs. They are fabricated using an
— Low voltage operation:
enhanced CMOS design and process. IS93C76A/
86A contains power-efficient read/write memory,
and organization of either 1,024/2,048 bytes of 8
bits or 512/1,024 words of 16 bits. When the
ORG pin is connected to Vcc or left unconnected,
x16 is selected; when it is connected to ground,
x8 is selected.
Vcc = 1.8V to 5.5V -2
Vcc = 2.5V to 5.5V -3
— Full TTL compatible inputs and outputs
— Auto increment for efficient data dump
• User Configured Memory Organization
— By 16-bit or by 8-bit
• Hardware and software write protection
— Defaults to write-disabled state at power-up
— Software instructions for write-enable/disable
• Enhanced low voltage CMOS E2PROM
technology
• Versatile, easy-to-use Interface
— Self-timed programming cycle
— Automatic erase-before-write
— Programming status indicator
— Word and chip erasable
An instruction set defines the operation of the
devices, including read, write, and mode-enable
functions. To protect against inadvertent data
modification, all erase and write instructions are
accepted only while the device are write-enabled.
A selected x8 byte or x16 word can be modified
with a single WRITE or ERASE instruction.
Additionally, the two instructions WRITE ALL or
ERASE ALL can program an entire array. Once a
device begins its self-timed program procedure,
the data out pin (Dout) can indicate the READY/
BUSY status by raising chip select (CS). The self-
timed write cycle includes an automatic erase-
before-write capability. The devices can output
any number of consecutive bytes/words using a
single READ instruction.
— Chip select enables power savings
• Durable and reliable
— 40-year data retention after 1M write cycles
— 1 million write cycles
— Unlimited read cycles
— Schmitt-trigger Inputs
• Industrial and Automotive Temperature Grade
FUNCTIONAL BLOCK DIAGRAM
DUMMY
BIT
DOUT
DATA
REGISTER
INSTRUCTION
REGISTER
R/W
AMPS
DIN
EEPROM
ARRAY
ADDRESS
REGISTER
INSTRUCTION
DECODE,
CONTROL,
AND
ADDRESS
DECODER
CS
1024/2048x8
512/1024x16
CLOCK
SK
GENERATION
HIGH VOLTAGE
GENERATOR
WRITE
ENABLE
Copyright © 2004 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
1
05/20/04
®
IS93C76A
IS93C86A
ISSI
PIN CONFIGURATIONS
8-Pin DIP, 8-Pin TSSOP
8-Pin JEDEC SOIC “GR”
CS
SK
1
2
3
4
8
7
6
5
VCC
NC
CS
SK
1
2
3
4
8
7
6
5
VCC
NC
DIN
ORG
GND
DIN
ORG
GND
D
OUT
D
OUT
instruction begins with a start bit of the logical “1” or
HIGH. Following this are the opcode (2 bits),
address field (10 or 11 bits), and data, if appropriate.
PIN DESCRIPTIONS
CS
Chip Select
The clock signal may be held stable at any moment to
suspend the device at its last state, allowing clock-
speed flexibility. Upon completion of bus
communication, CS would be pulled LOW. The device
then would enter Standby mode if no internal
programmingisunderway.
SK
Serial Data Clock
Serial Data Input
Serial Data Output
OrganizationSelect
NotConnected
Power
DIN
DOUT
ORG
NC
Read (READ)
Vcc
GND
The READ instruction is the only instruction that outputs
serial data on the DOUT pin. After the read instruction and
address have been decoded, data is transferred from the
selectedmemoryregisterintoa serialshiftregister.(Please
note that one logical “0” bit precedes the actual 8 or 16-bit
outputdatastring.)TheoutputonDOUT changesduringthe
low-to-high transitions of SK (see Figure 3).
Ground
Applications
The IS93C76A/86A are very popular in many
applications which require low-power, low-density
storage. Applications using these devices include
industrial controls, networking, and numerous other
Low Voltage Read
The IS93C76A/86A are designed to ensure that data read
operations are reliable in low voltage environments. They
provide accurate operation with Vcc as low as 1.8V.
consumer electronics.
Endurance and Data Retention
Auto Increment Read Operations
TheIS93C76A/86A aredesignedforapplicationsrequiring
up to 1M programming cycles (WRITE, WRALL, ERASE
andERAL). They provide40yearsofsecuredataretention
withoutpoweraftertheexecutionof1Mprogrammingcycles.
In the interest of memory transfer operation applications,
the IS93C76A/86A are designed to output a continuous
stream of memory content in response to a single read
operation instruction. To utilize this function, the system
asserts a read instruction specifying a start location ad-
dress. Once the 8 or 16 bits of the addressed register have
been clocked out, the data in consecutively higher address
locations is output. The address will wrap around continu-
ously with CS HIGH until the chip select (CS) control pin is
brought LOW. This allows for single instruction data dumps
to be executed with a minimum of firmware overhead.
Device Operations
The IS93C76A/86A are controlled by a set of
instructions which are clocked-in serially on the Din pin.
Before each low-to-high transition of the clock (SK), the
CS pin must have already been raised to HIGH, and the
Din value must be stable at either LOW or HIGH. Each
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
Write Enable (WEN)
Write All (WRALL)
The write enable (WEN) instruction must be executed
before any device programming (WRITE, WRALL,
ERASE, and ERAL) can be done. When Vcc is applied,
this device powers up in the write disabled state. The
devicethenremainsinawritedisabledstateuntilaWEN
instruction is executed. Thereafter, the device remains
enabled until a WDS instruction is executed or until Vcc
is removed. (See Figure 4.) (Note: Chip select must
remain LOW until Vcc reaches its operational value.)
Thewriteall(WRALL)instructionprogramsallregisterswith
the data pattern specified in the instruction. As with the
WRITE instruction, the falling edge of CS must occur to
initiate the self-timed programming cycle. If CS is then
broughtHIGHafteraminimumwaitof200ns(tCS),theDOUT
pin indicates the READY/BUSY status of the chip (see
Figure 6). Vcc is required to be above 4.5V for WRALL to
function properly.
Write Disable (WDS)
Write (WRITE)
The write disable (WDS) instruction disables all programming
capabilities. This protects the entire device against acci-
dental modification of data until a WEN instruction is
executed. (When Vcc is applied, this part powers up in the
write disabled state.) To protect data, a WDS instruction
should be executed upon completion of each programming
operation.
TheWRITEinstructionincludes8or16bitsofdatatobe
written into the specified register. After the last data bit
has been applied to DIN, and before the next rising edge
of SK, CS must be brought LOW. If the device is write-
enabled, then the falling edge of CS initiates the self-
timed programming cycle (see WEN).
IfCSisbroughtHIGH,afteraminimumwaitof200ns(5V
operation) after the falling edge of CS (tCS) DOUT will
indicatetheREADY/BUSYstatusofthechip.Logical“0”
meansprogrammingisstillinprogress;logical“1”means
the selected register has been written, and the part is
readyforanotherinstruction(seeFigure5).TheREADY/
BUSYstatuswillnotbeavailableif:a)TheCSinputgoes
HIGHaftertheendoftheself-timedprogrammingcycle,
tWP; or b) Simultaneously CS is HIGH, Din is HIGH, and
SK goes HIGH, which clears the status flag.
Erase Register (ERASE)
After the erase instruction is entered, CS must be brought
LOW.ThefallingedgeofCSinitiatestheself-timedinternal
programming cycle. Bringing CS HIGH after a minimum of
tCS, will cause DOUT to indicate the READ/BUSY status of the
chip:alogical“0”indicatesprogrammingisstillinprogress;
a logical “1” indicates the erase cycle is complete and the
part is ready for another instruction (see Figure 8).
Erase All (ERAL)
Fullchiperaseisprovidedforeaseofprogramming.Erasing
the entire chip involves setting all bits in the entire memory
array to a logical “1” (see Figure 9). Vcc is required to be
above 4.5V for ERALL to function properly.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
3
05/20/04
®
IS93C76A
IS93C86A
ISSI
INSTRUCTION SET - IS93C76A (8kb)
8-bit Organization
16-bit Organization
(ORG = GND)
(ORG = Vcc)
(1)
(1)
Instruction(2)
READ
Start Bit OP Code
Address
Input Data
Address
Input Data
1
1
1
1
1
1
1
10
00
01
00
00
11
00
x(A9-A0)
11x xxxx xxxx
x(A9-A0)
—
—
x(A8-A0)
—
—
WEN (Write Enable)
WRITE
11 xxxx xxxx
x(A8-A0)
(D7-D0)
(D7-D0)
—
(D15-D0)
(D15-D0)
—
WRALL (Write All Registers)
WDS (Write Disable)
ERASE
01x xxxx xxxx
00x xxxx xxxx
x(A9-A0)
01 xxxx xxxx
00 xxxx xxxx
x(A8-A0)
—
—
ERAL (Erase All Registers)
10x xxxx xxxx
—
10 xxxx xxxx
—
Notes:
1. x = Don't care bit.
2. If the number of bits clocked-in does not match the number corresponding to a selected command, all extra trailing bits are ignored,
and WRITE, WRALL, ERASE, ERAL, WEN, and WDS instructions are rejected, but READ is accepted.
INSTRUCTION SET - IS93C86A (16kb)
8-bit Organization
16-bit Organization
(ORG = GND)
(ORG = Vcc)
(1)
(1)
Instruction(2)
READ
Start Bit OP Code
Address
Input Data
Address
Input Data
1
1
1
1
1
1
1
10
00
01
00
00
11
00
(A10-A0)
11x xxxx xxxx
(A10-A0)
—
—
(A9-A0)
11 xxxx xxxx
(A9-A0)
—
—
WEN (Write Enable)
WRITE
(D7-D0)
(D7-D0)
—
(D15-D0)
(D15-D0)
—
WRALL (Write All Registers)
WDS (Write Disable)
ERASE
01x xxxx xxxx
00x xxxx xxxx
(A10-A0)
01 xxxx xxxx
00 xxxx xxxx
(A9-A0)
—
—
ERAL (Erase All Registers)
10x xxxx xxxx
—
10 xxxx xxxx
—
Notes:
1. x = Don't care bit.
2. If the number of bits clocked-in does not match the number corresponding to a selected command, all extra trailing bits are ignored,
and WRITE, WRALL, ERASE, ERAL, WEN, and WDS instructions are rejected, but READ is accepted.
4
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
V
VGND
TBIAS
TBIAS
TSTG
Voltage with Respect to GND
Temperature Under Bias (Industrial)
Temperature Under Bias (Automotive)
Storage Temperature
–0.3 to +6.5
–40 to +85
–40 to +125
–65 to +150
°C
°C
°C
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
OPERATING RANGE
Range
Ambient Temperature
VC C
Industrial
–40°Cto+85°C
1.8Vto5.5Vor2.5Vto5.5V
Automotive
–40°Cto+125°C
2.5Vto5.5V
CAPACITANCE
Symbol
CIN
Parameter
Conditions
Max.
Unit
Input Capacitance
Output Capacitance
VIN = 0V
5
5
pF
pF
COUT
VOUT = 0V
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
5
05/20/04
®
IS93C76A
IS93C86A
ISSI
DC ELECTRICAL CHARACTERISTICS
TA = –40°C to +85°C for Industrial and –40°C to +125°C for Automotive.
Symbol Parameter
TestConditions
IOL = 100 µA
IOL = 100 µA
IOL = 2.1mA
Vcc
Min.
—
Max.
0.2
0.2
0.4
—
Unit
VOL3
VOL2
VOL1
VOH3
VOH2
VOH1
VIH
OutputLOWVoltage
1.8V to 5.5V
2.5V to 5.5V
4.5V to 5.5V
1.8V to 5.5V
2.5V to 5.5V
4.5Vto5.5V
V
V
V
V
V
V
V
OutputLOWVoltage
OutputLOWVoltage
OutputHIGHVoltage
OutputHIGHVoltage
Output HIGH Voltage
Input HIGH Voltage
—
—
IOH = –100 µA
IOH = –100 µA
IOH =–400µA
VCC – 0.2
VCC – 0.2
2.4
—
—
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
0.7XVCC
0.7XVCC
2.0
VCC+1
VCC+1
VCC+1
VIL
Input LOW Voltage
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
–0.3
–0.3
–0.3
0.2XVCC
0.2XVCC
0.8
V
ILI
Input Leakage
VIN = 0V to VCC (CS, SK,
D
IN,ORG)
0
0
2.5
2.5
µA
µA
ILO
Output Leakage
VOUT = 0V to VCC, CS = 0V
N o t e s :
Automotive grade devices in this table are tested with Vcc = 2.5V to 5.5V and 4.5V to 5.5V. Operations with Vcc <2.5V is not specified.
POWER SUPPLY CHARACTERISTICS
TA = –40°C to +85°C for Industrial, and –40°C to +125°C for Automotive.
Symbol Parameter
TestConditions
Vcc
Min. Typ. Max.
Unit
ICC1
ICC2
ISB1
ISB2
Vcc Read Supply Current CS = VIH, SK = 1 MHz, CMOS input levels
CS = VIH, SK = 2 MHz, CMOS input levels
1.8V
2.5V
5.0V
—
—
—
0.1
0.2
0.5
1
1
2
mA
mA
mA
CS = VIH, SK = 2 MHz, CMOS input levels
Vcc Write Supply Current CS = VIH, SK = 1 MHz, CMOS input levels
CS = VIH, SK = 2 MHz, CMOS input levels
1.8V
2.5V
5.0V
—
—
—
0.5
1
2
1
2
3
mA
mA
mA
CS = VIH, SK = 2 MHz, CMOS input levels
Standby Current
Standby Current
CS = GND, SK = GND,
ORG = Vcc or Floating (x16)
1.8V
2.5V
5.0V
—
—
—
0.1
0.1
0.2
1
2
4
µA
µA
µA
CS = GND, SK = GND,
ORG = GND (x8)
1.8V
2.5V
—
—
6
6
10
10
µA
µA
5.0V
—
10
15
µA
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC ELECTRICAL CHARACTERISTICS
TA = –40°C to +85°C for Industrial
Symbol Parameter
TestConditions
Vcc
Min.
Max.
Unit
fSK
SK Clock Frequency
1.8V to 5.5V
2.5Vto5.5V
4.5Vto5.5V
0
0
0
1
2
3
Mhz
Mhz
Mhz
tSKH
tSKL
tCS
SK HIGH Time
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
250
200
200
—
ns
ns
ns
—
—
SK LOW Time
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
250
200
100
—
ns
ns
ns
—
—
Minimum CS LOW Time
CS Setup Time
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
250
200
200
—
ns
ns
ns
—
—
tCSS
tDIS
tCSH
tDIH
tPD1
tPD0
tSV
Relative to SK
Relative to SK
Relative to SK
Relative to SK
AC Test
1.8V to 5.5V
2.5V to 5.5V
4.5V to 5.5V
200
100
50
—
ns
ns
ns
—
—
Din Setup Time
CS Hold Time
1.8Vto5.5V
2.7Vto5.5V
4.5Vto5.5V
100
50
50
—
ns
ns
ns
—
—
1.8Vto5.5V
2.5Vto5.5V
4.5V to 5.5V
0
0
0
—
ns
ns
ns
—
—
Din Hold Time
1.8V to 5.5V
2.5Vto5.5V
4.5Vto5.5V
50
50
50
—
ns
ns
ns
—
—
Output Delay to “1”
Output Delay to “0”
CS to Status Valid
CS to Dout in 3-state
Write Cycle Time
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
—
400
200
100
ns
ns
ns
—
—
AC Test
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
—
400
200
100
ns
ns
ns
—
—
AC Test
1.8Vto5.5V
2.5Vto5.5V
4.5Vto5.5V
—
400
200
200
ns
ns
ns
—
—
tDF
ACTest,CS=VIL
1.8Vto5.5V
2.5Vto5.5V
4.5V to 5.5V
—
100
100
100
ns
ns
ns
—
—
tWP
1.8Vto5.5V
2.5Vto5.5V
4.5V to 5.5V
—
—
—
10
5
5
ms
ms
ms
Notes:
1. C = 100pF
L
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
7
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC ELECTRICAL CHARACTERISTICS
TA = –40°C to +125°C for Automotive
Symbol Parameter
TestConditions
Vcc
Min.
Max.
Unit
fSK
SK Clock Frequency
2.5V to 5.5V
4.5V to 5.5V
0
0
2
3
Mhz
Mhz
tSKH
tSKL
tCS
SK HIGH Time
2.5V to 5.5V
4.5V to 5.5V
200
200
—
—
ns
ns
SK LOW Time
2.5V to 5.5V
4.5V to 5.5V
200
100
—
—
ns
ns
Minimum CS LOW Time
CS Setup Time
2.5V to 5.5V
4.5Vto5.5V
200
200
—
—
ns
ns
tCSS
tDIS
tCSH
tDIH
tPD1
tPD0
tSV
Relative to SK
Relative to SK
Relative to SK
Relative to SK
AC Test
2.5V to 5.5V
4.5V to 5.5V
100
50
—
—
ns
ns
Din Setup Time
2.5V to 5.5V
4.5Vto5.5V
50
50
—
—
ns
ns
CS Hold Time
2.5Vto5.5V
4.5Vto5.5V
0
0
—
—
ns
ns
Din Hold Time
2.5Vto5.5V
4.5Vto5.5V
50
50
—
—
ns
ns
Output Delay to “1”
Output Delay to “0”
CS to Status Valid
CS to Dout in 3-state
Write Cycle Time
2.5Vto5.5V
4.5Vto5.5V
—
—
200
100
ns
ns
AC Test
2.5Vto5.5V
4.5Vto5.5V
—
—
200
100
ns
ns
AC Test
2.5Vto5.5V
4.5Vto5.5V
—
—
200
200
ns
ns
tDF
ACTest,CS=VIL
2.5Vto5.5V
4.5Vto5.5V
—
—
100
100
ns
ns
tWP
2.5Vto5.5V
4.5Vto5.5V
—
—
5
5
ms
ms
N o t e s :
1. C L = 100pF
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC WAVEFORMS
FIGURE 2. SYNCHRONOUS DATA TIMING
CS
T
t
CSS
t
SKH
t
SKL
tCSH
SK
t
DIS
tDIH
DIN
t
PD0
t
PD1
t
t
DF
DF
D
OUT
(READ)
t
SV
DOUT
STATUS VALID
(WRITE)
(WRALL)
(ERASE)
(ERAL)
FIGURE 3. READ CYCLE TIMING
t
CS
CS
D
IN
1
1
0
An
A0
0
*
D0
D
OUT
Dm
*Address Pointer Cycles to the Next Register
Notes:
To determine address bits An-A0 and data bits Dm-Do, see Instruction Set for the specific device.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
9
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC WAVEFORMS
FIGURE 4. WRITE ENABLE (WEN) CYCLE TIMING
t
CS
CS
DIN
1
0
0
1
1
DOUT = 3-state
FIGURE 5. WRITE (WRITE) CYCLE TIMING
t
CS
CS
1
0
1
An
A0
Dm
D0
DIN
t
SV
tDF
DOUT
BUSY
READY
t
WP
Notes:
1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status
(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.
2. To determine address bits An-A0 and data bits Dm-D0, see Instruction Set for the specific device.
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC WAVEFORMS
FIGURE 6. WRITE ALL (WRALL) CYCLE TIMING
t
CS
CS
1
0
0
0
1
Dm
D0
DIN
t
SV
BUSY
READY
DOUT
t
WP
Notes:
1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status
(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.
2. To determine data bits Dm-D0, see Instruction Set for the appropriate device.
FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING
t
CS
CS
1
0
0
0
0
DIN
DOUT = 3-STATE
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
11
05/20/04
®
IS93C76A
IS93C86A
ISSI
AC WAVEFORMS
FIGURE 8. ERASE (REGISTER ERASE) CYCLE TIMING
t
CS
CS
DIN
1
1
1
An
An-1
A0
t
SV
BUSY
WP
tDF
DOUT
READY
t
Notes:
To determine data bits An - A0, see Instruction Set for the appropriate device.
FIGURE 9. ERASE ALL (ERAL) CYCLE TIMING
t
CS
CS
1
0
0
1
0
DIN
t
SV
BUSY
WP
t
DF
DOUT
READY
t
Note for Figures 8 and 9:
After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status
(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.
12
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
05/20/04
®
IS93C76A
IS93C86A
ISSI
ORDERING INFORMATION
Industrial Range: -40ºC to +85ºC
Speed
Voltage Range
Order Part No.
Package
2Mhz *
2.5V to 5.5V
IS93C76A-3PI
300-mil Plastic DIP
IS93C76A-3GRI
IS93C76A-3ZI
SOIC JEDEC
169-milTSSOP
2Mhz *
1Mhz *
1Mhz *
2.5V to 5.5V
1.8V to 5.5V
1.8V to 5.5V
IS93C86A-3PI
300-mil Plastic DIP
IS93C86A-3GRI
IS93C86A-3ZI
SOIC JEDEC
169-milTSSOP
IS93C76A-2PI
300-mil Plastic DIP
IS93C76A-2GRI
IS93C76A-2ZI
SOIC JEDEC
169-milTSSOP
IS93C86A-2PI
300-mil Plastic DIP
IS93C86A-2GRI
IS93C86A-2ZI
SOIC JEDEC
169-milTSSOP
* The specification allows higher speed. Please see AC Characteristics for more information.
ORDERING INFORMATION
AutomotiveRange:-40ºCto+125ºC
Speed
Voltage Range
Order Part No.
IS93C76A-3PA
IS93C76A-3GRA
IS93C86A-3PA
IS93C86A-3GRA
IS93C76A-PA
Package
2Mhz *
2.5V to 5.5V
300-mil Plastic DIP
SOIC JEDEC
2 Mhz *
3Mhz
2.5V to 5.5V
4.5V to 5.5V
4.5V to 5.5V
300-mil Plastic DIP
SOIC JEDEC
300-mil Plastic DIP
SOIC JEDEC
IS93C76A-GRA
IS93C86A-PA
3Mhz
300-mil Plastic DIP
SOIC JEDEC
IS93C86A-GRA
* The specification allows higher speed. Please see AC Characteristics for more information.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00C
13
05/20/04
相关型号：
©2020 ICPDF网 联系我们和版权申明