CPC5001G [IXYS]

Dual, One Channel Each Direction Digital Optical Isolator; 双通道,一个通道的每个方向的数字隔离器
CPC5001G
型号: CPC5001G
厂家: IXYS CORPORATION    IXYS CORPORATION
描述:

Dual, One Channel Each Direction Digital Optical Isolator
双通道,一个通道的每个方向的数字隔离器

文件: 总9页 (文件大小:203K)
中文:  中文翻译
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CPC5001  
Dual, One Channel Each Direction  
Digital Optical Isolator  
INTEGRATED  
C
IRCUITS  
D
IVISION  
Features  
Description  
Isolates One Signal in Each Direction  
Operates From 2.7V to 5.5V  
Buffered Inputs - No External LED Drive Required  
Voltage Level Translation  
The CPC5001 is a dual, non-inverting digital optical  
isolator with buffered-logic inputs and open-drain  
outputs. Channel 1 propagates a signal from Side A to  
Side B, while Channel 2 sends a signal from Side B to  
Hysteresis at Inputs for Noise Rejection  
Slew-Limited Drivers Reduce EMI  
Power-Down to Hi-Z Does Not Load Outputs  
5Mbaud Data Rate  
Side A. It provides galvanic isolation up to 3750V  
When the two sides are powered by supplies with  
different voltages, it also functions as a logic level  
translator for supply voltages as low as 2.7V or as high  
as 5.5V. Available in 8-pin DIP and surface mount  
packages, it functionally replaces two logic buffers and  
two single-channel optoisolators. Internal bandgap  
references regulate the LED drive currents to 3mA to  
reduce peak power requirements.  
.
rms  
8-Pin DIP or Surface Mount Packages  
Applications  
Isolated Signal Monitoring and Control  
Power-Over-Ethernet  
Power Supply High-Side Interface  
Logic-Level Translation  
Unlike transformer or capacitive isolators, optical  
isolation passes DC signals, and does not need to be  
clocked periodically to refresh state. Buffered signals  
will always return to their proper value after a transient  
interruption at either side.  
Microprocessor System Interface  
2
Inter-Integrated Circuit (I C) Interface  
Serial Peripheral Interface (SPI)  
Full Duplex Communication  
Isolated Line Receiver  
Isolated Data Acquisition Systems  
Ordering Information  
Approvals  
UL Recognized Component: File E76270  
CSA: Pending  
Part  
Description  
CPC5001G  
8-Pin DIP in Tubes (50 / Tube)  
8-Pin Surface Mount (50 / Tube)  
CPC5001GS  
EN/IEC 60950: Pending  
CPC5001GSTR 8-Pin Surface Mount (1000 / Reel)  
Pb  
e3  
Figure 1. CPC5001 Functional Block Diagram  
VDDB  
CHANNEL 1  
VDDA  
VDDB  
1
8
IN1  
VDDB  
GNDB  
LED  
2
3
4
7
OUT1  
GNDA  
OUT2  
B
VDDA  
A
CHANNEL 2  
VDDB  
6
5
GNDB  
IN2  
B
VDDA  
LED  
VDDA  
A
GNDA  
DS-CPC5001-R01  
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CPC5001  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1 Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.2 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.4 ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.5 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.6 General Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.7 Electrical Parametric Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.8 Timing Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
1.9 Common Mode Rejection Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
2. Switching Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
3. Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
5.3 Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
2
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CPC5001  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.2 Pin Description  
1 Specifications  
Pin#  
Name  
Description  
Input, Channel 1  
1.1 Package Pinout  
1
2
3
4
5
6
7
8
IN1  
GNDA  
OUT2  
VDDA  
Supply Return - Side A  
Output, Channel 2  
1
2
3
4
8
7
6
5
Supply Voltage - Side A  
Input, Channel 2  
IN2  
GNDB  
OUT1  
VDDB  
Supply Return - Side B  
Output, Channel 1  
Supply Voltage - Side B  
1.3 Absolute Maximum Ratings  
Electrical Absolute Maximum Ratings are at 25°C. Voltages with respect to local ground: GNDA or GNDB.  
Parameter  
Symbol  
VDDA  
VDDB  
VIOx  
Min  
Max  
Units  
Supply Voltage, Side A  
Supply Voltage, Side B  
Input Voltage  
-0.5  
-0.5  
+6.5  
+6.5  
V
V
VDDx + 0.3  
-0.3  
-
V
Total Package Power Dissipation 1  
Isolation Voltage, Input to Output  
60 Seconds  
800  
mW  
PTOT  
-
3750  
4500  
-40  
-
-
Vrms  
2 Seconds  
TA  
Operating Temperature  
+85  
°C  
Operating Relative Humidity  
(Non-condensing)  
RH  
%
5
85  
TSTG  
Storage Temperature  
-50  
+125  
°C  
1
Derate total power by 7.5mW/°C above 25°C.  
Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device.  
Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not  
implied.  
1.4 ESD Rating  
ESD Rating (Human Body Model)  
4000V  
1.5 Thermal Characteristics  
Parameter  
Conditions  
Symbol  
Min  
Typ  
Max  
Units  
RJA  
Thermal Resistance, Junction to Ambient  
Free Air  
-
114  
-
°C/W  
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CPC5001  
INTEGRATED  
C
IRCUITS  
D
IVISION  
1.6 General Conditions  
Unless otherwise specified, minimum and maximum values are guaranteed by production testing requirements.  
Typical values are characteristic of the device at 25°C, and are the result of engineering evaluations. They are  
provided for information purposes only, and are not part of the manufacturing testing requirements. Specifications  
cover the operating temperature range T = -40°C to +85°C, unless otherwise specified.  
A
Side A is the same as Side B, and Channel 1 is the same as Channel 2; therefore, the electrical and timing  
specifications apply to both Sides/Channels.  
1.7 Electrical Parametric Specifications  
Parameter  
Conditions  
Symbol  
VDD  
Min  
Typ  
Max  
Units  
V
Electrical  
Supply Voltage  
ISINK=6mA  
2.7  
-
5.5  
-
Supply Current  
VDD=3.3V, ISINK=0mA  
ISINK=6mA  
-
-
-
4.3  
4.4  
5
IDD  
-
mA  
VDD=5.5V, ISINK=0mA, TA=25°C  
IN1=OUT2=VDDA, IN2=OUT1=VDDB  
7.5  
Leakage Current  
ILEAK  
VIL  
A  
V
-
0.01  
10  
Falling Input Low Threshold  
Rising Input High Threshold  
Hysteresis  
2.7V < VDD < 5.5V  
2.7V < VDD < 5.5V  
0.3VDD  
0.42VDD  
-
VIH  
0.57VDD  
0.15VDD  
0.7VDD  
-
2.7V < VDD < 5.5V  
VDD=2.7V, ISINK=3mA  
VHYST  
V
-
-
-
-
-
-
0.35  
0.7  
-
Output Drive  
0.21  
0.42  
0.38  
+1.2  
VDD=2.7V, ISINK=6mA  
VOL  
TC  
V
VDD=3.3V, ISINK=6mA  
2.7V < VDD < 5.5V, ISINK=6mA  
Output Temperature Coefficient  
-
mV/°C  
1.8 Timing Specifications  
Parameter  
Conditions  
Symbol  
Min  
Typ  
Max  
Units  
MHz  
ns  
Timing  
Clock Frequency  
ISINK=6mA, CLOAD=20pF  
VDDA=VDDB=3.3V,  
fMAX  
-
5
-
Propagation Delay (see Note 1)  
High to Low  
R
PUA=475, RPUB=475  
IN_A=CIN_B=20pF  
VIN=0.5VDD_IN to VOUT=0.5VDD_OUT  
tPHL  
tPLH  
40  
40  
60  
135  
75  
100  
250  
170  
C
Low to High  
tPLH - tPHL  
Pulse Width Distortion  
PWD  
-25  
ns  
Note 1: See “Switching Waveforms” on page 5.  
1.9 Common Mode Rejection Specifications  
Parameter  
Common Mode Rejection  
Common Mode Transient Immunity  
VOUT = High  
Conditions  
Symbol  
Min  
Typ  
Max  
Units  
VCM=20VP-P , VDD=3.3V, TA=25°C  
VOUT>2V  
CMH  
CML  
5
7
-
-
-
-
kV/s  
VOUT = Low  
VOUT<0.8V  
4
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IRCUITS  
D
IVISION  
2 Switching Waveforms  
VOUT  
4.0  
3.0  
2.0  
1.0  
tPLH  
0.5 • VDD = 1.65V  
0
0
0.275  
0.55  
0.825  
1.1  
VIN  
TIME (μs)  
4.0  
tPHL  
3.0  
2.0  
1.0  
0
0.5 • VDD = 1.65V  
0
0.275  
0.55  
0.825  
1.1  
TIME (μs)  
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CPC5001  
INTEGRATED  
C
IRCUITS  
D
IVISION  
3 Performance Characteristics  
Typical Output Voltage, VOLA , VOLB  
Supply Current IDDA, IDDB  
vs.Temperature  
VIL Falling, VIH Rising  
vs. Supply Voltage  
vs. Supply Voltage  
(ISINKA=6mA)  
0.70  
0.65  
0.60  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
0.55  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
0.50  
VIH  
VDD=2.7V  
VDD=3.3V  
0.45  
VDD=5.5V  
0.40  
0.35  
0.30  
0.25  
VIL  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
-40  
-20  
0
20  
40  
60  
80  
100  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
Supply Voltage (V)  
Temperature (ºC)  
Supply Voltage (V)  
Logic-Low Output Level VOL  
vs. Supply Voltage  
(ISINK=6mA)  
Supply Current IDDA, IDDB  
vs.Temperature  
(VDD=5.5V, RPU=820Ω)  
Propagation Delay A to B and B to A  
(VDD=3.3V, CL=20pF, RPU=475Ω)  
0.60  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
160  
140  
120  
100  
80  
5.5  
5.4  
5.3  
5.2  
5.1  
5.0  
4.9  
4.8  
4.7  
4.6  
4.5  
tPLH  
tPHL  
60  
40  
-40  
-20  
0
20  
40  
60  
80  
100  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
-40  
-20  
0
20  
40  
60  
80  
100  
Temperature (ºC)  
Supply Voltage (V)  
Temperature (ºC)  
4 Functional Description  
4.1 Introduction  
The CPC5001 combines the functions of two input  
buffer/LED driver gates and two unidirectional logic  
optoisolators in a single 8-pin package. The isolators  
are arranged for one input and one output at each side  
of the isolation barrier, which enables Channel 1 to  
send signals from side A to Side B, and Channel 2 to  
send signals from the Side B to the Side A. If different  
supply voltage levels are used at each side, then the  
part, in conjunction with its external pullup resistors,  
drive current levels over the allowed range of V  
DD  
voltages. The supply currents at I  
and I  
are  
DDA  
DDB  
much smaller than those required by bipolar solutions,  
and are stable over temperature. The circuits also  
ensure that the I current into each V package pin  
DD  
DD  
remains constant for both high and low input signals.  
This can greatly reduce the size of external decoupling  
capacitors when compared with optoisolators  
fabricated in a bipolar process wherein the supply  
current can double when the LED is on.  
will perform logic level translation for V between  
DD  
2.7V and 5.5V at either side.  
The rotationally symmetric pinout ensures that the  
part operates normally even if installed with 180°  
rotation.  
The part provides galvanic isolation for voltages up to  
3750V . Its CMOS circuitry includes a bandgap  
rms  
reference to ensure that the LEDs receive consistent  
6
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IRCUITS  
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IVISION  
5 Manufacturing Information  
5.1 Moisture Sensitivity  
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated  
Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the  
latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product  
evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee  
proper operation of our devices when handled according to the limitations and information in that standard as well as  
to any limitations set forth in the information or standards referenced below.  
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced  
product performance, reduction of operable life, and/or reduction of overall reliability.  
This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to  
the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.  
Device  
Moisture Sensitivity Level (MSL) Rating  
CPC5001G / CPC5001GS  
MSL 1  
5.2 ESD Sensitivity  
This product is ESD Sensitive, and should be handled according to the industry standard  
JESD-625.  
5.3 Reflow Profile  
This product has a maximum body temperature and time rating as shown below. All other guidelines of  
J-STD-020 must be observed.  
Device  
Maximum Temperature x Time  
CPC5001G / CPC5001GS  
250°C for 30 seconds  
5.4 Board Wash  
IXYS Integrated Circuits Division recommends the use of no-clean flux formulations. However, board washing to  
remove flux residue is acceptable. Since IXYS Integrated Circuits Division employs the use of silicone coating as an  
optical waveguide in many of its optically isolated products, the use of a short drying bake may be necessary if a wash  
is used after solder reflow processes. Chlorine-based or Fluorine-based solvents or fluxes should not be used.  
Cleaning methods that employ ultrasonic energy should not be used.  
Pb  
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INTEGRATED  
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IRCUITS  
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IVISION  
5.5 Mechanical Dimensions  
5.5.1 CPC5001G Package  
9.652 0.381  
(0.380 0.015)  
PCB Hole Pattern  
7.620 0.254  
(0.300 0.010)  
2.540 0.127  
(0.100 0.005)  
8-0.800 DIA.  
2.540 0.127  
(8-0.031 DIA.)  
(0.100 0.005)  
9.144 0.508  
(0.360 0.020)  
6.350 0.127  
(0.250 0.005)  
6.350 0.127  
(0.250 0.005)  
3.302 0.051  
(0.130 0.002)  
Pin 1  
0.457 0.076  
(0.018 0.003)  
7.620 0.127  
(0.300 0.005)  
7.239 TYP.  
(0.285)  
7.620 0.127  
(0.300 0.005)  
4.064 TYP  
(0.160)  
0.254 0.0127  
(0.010 0.0005)  
Dimensions  
0.813 0.102  
mm  
(0.032 0.004)  
(inches)  
5.5.2 CPC5001GS Package  
9.652 0.381  
(0.380 0.015)  
PCB Land Pattern  
0.635 0.127  
(0.025 0.005)  
2.540 0.127  
3.302 0.051  
2.54  
(0.100 0.005)  
(0.10)  
(0.130 0.002)  
9.525 0.254  
(0.375 0.010)  
6.350 0.127  
(0.250 0.005)  
8.90  
(0.3503)  
1.65  
(0.0649)  
7.620 0.254  
(0.300 0.010)  
Pin 1  
0.457 0.076  
(0.018 0.003)  
0.254 0.0127  
(0.010 0.0005)  
0.65  
(0.0255)  
4.445 0.127  
(0.175 0.005)  
Dimensions  
mm  
(inches)  
0.813 0.102  
(0.032 0.004)  
8
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IRCUITS  
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IVISION  
5.5.3 CPC5001GS Tape & Reel Information  
330.2 DIA.  
(13.00 DIA.)  
W=16.00  
(0.63)  
Top Cover  
Tape Thickness  
0.102 MAX.  
(0.004 MAX.)  
Bo=10.30  
(0.406)  
Ao=10.30  
(0.406)  
P=12.00  
(0.472)  
K0=4.90  
(0.193)  
K1=4.20  
(0.165)  
User Direction of Feed  
Dimensions  
mm  
Embossed Carrier  
(inches)  
NOTES:  
1. Dimensions carry tolerances of EIA Standard 481-2  
Embossment  
2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2  
For additional information please visit our website at: www.ixysic.com  
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make  
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated  
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its  
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.  
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other  
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe  
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.  
Specification: DS-CPC5001-R01  
©Copyright 2013, IXYS Integrated Circuits Division  
All rights reserved. Printed in USA.  
7/30/2013  
R01  
www.ixysic.com  
9

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