G4000EC450 [IXYS]
Gate Turn-Off SCR, 2540A I(T)RMS, 4500V V(DRM), 18V V(RRM), 1 Element,;
| 型号： | G4000EC450 |
| 厂家： | 
IXYS CORPORATION |
| 描述： | Gate Turn-Off SCR, 2540A I(T)RMS, 4500V V(DRM), 18V V(RRM), 1 Element, 栅 栅极 |
| 文件： | 总13页 (文件大小：252K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Date:- 27 Sep, 2004
Data Sheet Issue:- 1
WESTCODE
An IXYS Company
Anode Shorted Gate Turn-Off Thyristor
Type G4000EC450
Absolute Maximum Ratings
MAXIMUM
UNITS
VOLTAGE RATINGS
LIMITS
4500
4500
18
VDRM
VDSM
VRRM
VDC-link
Repetitive peak off-state voltage, (note 1)
Non-repetitive peak off-state voltage, (note 1)
Repetitive peak reverse voltage
V
V
V
V
Maximum continuous DC-link voltage
2800
MAXIMUM
LIMITS
UNITS
A
nH
A
A
kA
RATINGS
ITGQM
Ls
IT(AV)M
IT(RMS)
ITSM
Maximum peak turn-off current, (note 2)
Snubber loop inductance, ITM=ITGQM, (note 2)
4000
300
Mean on-state current, Tsink=55°C (note 3)
Nominal RMS on-state current, 25°C (note 3)
Peak non-repetitive surge current tp=10ms, (Note 4)
Peak non-repetitive surge current tp=2ms, (Note 4)
I2t capacity for fusing tp=10ms
1270
2540
25
32
ITSM2
kA
I2t
3.13×106
500
A2s
A/µs
V
di/dtcr
VRGM
Tj op
Critical rate of rise of on-state current, (note 5)
Peak reverse gate voltage (note 6).
18
Operating temperature range
Storage temperature range
-40 to +125
-40 to +125
°C
°C
Tstg
Notes: -
1) VGK≤-2Volts.
2) Tj=125°C, VD=67%VDM, VDM<VDRM, diGQ/dt=40A/µs, CS=6µF.
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Tj(initial)=125°C, single phase, 180° sinewave, re-applied voltage VD=VR≤10V.
5) IT=4000A repetitive, IGM=50A, diGM/dt=40A/µs, for higher di/dt please consult the factory.
6) May exceed this value during turn-off avalanche period.
Data Sheet. Type G4000EC450 Issue 1
Page 1 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Characteristics
UNITS
V
Parameter
Maximum peak on-state voltage
MIN
-
TYP MAX TEST CONDITIONS
VTM
IL
-
4.40 IT=4000A
Latching current
-
-
100 Tj=25°C
100 Tj=25°C
A
IH
Holding current.
-
-
A
dv/dtcr Critical rate of rise of off-state voltage
1000
-
-
VD=3000V, VG=0V/RG=0Ω
V/µs
mA
mA
mA
V
Rated VDRM, VGR≤-2V
Rated VRRM, RGK=∞
VGR=-16V
IDRM
IRRM
IGKM
VGT
IGT
td
Peak off state current
Peak reverse current
Peak negative gate leakage current
Gate trigger voltage
Gate trigger current
Delay time
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
100
-
50
-
50
-
1.2
Tj=25°C, VD=24V, RA=0.1Ω
Tj=25°C, VD=24V, RA=0.1Ω
-
4.0
A
2.5
5.0
7.5
3.3
25
3.0
28
10
-
-
µs
tr
Rise time
-
µs
VD=50%VDRM, ITGQ=4000A, diT/dt=300A/µs,
I
GM=50A, diG/dt=40A/µs, CS=6µF
tgt
Turn-on time
-
µs
EON
tS
Turn-on energy per pulse
Storage time
-
J
-
µs
tf
Fall time
-
µs
tgq
Turn-off time
-
µs
VD=50%VDRM, VDM=VDRM, ITGQ=ITGQM
,
diGQ/dt=40A/µs, CS=6µF, LS=300nH
EOFF
IGQM
QGQ
Turn-off energy per pulse
Peak turn-off gate current
Turn-off gate charge
-
1000
-
J
A
18
-
µC
K/W
K/W
K/W
kN
kg
-
-
0.015 Double side cooled
0.026 Anode side cooled
0.031 Cathode side cooled
RthJK
Thermal resistance junction to sink
-
-
-
F
Mounting force
Weight
36
-
-
44
-
(see note 2)
Wt
1.5
Notes: -
1) Unless otherwise indicated Tj=125oC.
2) For other clamping forces, consult factory.
Data Sheet. Type G4000EC450 Issue 1
Page 2 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Notes on ratings and characteristics.
1. Maximum Ratings.
1.1 Off-state voltage ratings.
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For
other gate conditions see the curves of figure 5. It should be noted that VDRM is the repeatable peak
voltage which may be applied to the device and does not relate to a DC operating condition. While not
given in the ratings, VDC should ideally be limited to 55% VDRM in this product.
Diagram 1.
1.2 Reverse voltage rating.
All devices in this series have a minimum VRRM of 18 Volts.
1.3 Peak turn-off current.
The figure given in maximum ratings is the highest value for normal operation of the device under
conditions given in note 2 of ratings. For other combinations of ITGQ and Cs see the curve in figure 10. The
curves are effective over the normal operating range of the device and assume a snubber circuit
equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is
employed then the equivalent CS should be used and Ls<0.2µH must be ensured for the curves to be
applied.
L
s
R
D
s
C
s
Diagram 2.
1.4 R.M.S and average current.
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° half-
sinewave. These are included as a guide to compare the alternative types of GTO thyristors available,
values can not be applied to practical applications, as they do not include switching losses.
1.5 Surge rating and I2t.
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 2.
1.6 Snubber loop inductance.
Use of GTO thyristors with snubber loop inductance, Ls<0.2µH implies no dangerous Vs voltages (see
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively
Vs should be limited to 800 Volts to avoid possible device failure.
Data Sheet. Type G4000EC450 Issue 1
Page 3 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
1.7 Critical rate of rise of on-state current
The value given is the maximum repetitive rating, but does not imply any specific operating condition. The
high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum
condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt
is possible. Where the device is required to operate with infrequent high current pulses, with natural
commutation (i.e. not gate turn-off), then di/dt>10kA/µs is possible. For this type of operation individual
specific evaluation is required.
1.8 Gate ratings
The absolute conditions above which the gate may be damaged. It is permitted to allow VGK(AV) during turn-
off to exceed VRGM which is the implied DC condition.
1.9 Minimum permissible off time.
This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in
the ratings applies only to operating conditions of ratings note 2.
1.10 Minimum permissible on-time.
Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. Where a
simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges
through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time
constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode
circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon
the di/dt and operating conditions (each case needs to be assessed on an individual basis).
Data Sheet. Type G4000EC450 Issue 1
Page 4 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
2 Characteristics
2.1 Instantaneous on-state voltage
Measured using a 500µs square pulse, see also the curves of figure 1 for other values of ITM.
2.2 Latching and holding current
These are considered to be approximately equal and only the latching current is measured, type test only
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is
monitored on an oscilloscope while VD is increased, until the current is seen to flow during the un-gated
period between the end of IG and the application of reverse gate voltage. Test frequency is 100Hz with IGM
& IG as for td of characteristic data.
IG
100µs
IGM
Gate current
-16V
100µs
Anode current
unlatched condition
Unlatched
Latched
R1
CT
C1
Anode current
Latched condition
Vs
DUT
Gate-drive
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is
open circuit or RGK is high impedance. Typical values: - dv/dt<100V/µs for RGK>10Ω.
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage.
For IDRM & IRRM see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
leakage and still maintain minimum of –2 Volts. See diagram 6.
Diagram 6.
Data Sheet. Type G4000EC450 Issue 1
Page 5 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
2.5 Gate trigger characteristics.
These are measured by slowly ramping up the gate current and monitoring the transition of anode current
and voltage (see diagram 7). Maximum and typical data of gate trigger current, for the full junction
temperature range, is given in the curves of figure 6. Only typical figures are given for gate trigger voltage,
however, the curves of figure 1 give the range of gate forward characteristics, for the full allowable
junction temperature range. The curves of figures 1 & 6 should be used in conjunction, when considering
forward gate drive circuit requirement. The gate drive requirements should always be calculated for lowest
junction temperature start-up condition.
Feedback
Anode current
0.9VAK
R1
Not to scale
Current-
sence
CT
Gate current
C1
Vs
0.1IA
IGT
Anode-Cathode
Voltage
DUT
Gate-drive
Diagram 7, Gate trigger circuit and waveforms.
2.6 Turn-on characteristics
The basic circuit used for turn-on tests is given in diagram 8. The test is initiated by establishing a
circulating current in Tx, resulting in VD appearing across Cc/Lc. When the test device is fired Cc/Lc
discharges through DUT and commutates Tx off, as pulse from Cc/Lc decays the constant current source
continues to supply a fixed current to DUT. Changing value of Cc & Lc allows adjustment of ITM and di/dt
respectively, VD and i are also adjustable.
Lc
Cc
R1
CT
Tx
D
i
Cd
Vd
DUT
Gate-drive
Diagram 8, Turn-on test circuit of FT40.
The definitions of turn-on parameters used in the characteristic data are given in diagram 9. The gate
circuit conditions IGM & IG are fully adjustable, IGM duration 30µs.
diG/dt
IG
IGM
td
tr
di/dt
ITM
VD
VD=VDM
tgt
Eon integral
period
Diagram 9, Turn-on wave-diagrams.
Data Sheet. Type G4000EC450 Issue 1
Page 6 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
In addition to the turn-on time figures given in the characteristics data, the curves of figure 9 give the
relationship of tgt to di/dt and IGM. The data in the curves of figure 7 gives the turn-on losses both with and
without snubber discharge, a snubber of the form given in diagram 2 is assumed. Only typical losses are
given due to the large number of variables which effect Eon. It is unlikely that all negative aspects would
appear in any one application, so typical figures can be considered as worst case. Where the turn-on loss
is higher than the figure given it will in most cases be compensated by reduced turn-off losses, as
variations in processing inversely effect many parameters. For a worst case device, which would also
have the lowest turn-off losses, Eon would be 1.5x values given in the curves of figures. Turn-on losses are
measured over the integral period specified below:-
10µs
Eon = iv.dt
∫
0
The turn-on loss can be sub-divided into two component parts, firstly that associated with tgt and secondly
the contribution of the voltage tail. For this series of devices tgt contributes 60% and the voltage tail 40%
(These figures are approximate and are influenced by several second order effects). The loss during tgt is
greatly affected by gate current and as with turn-on time (figure 9), it can be reduced by increasing IGM
.
The turn-on loss associated with the voltage tail is not effected by the gate conditions and can only be
reduced by limiting di/dt, where appropriate a turn-on snubber should be used. In applications where the
snubber is discharged through the GTO thyristor at turn-on, selection of discharge resistor will effect Eon.
The curves of figure 8 are given for a snubber as shown in diagram 2, with R=5Ω, this is the lowest
recommended value giving the highest Eon, higher values will reduce Eon.
2.7 Turn-off characteristics
The basic circuit used for the turn-off test is given in diagram 10. Prior to the negative gate pulse being
applied constant current, equivalent to ITGQ, is established in the DUT. The switch Sx is opened just before
DUT is gated off with a reverse gate pulse as specified in the characteristic/data curves. After the period
tgt voltage rises across the DUT, dv/dt being limited by the snubber circuit. Voltage will continue to rise
across DUT until Dc turns-on at a voltage set by the active clamp Cc, the voltage will be held at this value
until energy stored in Lx is depleted, after which it will fall to VDC .The value of Lx is selected to give
required VD Over the full tail time period. The overshoot voltage VDM is derived from Lc and forward voltage
characteristic of DC, typically VDM=120%VD to 150%VD depending on test settings. The gate is held
reverse biased through a low impedance circuit until the tail current is fully extinguished.
Lc
Dc
Sx
RL
Rs
Lx
Cc
Vd
Vc
Ds
CT
DX
i
Cd
Cs
DUT
Gate-
drive
RCD snubber
Diagram 10, Turn-off test circuit.
The definitions of turn-off parameters used in the characteristic data are given in diagram 11.
Data Sheet. Type G4000EC450 Issue 1
Page 7 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
tgq
tf
0.9
VDM
ITGQ
VD
0.1
0.1
VGR
VGQ
QGQ
VG(AV)
IGQ
tgw
Diagram 11, Turn-off parameter definitions.
In addition to the turn-off figures given in characteristic data, the curves of figures 8, 9 &10 give the
relationship of IGQ QGQ and tgq to turn-off current (ITGQ) and diGQ/dt. Only typical values of IGQ are given due
to a great dependence upon the gate circuit impedance, which is a function of gate drive design not the
device. The tgq is also, to a lesser extent, affected by circuit impedance and as such the maximum figures
given in data assume a good low impedance circuit design. The minimum off time to re-fire the device is
distinct from tgw, the gate off time given in characteristics. The GTO thyristor may be safely re-triggered
when a small amount of tail current is still flowing. In contrast, the gate circuit must remain low impedance
until the tail current has fallen to zero or below a level which the higher impedance VGR circuit can sink
without being pulled down below –2 Volts. If the gate circuit is to be switched to a higher impedance
before the tail current has reached zero then the requirements of diagram 12 must be applied.
itail
R
(VGR - itailR)>2V
Diagram 12.
VGR
The figure tgw, as given in the characteristic data, is the maximum time required for the tail current to
decay to zero. The figure is applicable under all normal operating conditions for the device; provided
suitable gate drive is employed. At lower turn-off current, or with special gate drive considerations, this
time may be reduced (each case needs to be considered individually). Typical turn-off losses are given in
the curves of figures 8, the integration period for the losses is nominally taken to the end of the tail time
(Itail<2A) i.e.: -
tgt+ttail
Eoff =
iv.dt.
∫
0
Data Sheet. Type G4000EC450 Issue 1
Page 8 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
The curves of figure 8 give the turn-off energy with a fixed value of VDM and VD=50%VDRM. The curves are
for energy against turn-off current/snubber capacitance with a correction for voltage inset as an additional
graph (snubber equivalent to diagram 2 is assumed). From these curves a typical value of turn-off energy
for any combination of ITGQ/Cs and VD or VDM can be derived. Only typical data is included, to allow for the
trade-off with on-state voltage (VTM) which is a feature of these devices, see diagram 13. When calculating
losses in an application, the use of a maximum VTM and typical Eoff will (under normal operating
frequencies) give a more realistic value. The lowest VTM device of this type would have a maximum turn-
off energy of 1.5x the figure given in the curves of figures 13 & 14.
Trade-off between V & Eoff
TM
Eoff
Diagram 13.
V
TM
2.8 Safe turn-off periphery
The necessity to control dv/dt at tun-off for the GTO thyristor implies a trade-off between ITGQ/VDM/Cs. This
information is given in the curves of figure 10. The information in these curves should be considered as
maximum limits and not implied operating conditions, some margin of 'safety' is advised with the
conditions of the curves reserved for occasional excursions. It should be noted that these curves are
derived at maximum junction temperature, however, they may be applied across the full operating
temperature range of the device provided additional precautions are taken. At very low temperature,
(below –10°C) the fall-time of device becomes very rapid and can give rise to very high turn-off voltage
spikes, as such it is advisable to reduce snubber loop inductance to <0.15µH to minimise this effect.
Data Sheet. Type G4000EC450 Issue 1
Page 9 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Curves
Figure 1 - On-state characteristics of Limit device
10000
G4000EC450
Issue 1
Tj=25°C
Tj=125°C
1000
100
10
1
2
3
4
5
6
Instantaneous on state voltage, VT (V)
Figure 2 - Maximum surge and I2t Ratings
100000
1.00E+08
1.00E+07
1.00E+06
I2t: VRRM ≤10V
10000
ITSM: VRRM ≤10V
Tj (initial) = 125°C
G4000EC450
Issue 1
1000
1
3
5
10
1
5
10
50 100
Duration of surge (ms)
Duration of surge (cycles @ 50Hz)
Data Sheet. Type G4000EC450 Issue 1
Page 10 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Figure 3 – Forward gate characteristics
Figure 4 – Transient thermal impedance
100
0.1
G4000EC450
Issue 1
min
max
Double side cooled
10
0.01
`
1
0.001
G4000EC450
Issue 1
For Tj=-40°C to 125°C
0.1
0.0001
0
0.5
1
1.5
2
2.5
3
0.001
0.01
0.1
Time, t (s)
1
10
100
Instantaneous forward gate voltage, VFG (V)
Figure 5 – Typical forward blocking voltage Vs.
external gate-cathode resistance
Figure 6 – Gate trigger current
1.1
100
G4000EC450
Issue 1
G4000EC450
Issue 1
Tj=125°C
1
0.9
0.8
0.7
0.6
0.5
0.4
10
1
0.1
-50
-25
0
25
50
75
100
125
150
Junction temperature, Tj (°C)
1
10
100
1000
External gate-cathode resistance, RGK
Data Sheet. Type G4000EC450 Issue 1
Page 11 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Figure 7 – Typical turn-on energy per pulse
Figure 8 – Typical turn-off energy per pulse
5.2
14
G4000EC450
Issue 1
G4000EC450
Issue 1
VD=50%VDRM
,
VD=50%VDRM, VDM=VDRM
4.7
4.2
3.7
3.2
2.7
2.2
1.7
1.2
0.7
0.2
I
GM=50A, diFG/dt=40A/µs
diGQ/dt=40A/µs,
Cs=3µF Cs=4µF Cs=6µF
di/dt=400A/µs
Cs=6µF, Rs=5Ω,
Tj=125°C
12 Tj=125°C
10
8
di/dt=300A/µs
di/dt=200A/µs
6
4
2
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
Turn on current, ITM (A)
Turn off current, ITGQ (A)
Figure 9 – Maximum gate turn-off charge
Figure 10 – Maximum permissible turn-off current
14
6
G4000EC450
Issue 1
G4000EC450
Issue 1
VD=50%VDRM, VDM=VDRM
diGQ/dt=40A/µs,
Cs=6µF, Tj=125°C
VD=50%VDRM, VDM=VDRM
5.5
diGQ/dt=40A/µs,
12
10
8
LS<300nH, Tj=125°C
5
4.5
4
3.5
3
6
2.5
2
4
2
1.5
1
0
0
1000
2000
3000
4000
5000
1000
1500
2000
2500
3000
3500
4000
Turn off current, ITGQ (A)
Turn off current, ITGQ (A)
Data Sheet. Type G4000EC450 Issue 1
Page 12 of 13
September, 2004
WESTCODE An IXYS Company
Anode Shorted Gate Turn-Off Thyristor type G4000EC450
Outline Drawing & Ordering Information
101A346
ORDERING INFORMATION
(Please quote 10 digit code as below)
G4000
EC
45
0
Fixed Voltage Code
Fixed
Fixed
VDRM/100
45
Fixed Code
Type Code
Outline Code
Typical order code: G4000EC450 – 4500V VDRM, 26mm clamp height capsule.
IXYS Semiconductor GmbH
Westcode Semiconductors Ltd
Langley Park Way, Langley Park,
Chippenham, Wiltshire, SN15 1GE.
Tel: +44 (0)1249 444524
Edisonstraße 15
D-68623 Lampertheim
WESTCODE
Tel: +49 6206 503-0
An IXYS Company
Fax: +49 6206 503-627
E-mail: marcom@ixys.de
Fax: +44 (0)1249 659448
E-mail: WSL.sales@westcode.com
IXYS Corporation
Westcode Semiconductors Inc
3270 Cherry Avenue
3540 Bassett Street
www.westcode.com
Santa Clara CA 95054 USA
Tel: +1 (408) 982 0700
Fax: +1 (408) 496 0670
E-mail: sales@ixys.net
Long Beach CA 90807 USA
Tel: +1 (562) 595 6971
Fax: +1 (562) 595 8182
www.ixys.com
E-mail: WSI.sales@westcode.com
The information contained herein is confidential and is protected by Copyright. The information may not be used or disclosed
except with the written permission of and in the manner permitted by the proprietors Westcode Semiconductors Ltd.
© Westcode Semiconductors Ltd.
In the interest of product improvement, Westcode reserves the right to change specifications at any time without prior notice.
Devices with a suffix code (2-letter, 3-letter or letter/digit/letter combination) added to their generic code are not necessarily subject
to the conditions and limits contained in this report.
Data Sheet. Type G4000EC450 Issue 1
Page 13 of 13
September, 2004
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