XI848S1T/R [IXYS]

Power Supply Support Circuit, Fixed, 1 Channel, PDSO8, MS-012AA, SOIC-8;


型号：	XI848S1T/R
厂家：	IXYS CORPORATION
描述：	Power Supply Support Circuit, Fixed, 1 Channel, PDSO8, MS-012AA, SOIC-8 光电二极管
文件：	总5页 (文件大小：228K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IXYS

IXI848

High-Side Current Monitor

Features:

General Description

The IXI848 is a precision high side current sense

monitor. High side power-line monitoring offers the

advantage of allowing the ground plane to remain

undisturbed when sensing load currents.

• High-Side Current Sense Amplifier

• 2.7V to 40V Input Range

• 0.7% Typical Full Scale Accuracy

• Scalable Output Voltage

• SOIC Package

An external sense resistor sets the range of the

amplified ground-referenced output monitoring

voltage. The output voltage is amplified by a

selectable fixed gain of either 10 or 50. With an

input voltage range up to 40V, and output gain of up

to 50, the IXI848 is designed to address a wide

variety of current sense applications.

Applications:

• Power Management Systems

• Smart Battery Packs

• Battery Chargers

The IXI848 operates over a temperature range of

-40°C to +85°C. The IXI848 is available in an 8-

Lead SOIC package.

• Battery Powered Portable Equipment

• DC Motor Control

IXI848 Functional Block Diagram and

General Application Circuit

IXI848 SOIC PIN Configuration

GND

R10

R50

N/C

LOAD

VOUT

N/C

LOAD

SOIC-8

VOUT

R10

R_G

10R

40R

Ordering Information

R50

Part No.

Description

Package Quantity

IXI848S1

XI848S1T/R

SOIC-8

98 (Tube)

2500 (T&R)

High Side Current

Sense Monitor

GND

06/29/05

IXI848

IXYS

Absolute Maximum Ratings

Absolute Maximum Ratings are stress ratings.

Stresses in excess of these ratings can cause

permanent damage to the device. Functional

operation of the device at these or any other

conditions beyond those indicated in the operational

sections of this data sheet is not implied. Exposure

of the device to the absolute maximum ratings for

an extended period may degrade the device and

affect its reliability.

Parameter

Voltage to IN (pin 4)

Rating

-0.3V to +45V

±0.4V

Differential Input Voltage (V_SENSE

Input Current to any pin

Operating Ambient Temp Range

Operating Junction Temp Range

θJA

)

±10mA

-40°C to +85°C

-40°C to +125°C

150°C/W

θJC

40°C/W

Storage Temp Range

-65°C to +150°C

Lead Temperature (Soldering, 10 sec) +300°C

ESD Warning

ESD (electrostatic discharge) sensitive device. Although the IXI848 feature proprietary ESD protection circuitry, permanent damage

may be sustained if subjected to high energy electrostatic discharges. Proper ESD precautions are recommended to avoid

performance degradation or loss of functionality.

Electrical Characteristics

T_A= 25°C, V_IN= 2.7V to 40V, unless otherwise noted

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Operating Voltage

Range

V_IN

2.7

Supply Current

I_IN

V_IN= 20V, V_SENSE= 0V, I_LOAD= 0A

.065

150

.130

2.0

Full Scale Sense

Voltage

V_SENSE

V_OS

Input Offset

Voltage

Full Scale

Accuracy

V_IN= 12V

-2.0

±0.5

±0.7

V_SENSE= 100mV, V_IN= 12V

T_A= +25°C

V_SENSE= 100mV

_IN= 12V

T_A= +25°C

∆ @ T_A= -40° to +85°C

T_A= +25°C

±0.7

±0.3

±0.8

±0.4

Total OUT Voltage

Error

(Note 1, Note 2)

V_SENSE= 100mV

_IN= 40V

∆ @ T_A= -40° to +85°C

V_SENSE= 20mV

to 100mV

V_IN= 12V, 40V

T_A= +25°C

±0.5

Gain Accuracy

(Note 2)

∆ @ T_A= -40° to +85°C

±0.1

Gain Setting

Resistance

R_G

V_IN= 12V

Gain = 10V/V

Gain = 50V/V

115

165

215

kΩ

V_SENSE= 100mV

Note 1: Total OUT voltage error is the sum of gain and offset voltage errors.

Note 2: Production Tested at T_A=25°C.

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06/29/05

IXI848

IXYS

Pin Description and Configuration

SOIC Name Description

Ground

Connecting R10 to GND, (R50=N/C) selects a VOUT voltage that is 10X the voltage across

R_SENSE

Output voltage proportional to the voltage across R_SENSE

GND

R10

VOUT

Positive supply terminal and power connection for the external Sense Resistor.

Load-side connection to the external Sense Resistor.

LOAD

N/C

No Connect

N/C

Connecting R50 to GND, (R10=N/C) selects a VOUT voltage that is 50X the voltage across

R50

R_SENSE

Detailed Circuit Description

The IXI848 is a precision high side current sense

monitor featuring an input voltage range of 2.7V to

40V, and a selectable ground referenced fixed

gain output of either 10 or 50.

error component associated with the input offset

voltage of the internal op amp.

The IXI848 can be configured to measure a wide

selection of currents by using different R_SENSE

values. Some common values for typical operation

of the IXI848 are listed in the following table.

A small voltage developed across an external

sense resistor (R_S), is converted to an amplified

ground referenced voltage output at VOUT,

(Figure 1). The amplifier’s non-inverting input is

high impedance making the voltage at that

terminal equal to V_IN– (I_L) (R_S). The amplifier

forces the high impedance inverting terminal to

equal the non-inverting input voltage by turning on

the P-Channel MOS FET.

Full-Scale R_SENSE

Gain

(V/V)

VOUT (V)

V_SENSE= 150mV

I_L(A)

0.15

1.5

R_S(Ω)

1.0

0.1

1.5

2.5

100

0.01

0.001

As the P-Channel MOS FET is biased on by the

amplifier output, current is sourced through R_G

(10R or 10R+40R), to produce a voltage equal to

V_IN– (I_L) (R_S) at the inverting input of the amplifier.

This develops a voltage across the inverting input

resistor, R that matches the sense voltage across

R_S, plus any associated input offset voltage, (V_IO).

Consequently, the voltage at VOUT corresponds

to R_G/ R.

Output Impedance

The VOUT output is a current source driving a

33kꢀ resistance to ground for a gain of 10, or a

165kꢀ resistance to ground for a gain of 50.

Output gain is reduced by resistive loading of the

VOUT terminal. The impedance of the external

monitor load (Z_M) should be chosen high enough

to maintain the desired accuracy. Buffering of the

VOUT terminal with a high-impedance input stage

may be required to minimize output errors.

Output: VOUT = G [ (I_L) (R_S) + V_IO]

Gain: G = (R_G) (Z_M) / R (R_G(R_G+ Z_M))

R_G= 10R or 50R selectable

The following formulas quantify the percent error

introduced by output loading:

For a Gain of 10

Temperature coefficient:

%_ERROR= 100 [R_LOAD/ (33kꢀ + R_LOAD) – 1]

(all on-chip resistors) R = 700ppm / °C typical

For a Gain of 50

R_SENSEComponent Selection

%_ERROR= 100 [R_LOAD/ (165kꢀ + R_LOAD) – 1]

The R_SENSEvalue should be selected such that the

voltage across R_SENSEis at full-scale for the load

current to be monitored. Operating the IXI848 at or

near the full-scale sense voltage will minimize the

R_LOAD= the external load applied to VOUT

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06/29/05

IXI848

IXYS

Typical Performance Characteristics

.080

.075

.125

.105

Vin=20V

.070

.065

.060

.085

.065

.045

.025

.055

.050

.005

2.7

10 15 20

25 30 35

-40

-15

Supply Voltage (Vin)

Ta (°C)

Fig 3. Supply Current vs. Voltage

Fig 4. Supply Current vs. Temperature

Gain=10

Vin=12V

C_L=8pF

Vin=12V

C_L=8pF

100mV

6mV

Vsense

100mV

Vsense

45mV/Div

5mV/Div

95mV

Vout

0.06V

0.95V

20mV/Div

500mV/Div

2uS/Div

Fig 5. Small Signal Transient Response 10X

Fig 6. Large Signal Transient Response 10X

Gain=50

C_L=8pF

Vin=12V

C_L=8pF

Vin=12V

100mV

6mV

Vsense

100mV

95mV

Vsense

45mV/Div

5mV/Div

Vout

2V/Div

0.3V

4.75V

100mV/Div

10uS/Div

Fig 7. Small Signal Transient Response 50X

Fig 8. Large Signal Transient Response 50X

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06/29/05

IXI848

IXYS

Package Outline

8-LEAD SOIC

IXYS Corporation makes no representations or warranties with respect to the accuracy or completeness of the contents of this

publication and reserves the right to make changes to specifications and product descriptions at any time without notice. Neither

circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS’ Standard Terms and Conditions of Sale,

IXYS Corporation assumes no liability whatsoever, and disclaims any expressed or implied warranty, relating to its products

including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual

property right

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06/29/05

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