Z8523310ASG [IXYS]
Micro Peripheral IC,;
| 型号： | Z8523310ASG |
| 厂家： | 
IXYS CORPORATION |
| 描述： | Micro Peripheral IC, |
| 文件： | 总4页 (文件大小：53K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EMSCC™ Enhanced Mono Serial Communication Controller
Z85233
Product Brief
PB005802-0608
•
•
New Programmable Features Added with
Write Register 7'
FEATURES
•
Hardware and software compatible with
Zilog's SCC/ ESCC™
Write registers: WR3, WR4, WR5, and WR10
are Now Readable
•
Deeper Data FIFOs
•
•
•
Read Register 0 Latched During Access
Software Interrupt Acknowledge Mode
–
–
4-Byte Transmit FIFO
8-Byte Receive FIFO
DPLL Counter Output Available as Jitter-Free
Clock Source
•
•
Programmable FIFO Interrupt Levels Provide
Flexible Interrupt Response
•
•
/DTR//REQ Pin Deactivation Time Reduced
Many Improvements toSupport SDLC/
HDLCTransfers:
A Full-Duplex Channel with a Crystal Oscilla-
tor, Baud Rate Generator, and Digital Phase-
Locked Loop.
–
–
–
Deactivation of /RTS Pin after Closing
Flag
Automatic Transmission of the Opening
Flag
•
•
Multi-Protocol Operation Under Program Con-
trol
Automatic Reset of Tx Underrun/EOM
Latch
Asynchronous Mode/Synchronous Mode
–
–
Complete CRC Reception
GENERAL DESCRIPTION
TxD pin Automatically Forced High with
NRZI Encoding when Using Mark Idle.
The Zilog Enhanced Mono Serial Communication-
Controller, Z85233 EMSCC, is a software compat-
ible CMOS member of the SCC family introduced
by Zilog in 1981. The EMSCC is a full-duplex data
communications controller capable of supporting a
wide range of popular protocols. The Z85233
EMSCC is a single channel version (Channel A) of
Zilog's Z85230 ESCC. Based on Zilog's unique
Superintegration™ Technology, the EMSCC is
compatible with designs using Zilog's SCC and
ESCC to receive and transmit data. It has many
improvements that significantly reduce CPU over-
head. The addition of a 4-byte transmit FIFO and
an 8-byte receive FIFO significantly reduces the
overhead required to provide data to, and get data-
from, the transmitter and receiver.
–
–
Receive FIFO Automatically Unlocked for
Special Receive Interrupts when Using the
SDLC Status FIFO.
Back-to-Back Frame Transmission Simpli-
fied
•
•
Easier Interface to Popular CPUs
Fast Speeds:
–
10.0 MHz for Data Rates up to 2.5 Mbit/
Sec.
–
16.384 MHz for Data Rates up to 4.096
Mbit/Sec. -20.0 MHz for Data Rates up to
5.0 Mbit/Sec.
•
•
Improved SDLC Frame Status FIFO
Low Power CMOS
The EMSCC also has many features that improve
packet handling in SDLC mode. The EMSCC will
Copyright ©2008 by Zilog®, Inc. All rights reserved.
www.zilog.com
Z85233 EMSCC™ Enhanced Mono Serial Communication Controller
automatically: transmit a flag before the data, reset
The many enhancements added to the EMSCC per-
mits a system design that increases overall system
performance with better data handling and less
interface logic.
the Tx Underrun/EOM latch, force the TxD pin
high at the appropriate time when using NRZI
encoding, deassert the /RTS pin after the closing
flag, and better handle ABORTed frames when
using the 10x19 status FIFO. The combination of
these features along with the deeper data FIFOs
significantly simplifies SDLC driver software.
All Signals with a preceding front
slash, "/", are active Low, e.g.: B//W
(WORD is active Low); /B/W (BYTE
is active Low, only).
Note:
The CPU hardware interface has been simplified
by relieving the databus setup time requirement
and supporting the software generation of the inter-
rupt acknowledge signal (/INTACK). These
changes allow an interface with less external logic
to many microprocessor families while maintain-
ing compatibility with existing designs. I/O han-
dling of the EMSCC is improved over the SCC
with faster response of the /INT and /DTR//REQ
pins.
Power connections follow conventional descrip-
tions below:
Connection
Power
Circuit
Device
V
V
CC
DD
GND
V
Ground
SS
Internal
Control
Logic
Channel A
Register
C hannel A
Databus
CPU & DMA
Bus Interface
Control
/INT
/INTACK
Interrupt
Control
Logic
C hannel B
Channel B
Register
Interrupt
Control
IEI
IEO
Figure 1. Z85233 Functional Block Diagram
PB005802-0608
Page 2 of 4
Z85233 EMSCC™ Enhanced Mono Serial Communication Controller
Transmit Logic
Transmit MUX
TxDA
Transmit
Buffer
Data Encoding & CR C
Generation
/T R xC A
/R T xC A
Receive and Transmit Clock Multipexer
Digital
Phase-Locked
Loop
Crystal
Oscillator
Amplifier
Baud Rate
Generator
/C T S A
/DC DA
Modem/C ontrol Logic
R eceive Logic
/S Y N C A
/R T S A
/DT R A//R E Q A
Rec. Status Rec. Data
FIFO 3 Byte FIFO 3 Byte
Receive MUX
R xDA
CRC Checker,
Data Decode &
Sync Character
Detection
SDLC Frame Status FIFO
10 x 19
Figure 2. Channel A Exploded View
PB005802-0608
Page 3 of 4
Z85233 EMSCC™ Enhanced Mono Serial Communication Controller
DO NOT USE IN LIFE SUPPORT
Warning:
LIFE SUPPORT POLICY
ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF
THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION.
As used herein
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b)
support or sustain life and whose failure to perform when properly used in accordance with instructions for
use provided in the labeling can be reasonably expected to result in a significant injury to the user. A
critical component is any component in a life support device or system whose failure to perform can be
reasonably expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.
Document Disclaimer
©2008 by Zilog, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded. ZILOG,
INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY
OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT.
ZILOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY
INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR
TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this
document has been verified according to the general principles of electrical and mechanical engineering.
Z8, Z8 Encore!, Z8 Encore! XP, Z8 Encore! MC, Crimzon, eZ80, and ZNEO are trademarks or registered
trademarks of Zilog, Inc. All other product or service names are the property of their respective owners.
PB005802-0608
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