CT2-GI1PFTD51C [JDSU]
OC-48 SFP Transceiver (Multirate, 1310 nm, and 1550 nm); OC- 48 SFP收发器（多速率， 1310纳米和1550纳米）
| 型号： | CT2-GI1PFTD51C |
| 厂家： | 
JDSU |
| 描述： | OC-48 SFP Transceiver (Multirate, 1310 nm, and 1550 nm) |
| 文件： | 总8页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
COMMUNICATIONS MODULES & SUBSYSTEMS
OC-48 SFP Transceiver (Multirate, 1310 nm, and 1550 nm)
CT2 Series
Key Features
• SFP MSA compatible
• Fully OC-48 SONET compliant at all reaches: SR, IR-1,
IR-2, LR-1, and LR-2
• Microprocessor-based design fully implements the
Digital Diagnostic Monitoring Interface
• Automatic output power and extinction ratio control
over temperature and lifetime to compensate for laser
efficiency degradation
• Both PIN and APD versions meet -27 dB receiver reflectance
• Optical parameters tuned and optimized over
temperature in production test
• Expandable options such as coarse wavelength division
multiplexing (CWDM) and a custom software user interface
Applications
The JDSU CT2 Series OC-48 (2.5 Gb/s) transceiver module integrates optics and
electronics in a Small Form Factor Pluggable (SFP) package. It is Multisource
Agreement (MSA) compatible and designed for operation at 1310 nm and 1550 nm.
Although optimized for OC-48, it provides multi-rate capabilities and can be used
from OC-3 (155 Mb/s) up to 2.7 Gb/s.
• Metro access
• Metro core
• Wide area networks
• Optical crossconnects
The CT2 Series SFP transceiver provides a fully OC-48 SONET compliant
interface between the SONET/SDH photonic layer and the electrical layer. Its
microprocessor-based modular design implements all features specified in the
SFP MSA compatible 2-wire Serial Digital Diagnostic Monitoring Interface for
Optical Transceivers.
Compliance
• GR-253-CORE
• ITU-T G.957
• SFF-8472
The major components in this module include a Fabry-Perot or uncooled
distributed feedback (DFB) based optical transmitter, a PIN or APD based optical
receiver with integrated transimpedence amplifier (TIA), an APD high voltage
circuit (if required), a microprocessor, a limiting post amplifier, and a laser driver.
The modular transceiver design offers a "hot-pluggable" interface, allowing the
same basic architecture to be used for SR, IR-1, IR-2, LR-1, and LR-2 versions.
NORTH AMERICA: 800 498-JDSU (5378)
WORLDWIDE: +800 5378-JDSU
WEBSITE: www.jdsu.com
OC-48 SFP TRANSCEIVER
2
Dimensions Diagram
(Specifications in mm unless otherwise noted; see dimensions table on next page.)
K REF
J MIN
A
A
F REF
D
F REF
A
Y MAX
M
G REF
C
B
H MAX
P
L MIN X 45°
N
Y MAX
Section A-A
S
See Detail Y
R MAX
Q
W
T
X REF
V
U
AG
AF
AA REF
AE REF
Z
AB MAX
Z
Z
Detail Y
Section Z-Z
OC-48 SFP TRANSCEIVER
3
Dimension Table for the CT2
Designator
Dimension
Tolerance
Comments
A
B
C
D
E
13.7 mm
8.6 mm
8.5 mm
13.4 mm
1.0 mm
2.3 mm
4.2 mm
2.0 mm
28.5 mm
55.0 mm
1.1 mm x 45°
2.0 mm
2.25 mm
1.0 mm
9.2 mm
0.7 mm
45.0 mm
34.6 mm
41.8 mm
2.7 mm
0.1 mm
0.1 mm
0.1 mm
Transceiver width, nose piece or front that extends inside cage
Transceiver height, front, that extends inside cage
Transceiver height, rear
Transceiver width, rear
Extension of front sides outside of cage
Location of cage grounding springs from centerline, top
Location of side cage grounding springs from top
Width of cage grounding springs
Location of transition between nose piece and rear of transceiver
Transceiver overall length
0.1 mm
Maximum
Reference
Reference
Maximum
Minimum
Reference
Minimum
0.25 mm
0.1 mm
0.1 mm
0.1 mm
Maximum
0.2 mm
0.3 mm
F
G
H
J
K
L
M
N
P
Q
R
S
Chamfer on bottom of housing
Height of rear shoulder from transceiver printed circuit board
Location of printed circuit board to bottom of transceiver
Thickness of printed circuit board
Width of printed circuit board
Width of skirt in rear of transceiver
Length from latch shoulder to rear of transceiver
Length from latch shoulder to bottom opening of transceiver
Length from latch shoulder to end of printed circuit board
Length from latch shoulder to shoulder of transceiver outside of cage
(location of positive stop)
T
U
V
0.15 mm
0.05 mm
W
X
Y
2.7 mm
7.3 mm
2.0 mm
0.45 mm
8.6 mm
2.6 mm
6.0 mm
0.1 mm
Reference
Maximum
0.05 mm
Reference
Maximum
Reference
Clearance for actuator tines
Transceiver length extending outside of cage
Maximum length of top and bottom transceiver extending outside of cage
Height of latch boss
Transceiver height, front, that extends inside the cage
Length of latch boss
Z
AA
AB
AE
Width of cavity that contains the actuator
Bail Latch Color Code Definition
Bail Latch Color
Wavelength
Typical Reach
Gray
1310 nm
1310 nm
1550 nm
1310 nm
1550 nm
SR (2 km)
IR (15 km)
IR (40 km)
LR (40 km)
LR (80 km)
Yellow
Orange
Red
White
OC-48 SFP TRANSCEIVER
4
CT2 Electrical Pad Layout
20
19
18
17
16
15
14
13
12
11
1
VeeT
VeeT
2
TD-
Tx Fault
TD+
3
Tx Disable
4
MOD-DEF(2)
MOD-DEF(1)
VeeT
VccT
5
6
VccR
MOD-DEF(0)
Rate Select
7
VeeR
RD+
8
LOS
9
VeeR
VeeR
RD-
10
VeeR
Bottom of Board (As Viewed
through Top of Board)
Top of Board
Transceiver Pin Descriptions
Pin
Description
TD
TDb
RD
RDb
Rate_select
TxDIS
Un-clocked, multirate, differential serial bit stream (155 Mb/s to 2.7 Gb/s) used to drive the optical transmitter.
Internally AC coupled and terminated via internal 100 Ω differential impedence.
Differential received electrical signal capable of detecting 155 Mb/s to 2.7 Gb/s bit patterns.
The differential pair is internally biased and AC coupled. This signal requires 100 Ω external differential termination.
Internally monitored and available for future use. Can be customized for specific applications.
Transmitter Disable Input. A logic HIGH on this input pin disables the transmitter's laser so that there is no optical
output. If left open the transmitter will be disabled.
LOS
Loss of Signal (Open Collector). A logic HIGH on this output indicates an incoming signal level that is less than
-25 dBm but no greater than -31 dBm for IR and SR configurations and less than -34 dBm but no greater than
-40 dBm for LR configurations. LOS shall deassert (logic LOW) when a 3 dB (maximum), 0.5 dB (minimum) hysteresis
is obtained.
Tx_fault
MOD_DEF(0)
Transmitter fault (Open collector). A logic HIGH indicates that the transmitter is in a fault condition.
MOD_DEF(0) is internally grounded to indicate the presence of the module. Must be pulled-up on host board with
10 KΩ resistor.
MOD_DEF(1)
MOD_DEF(2)
VccR,VccT
MOD_DEF(1) is the clock of the 2 wire interface for module monitoring.
MOD_DEF(2) is the data line of the 2 wire interface for module monitoring.
Receiver, Transmitter power supply, respectively
VeeR, VeeT
Receiver, Transmitter ground, respectively. The chassis ground and circuit ground isolation is configurable.
OC-48 SFP TRANSCEIVER
5
Absolute Maximum Ratings
Parameter
Minimum
Maximum
Standard operating case temperature range
Extended operating case temperature range
Storage case temperature range
Supply voltage
Voltage on any input/output pin
High-speed output source current
Lead soldering temperature/time
Operating relative humidity (non-condensing)
Receiver optical input power
PIN
-5 °C
-40 °C
-40 °C
-0.5 V
0 V
-
-
5%
75 °C
85 °C
85 °C
4.0 V
Vcc
50 mA
250 °C/10 seconds
85%
-
-
3 dBm
0 dBm
APD
Transceiver Electrical Input/Output Characteristics
Parameter
(Vcc = 3.3 V 5ꢀ)
Minimum
Maximum
Input data signal levels input voltage swing, DVIN (internally AC coupled)
Transmitter disable input (disabled/enabled)
Rate select input (high data rate/low data rate)
Transmitter fault output (asserted/deasserted)
Output data signal levels1 output voltage swing, DVOUT (internally AC coupled)
Loss-of-signal output (output high, VOH/output low, VOL)
200 mV
2000 mV
Vcc/0.8 V
Vcc/0.6 V
Vcc/0.5 V
2000 mV
Vcc/0.5 V
2.0 V/0 V
2.8 V/0 V
2.4 V/0 V
400 mV
2.4 V/0 V
1. Terminated into 100 Ω differential. These levels are guaranteed down to 2 dB lower than the typical receiver sensitivity for each data rate and reach.
OC-48 SFP TRANSCEIVER
6
Timing of Status and Control Input/Output
Parameter
Symbol
Condition
Specification
Maximum 10 µs
TX_DISABLE assert time
t_off
Time from rising edge of TX_DISABLE to when the
output optical power falls below 10% of nominal
Time from falling edge of TX_DISABLE to when the
output optical power rises above 90% of nominal
Time from falling edge of TX_DISABLE to when the
output optical power rises above 90% of nominal
TX_DISABLE deassert time t_on
(SR, IR1, and IR2 versions)
TX_DISABLE deassert time t_on
(LR1 and LR2 versions)
Maximum 10 µs
Maximum 1 ms
Time to initialize
t_init
Upon power up or negation of TX_FAULT due to TX_DISABLE Maximum 300 ms
TX_FAULT assert time
TX_DISABLE for reset
LOS assert time
LOS deassert time
2-wire serial clock rate
t_fault
t_reset
t_loss_on
t_loss_off
f_serial_clock
Time from a fault condition to TX_FAULT assertion
Time TX_DISABLE must be held HIGH to reset TX_FAULT
Time from loss of signal to assertion of LOS
Time from non-loss condition to LOS deassertion
-
Maximum 100 µs
Minimum 10 µs
Maximum 100 µs
Maximum 100 µs
Maximum 100 kHz
Power Supply Voltage
Parameter
SR
IR-1
IR-2
3.1 V
3.3 V
3.5 V
255 mA
300 mA
LR-1
LR-2
Supply voltage
Minimum
Typical
Maximum
Typical
Power supply current drain1
250 mA
300 mA
255 mA
300 mA
275 mA
350 mA
275 mA
350 mA
Maximum
1. Applies to hardware revision 2. Does not include output termination resistor current.
OC-48 SFP TRANSCEIVER
7
Specifications
Parameter
SR
IR-1
IR-2
LR-1
LR-2
Average output power1
Minimum
Typical
Maximum
Minimum
Typical
Maximum
Minimum
Typical
Maximum
Typical
Maximum
Minimum
Minimum
Typical
Maximum
Minimum
Maximum
Maximum
-10 dBm
-7 dBm
-3 dBm
-9 dBm
-7 dBm
-4 dBm
1266 nm
1310 nm
1360 nm
-
-5 dBm
-2.5 dBm
0 dBm
-4 dBm
-2.5 dBm
-1.0 dBm
1260 nm
1310 nm
1360 nm
0.3 nm
1 nm
30 dB
9.0 dB
10.5 dB
13.5 dB
8.2 dB
-5 dBm
-2.5 dBm 0 dBm
0 dBm
-4 dBm
-2.5 dBm 0 dBm
-1.0 dBm 1 dBm
1430 nm
1550 nm
1580 nm
0.3 nm
1 nm
-2 dBm
-2 dBm
0.3 dBm
3 dBm
-1 dBm
0.3 dBm
2 dBm
1500 nm
1550 nm
1580 nm
0.3 nm
1 nm
1.5 dBm
-1 dBm
BOL power output1
TX operating wavelength
Spectral width2
1280 nm
1310 nm
1335 nm
0.3 nm
1 nm
4 nm
-
Side mode suppression ratio (DFB laser)3
Extinction ratio4 (BOL)
30 dB
9.0 dB
30 dB
30 dB
9.0 dB
9.0 dB
11.0 dB
13.5 dB
8.2 dB
-
9.0 dB
10.5 dB
13.0 dB
8.2 dB
-
10.0 dB
11.5 dB
8.2 dB
12.0 dB
200 ps
10.0 dB
11.5 dB
8.2 dB
12.0 dB
200 ps
Extinction ratio4 (EOL)
-
Optical rise and fall times (20 to 80%)
Eye mask of optical output
Eye mask margin (filtered)5
200 ps
200 ps
200 ps
Compliant with GR-253 and ITU-T G.957
Minimum
Typical
Maximum
Maximum
Typical
Maximum
Minimum
Typical
Minimum
Minimum
Minimum
Maximum
Minimum
Typical
Maximum
Maximum
Maximum
Maximum
Minimum
Maximum
Maximum
5%
15%
10%
15%
10%
15%
10%
15%
10%
15%
Jitter generation (peak-to-peak)6
Jitter generation (rms)6
Power output with transmitter disabled
70 mUIP-P
7 mUIrms
-50 dBm
-40 dBm
-21 dBm
-23 dBm
-19 dBm
-3 dBm
1260 nm
1620 nm
3 µs
50 µs
100 µs
1 dB
12 ps/nm
-27 dB
-
10-15
70 mUIP-P 70 mUIP-P 70 mUIP-P 70 mUIP-P
7 mUIrms
-50 dBm
-40 dBm
-21 dBm
-23 dBm
-19 dBm
0 dBm
1260 nm
1620 nm
3 µs
7 mUIrms
-50 dBm
-40 dBm
-21 dBm
-23 dBm
-19 dBm
0 dBm
1260 nm
1620 nm
3 µs
50 µs
100 µs
1 dB
800 ps/nm
-27 dB
7 mUIrms 7 mUIrms
-50 dBm -50 dBm
-40 dBm -40 dBm
-31 dBm -31 dBm
-32 dBm -32 dBm
-29 dBm -29 dBm
-8 dBm
1260 nm 1260 nm
1620 nm 1620 nm
Receiver sensitivity (BOL, BER=1 x 10-10, ER=10 dB)
Receiver sensitivity (EOL, BER=1 x 10-10, ER=8.2 dB)
Maximum received optical power
Receiver operating wavelength
-8 dBm
Link status response time
3 µs
3 µs
50 µs
50 µs
100 µs
1 dB
50 µs
100 µs
1 dB
-
-27 dB
-24 dB
10-15
100 µs
2 dB
1600ps/nm
-27 dB
-24 dB
10-15
Optical path penalty
Dispersion
Receiver reflectance
Minimum optical return loss
BER floor
Reflect into Tx for <1 dB degradation at the receiver
Standard case temperature
Extended case temperature
Bit rate
-
-27 dB
-24 dB
10-15
-24 dB
10-15
-
-24 dB
-24 dB
-24 dB
-24 dB
-5 to 75 °C
-40 to 85 °C
155 to 2700 Mb/s
1. Measured as fiber coupled power into a standard single mode fiber, typical connector repeatability is 1 dB. LC duplex cables manufactured by Stratos are not
recommended due to a potentially larger window of repeatability.
2. Full spectral width measured 20 dB down from the central wavelength peak under fully modulated conditions.
3. Ratio of the average output power in the dominant longitudinal mode to the power in the most significant side mode in fully modulated conditions.
4. Ratio of logic 1 output power to logic 0 output power under fully modulated conditions with a PRBS 23 data pattern.
5. GR-253-CORE, ITU-T, Recommendation G.957. Tested at STM1, STM4, STM16.
6. Formatted OC-48 pattern with scrambled PRBS payload using an Agilent OmniBer as the optical source driving the CT2 optical receiver. The differential data outputs of
this optical receiver are used as the electrical inputs for the CT2 transmitter which optically drives the OmniBer receiver input to complete the jitter test circuit. This is a 60
second test as recommended in GR-253.
OC-48 SFP TRANSCEIVER
Ordering Information
For more information on this or other products and their availability, please contact your local JDSU account manager or
JDSU directly at 1-800-498-JDSU (5378) in North America and +800-5378-JDSU worldwide or via e-mail at
customer.service@jdsu.com.
Sample: CT2-MS1LBTD31C4
CT2-
Code
M
G
Rate
Code
Connector/
Pigtail Length
LC duplex
Code
Format/ITU Channel/
Wavelength
TDM 1310 nm
Code
Custom Options
(Output Power/
Dispersion/Channel
Spacing)3
OC-48 (multirate)1
Long reach GbE at
1.25 Gb/s(and 622 Mb/s)
L
P
TD3
TD5
Plastic LC receptacle
TDM 1550 nm
C
Standard
Code
S1
I1
Reach2
Short reach, 1310 nm
Intermediate reach,
1310 nm
Intermediate reach,
1550 nm
Long reach, 1310 nm
Long reach, 1550 nm
(120 km for GbE)
Code
Temperature Range/
Package
0 to 70 °C case
temperature (MM only)
-5 to 75 °C case
temperature
-5 to 85 °C case
temperature
-40 to 85 °C case
temperature
Code
1
3
Software Feature Set
Software release 1
Software release 3
Code
4
5
Hardware Revision
Hardware revision 4
Hardware revision 5
A
B
F
I2
1. Fully SONET compliant at OC-48
2. Per GR-253-Core
3. Customer specific options available
upon request
L1
L2
K
Telcordia is a registered trademark of Telcordia Technologies Incorporated.
All statements, technical information and recommendations related to the products herein are based upon information believed to be
reliable or accurate. However, the accuracy or completeness thereof is not guaranteed, and no responsibility is assumed for any
inaccuracies. The user assumes all risks and liability whatsoever in connection with the use of a product or its application. JDSU reserves
the right to change at any time without notice the design, specifications, function, fit or form of its products described herein, including
withdrawal at any time of
a product offered for sale herein. JDSU makes no representations that the products
herein are free from any intellectual property claims of others. Please contact JDSU for more information. JDSU and the JDSU logo are
trademarks of JDS Uniphase Corporation. Other trademarks are the property of their respective holders. ©2006 JDS Uniphase
Corporation. All rights reserved. 10143023 Rev. 006 09/06 CT2OC48.DS.CMS.AE
NORTH AMERICA: 800 498-JDSU (5378)
WORLDWIDE: +800 5378-JDSU
WEBSITE: www.jdsu.com
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