C0402C104K4JACTU [KEMET]
Surface Mount Multilayer Ceramic Chip Capacitors;型号: | C0402C104K4JACTU |
厂家: | KEMET CORPORATION |
描述: | Surface Mount Multilayer Ceramic Chip Capacitors |
文件: | 总20页 (文件大小:1396K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Overview
KEMET’s U2J dielectric features a maximum operating
of Class I MLCCs to achieve values previously only available
temperatureꢀofꢀ125°Cꢀandꢀisꢀconsideredꢀstable.ꢀTheꢀElectronicsꢀ using Class II dielectric materials like X7R, X5R, Y5V and Z5U.
Industries Alliance (EIA) characterizes U2J dielectric as a Class U2J is not sensitive to DC Bias as compared to Class II
Iꢀmaterial.ꢀComponentsꢀofꢀthisꢀclassificationꢀareꢀtemperatureꢀ
compensating and are suited for resonant circuit applications
or those where Q and stability of capacitance characteristics
are required. U2J is an extremely stable dielectric material that
dielectric materials and retains over 99% of nominal capacitance
at full rated voltage.
Capacitanceꢀchangeꢀisꢀlimitedꢀtoꢀ−750ꢀ±ꢀ120ꢀppmꢀ/°Cꢀfromꢀ
exhibits a negligible shift in capacitance with respect to voltage −55°Cꢀtoꢀ+125°C.ꢀTheseꢀdevicesꢀareꢀLead-free,ꢀRoHSꢀandꢀ
and boasts a predictable and linear change in capacitance
with reference to ambient temperature with no aging effect. In
REACH compliant without exception and are capable of
withstandingꢀmultipleꢀpassesꢀthroughꢀaꢀLead-freeꢀsolderꢀreflowꢀ
addition, U2J dielectric extends the available capacitance range profile.ꢀ
Benefits
•ꢀ Operatingꢀtemperatureꢀrangeꢀofꢀ−55°Cꢀtoꢀ+125°Cꢀ
• Lead (Pb)-free, RoHS and REACH compliant
• EIA 0402, 0603, 0805, 1206, 1210 and 1812 case sizes
• DC voltage ratings of 10 V, 16 V, 25 V and 50 V
• Capacitance offerings ranging from 1.0 nF up to 470 nF
• Available capacitance tolerances of ±1%, ±2%, ±5%, ±10%
and ±20%
• Low noise solution similar to C0G
• Low dissipation factor DF < 0.1%
• Low ESR & ESL
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• High thermal stability
• High ripple current capability
Ordering Information
C
1206
C
J
3
A
TU
104
J
C
Case Size Specification/
(L" x W")
Capacitance
Code (pF)
Capacitance Rated Voltage
Failure Rate/
Design
Packaging/Grade
(C-Spec)
Ceramic
Dielectric
J = U2J
Termination Finish3
Series1
Tolerance2
(VDC)
0402
0603
0805
1206
1210
1812
C = Standard
Twoꢀsignificantꢀ
digitsꢀ+
number of zeros.
F = ±1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
8 = 10
4 = 16
3 = 25
5 = 50
A = N/A
C = 100% Matte Sn
See “Packaging
C-Spec
Ordering
Options Table”
below
1 Flexible termination option is available. Please see FT-CAP product bulletin C1062_C0G_FT-CAP_SMD
2 Additional capacitance tolerance offerings may be available. Contact KEMET for details.
One world. One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
1
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Packaging C-Spec Ordering Options Table
Packaging/Grade
Packaging Type1
Ordering Code (C-Spec)
Bulk Bag/Unmarked
7" Reel/Unmarked
Not required (Blank)
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
13" Reel/Unmarked
7" Reel/Unmarked/2 mm pitch2
13" Reel/Unmarked/2 mm pitch2
7081
7082
1 Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.
1 The terms “Marked” and “Unmarked” pertain to laser marking option of capacitors. All packaging options labeled as “Unmarked” will contain capacitors that have
not been laser marked. The option to laser mark is not available on these devices. For more information see “Capacitor Marking”.
2 The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case size
devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
Benefits cont'd
• Preferred capacitance solution at line frequencies & into the MHz range
• Small predictable and linear capacitance change with respect to temperature
• Non-polar device, minimizing installation concerns
•ꢀ 100%ꢀpureꢀmatteꢀTin-platedꢀterminationꢀfinishꢀallowingꢀforꢀexcellentꢀsolderability
• Retains 99% of nominal capacitance at full rated voltage
Applications
Typical applications include critical timing, tuning, circuits requiring low loss, circuits with pulse, high current, decoupling, bypass,
filtering,ꢀtransientꢀvoltageꢀsuppressionꢀandꢀblocking,ꢀasꢀwellꢀasꢀenergyꢀstorageꢀinꢀcriticalꢀandꢀsafetyꢀrelevantꢀcircuitsꢀwithoutꢀ(integrated)ꢀ
currentꢀlimitation,ꢀincludingꢀthoseꢀsubjectꢀtoꢀhighꢀlevelsꢀofꢀboardꢀflexureꢀorꢀtemperatureꢀcycling.
Qualification/Certification
CommercialꢀGradeꢀproductsꢀareꢀsubjectꢀtoꢀinternalꢀqualification.ꢀDetailsꢀregardingꢀtestꢀmethodsꢀandꢀconditionsꢀareꢀreferencedꢀinꢀ
Table 4, Performance and Reliability.
Environmental Compliance
Lead (Pb)-Free, RoHS, and REACH compliant without exemptions.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
2
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
L
W
T
B
S
EIA
Size
Code
Metric
Size
Code
S
L
W
Width
T
B
Mounting
Technique
Separation
Minimum
Length
Thickness
Bandwidth
0402
0603
0805
1206
1210
1812
1005
1608
2012
3216
3225
4532
1.00 (0.040)±0.05 (0.002) 0.50 (0.020)± 0.05 (0.002)
1.60 (0.063)±0.15 (0.006) 0.80 (0.032)±0.15 (0.006)
2.00 (0.079)±0.20 (0.008) 1.25 (0.049)±0.20 (0.008)
3.20 (0.126)±0.20 (0.008) 1.60 (0.063)±0.20 (0.008)
3.20 (0.126)±0.20 (0.008) 2.50 (0.098)±0.20 (0.008)
4.50 (0.177)±0.30 (0.012) 3.20 (0.126)±0.30 (0.012)
0.30 (0.012)±0.10 (0.004)
0.35 (0.014)±0.15 (0.006)
0.50 (0.02)±0.25 (0.010)
0.50 (0.02)±0.25 (0.010)
0.50 (0.02)±0.25 (0.010)
0.60 (0.024)±0.35 (0.014)
0.30 (0.012)
0.70 (0.028)
0.75 (0.030)
Solder wave
or
Solderꢀreflow
N/A
Solderꢀreflowꢀonly
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
3
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
−55°Cꢀtoꢀ+125°Cꢀꢀ
−750ꢀ±12030ꢀppm/ºC
0.1%
CapacitanceꢀChangeꢀwithꢀReferenceꢀtoꢀ+25°Cꢀandꢀ0ꢀVDCꢀAppliedꢀ(TCC)
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
Dielectric Withstanding Voltage (DWV)
0.1%
DissipationꢀFactorꢀ(DF)ꢀMaximumꢀLimitꢀatꢀ25ºC
1,000ꢀmegohmꢀmicrofaradsꢀorꢀ100ꢀGΩ
(Ratedꢀvoltageꢀappliedꢀforꢀ120ꢀ±5ꢀsecondsꢀatꢀ25°C)
InsulationꢀResistanceꢀ(IR)ꢀLimitꢀatꢀ25°C
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
Capacitance
Shift
Insulation
Resistance
Dielectric
U2J
All
All
0.5
0.3% or ±0.25 pF 10% of Initial Limit
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
4
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0402 – 1812 Case Sizes)
Case Size/
Series
C0402C
C0603C
C0805C
C1206C
C1210C
C1812C
Cap
Code
Voltage Code
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
Capacitance
Rated Voltage (VDC)
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
100 pF
110 pF
120 pF
130 pF
150 pF
160 pF
180 pF
200 pF
220 pF
240 pF
270 pF
300 pF
330 pF
360 pF
390 pF
430 pF
470 pF
510 pF
560 pF
620 pF
680 pF
750 pF
820 pF
910 pF
1,000 pF
1,100 pF
1,200 pF
1,300 pF
1,500 pF
1,600 pF
1,800 pF
2,000 pF
2,200 pF
2,400 pF
2,700 pF
3,000 pF
3,300 pF
3,600 pF
3,900 pF
4,300 pF
4,700 pF
5,100 pF
5,600 pF
6,200 pF
6,800 pF
7,500 pF
8,200 pF
9,100 pF
10,000 pF
12,000 pF
15,000 pF
101
111
121
131
151
161
181
201
221
241
271
301
331
361
391
431
471
511
561
621
681
751
821
911
102
112
122
132
152
162
182
202
222
242
272
302
332
362
392
432
472
512
562
622
682
752
822
912
103
123
153
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB BB CF CF CF CF
BB BB BB
BB BB BB
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN
CF CF CF CF DN DN DN DN EB EB EB EB FB FB FB FB GB GB GB
CF CF CF
CF CF CF
DN DN DN DN EB EB EB EB FB FB FB FB GB GB GB
DN DN DN DN EB EB EB EB FB FB FB FB GB GB GB
Rated Voltage (VDC)
Voltage Code
Cap
Code
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
Capacitance
Case Size/Series
C0402C
C0603C
C0805C
C1206C
C1210C
C1812C
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
5
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0402 – 1812 Case Sizes) cont'd
Case Size/
Series
C0402C
C0603C
C0805C
C1206C
C1210C
C1812C
Cap
Code
Voltage Code
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
Capacitance
Rated Voltage (VDC)
Capacitance
Tolerance
Product Availability and Chip Thickness Codes
See Table 2 for Chip Thickness Dimensions
18,000 pF
22,000 pF
27,000 pF
33,000 pF
47,000 pF
47,000 pF
56,000 pF
68,000 pF
82,000 pF
100,000 pF
120,000 pF
150,000 pF
180,000 pF
220,000 pF
270,000 pF
330,000 pF
390,000 pF
470,000 pF
183
223
273
333
393
473
563
683
823
104
124
154
184
224
274
334
394
474
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
J
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
DN DN DN DN EB EB EB EB FB FB FB FB GB GB GB
DN DN DN DP EB EB EB EB FB FB FB FB GB GB GB
DP DP DP DP EB EB EB EB FB FB FB FB GB GB GB
DP DP DP DG EB EB EB EB FB FB FB FB GB GB GB
DG DG DG DG EB EB EB EB FB FB FB FB GB GB GB
DG DG DG DG EB EB EB EB FB FB FB FB GB GB GB
DG DG DG
EB EB EB EC FB FB FB FB GB GB GB
EC EC EC EC FB FB FB FB GB GB GB
EC EC EC EE FB FB FB FB GB GB GB
EC EC EC EF FB FB FB FC GB GB GB
EF EF EF EH FC FC FC FE GB GB GB
EF EF EF EH FE FE FE FG GB GB GB
EH EH EH
EH EH EH
FG FG FG FG GB GB GB
FG FG FG FH GB GB GB
FH FH FH FM GB GB GB
FM FM FM
GC GC GC
GH GH GH
GK GK GK
Rated Voltage (VDC)
Voltage Code
Cap
Code
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
8
4
3
5
Capacitance
Case Size/Series
C0402C
C0603C
C0805C
C1206C
C1210C
C1812C
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
6
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 2A – Chip Thickness/Tape & Reel Packaging Quantities
Paper Quantity1
Plastic Quantity
7" Reel 13" Reel
Thickness Case Thickness ±
Code
Size1
Range (mm)
7" Reel
13" Reel
BB
BD
CF
CH
DM
DN
DP
DE
DF
DG
EB
EC
ED
EE
EF
EH
FB
FC
FE
FF
FG
FH
FM
FJ
FK
GB
GD
GH
GG
GK
GJ
GN
GM
0402
0402
0603
0603
0805
0805
0805
0805
0805
0805
1206
1206
1206
1206
1206
1206
1210
1210
1210
1210
1210
1210
1210
1210
1210
1812
1812
1812
1812
1812
1812
1812
1812
0.50 ± 0.05
0.55 ± 0.05
0.80 ± 0.07
0.85 ± 0.07
0.70 ± 0.20
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.20 ± 0.15
1.60 ± 0.20
0.78 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
1.55 ± 0.15
1.70 ± 0.20
1.85 ± 0.20
2.10 ± 0.20
1.00 ± 0.10
1.25 ± 0.15
1.40 ± 0.15
1.55 ± 0.10
1.60 ± 0.20
1.70 ± 0.15
1.70 ± 0.20
2.00 ± 0.20
10,000
10,000
4,000
4,000
4,000
4,000
4,000
0
0
50,000
50,000
15,000
10,000
15,000
15,000
15,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2,500
2,500
2,500
4,000
4,000
2,500
2,500
2,500
2,000
4,000
4,000
2,500
2,500
2,500
2,000
2,000
2,000
2,000
1,000
1,000
1,000
1,000
1,000
1,000
1,000
500
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
8,000
10,000
10,000
10,000
10,000
10,000
8,000
8,000
8,000
8,000
4,000
4,000
4,000
4,000
4,000
4,000
4,000
2,000
0
0
0
4,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
10,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7" Reel
13" Reel
7" Reel
13" Reel
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
Paper Quantity1
Plastic Quantity
Package quantity based on finished chip thickness specifications.
1 If ordering using the 2 mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA 0603 (1608 metric)
case size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
7
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 2B – Bulk Packaging Quantities
Loose Packaging
Packaging Type
Bulk Bag (default)
Packaging C-Spec1
N/A2
Case Size
Packaging Quantities (pieces/unit packaging)
EIA (in)
Metric (mm)
Minimum
Maximum
0402
0603
0805
1206
1210
1812
1005
1608
2012
3216
3225
4532
50,000
20,000
1
1 The "Packaging C-Spec" is a 4 to 8 digit code which identifies the packaging type and/or product grade. When ordering, the proper code must be included in the 15th
through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details. Commercial Grade product ordered without
a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk bag packaging option for Automotive Grade products.
2 A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The 15th through
22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to out standard "Bulk Bag" packaging.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
8
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
EIA
Size
Code
Metric
Size
Code
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
0402
0603
0805
1206
1210
12101
1812
1005
1608
2012
3216
3225
3225
4532
0.50
0.72
0.72
2.20
1.20
0.45
0.62
0.62
1.90
1.00
0.40
0.52
0.52
1.60
0.80
0.90
1.00
1.60
1.60
1.50
2.15
1.15
1.35
1.35
1.35
1.60
1.60
1.10
1.55
1.90
2.80
2.90
3.60
4.00
4.40
5.60
5.65
5.60
6.90
2.10
2.60
2.90
3.80
3.90
4.60
0.80
0.90
1.50
1.50
1.40
2.05
0.95
1.15
1.15
1.15
1.40
1.40
1.00
1.45
1.80
2.70
2.80
3.50
3.10
3.50
4.70
4.70
4.70
6.00
1.50
2.00
2.30
3.20
3.30
4.00
0.60
0.75
1.40
1.40
1.30
1.95
0.75
0.95
0.95
0.95
1.20
1.20
0.90
1.35
1.70
2.60
2.70
3.40
2.40
2.80
4.00
4.00
4.00
5.30
1.20
1.70
2.00
2.90
3.00
3.70
1 Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Image below based on Density Level B for an EIA 1210 case size.
V1
Y
Y
V2
X
X
C
C
Grid Placement Courtyard
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016
9
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Soldering Process
Recommended Soldering Technique:
ꢀ •ꢀSolderꢀwaveꢀorꢀsolderꢀreflowꢀforꢀEIAꢀcaseꢀsizesꢀ0603,ꢀ0805ꢀandꢀ1206
ꢀ •ꢀAllꢀotherꢀEIAꢀcaseꢀsizesꢀareꢀlimitedꢀtoꢀsolderꢀreflowꢀonly
Recommended Reflow Soldering Profile:
KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection,
IRꢀorꢀvaporꢀphaseꢀreflowꢀtechniques.ꢀPreheatingꢀofꢀtheseꢀcomponentsꢀisꢀrecommendedꢀtoꢀavoidꢀextremeꢀthermalꢀstress.ꢀKEMET’sꢀ
recommendedꢀprofileꢀconditionsꢀforꢀconvectionꢀandꢀIRꢀreflowꢀreflectꢀtheꢀprofileꢀconditionsꢀofꢀtheꢀIPC/J-STD-020ꢀstandardꢀforꢀmoistureꢀ
sensitivityꢀtesting.ꢀTheseꢀdevicesꢀcanꢀsafelyꢀwithstandꢀaꢀmaximumꢀofꢀthreeꢀreflowꢀpassesꢀatꢀtheseꢀconditions.
TP
TL
Termination Finish
tP
Maximum Ramp Up Rate = 3°C/sec
Maximum Ramp Down Rate = 6°C/sec
Profile Feature
SnPb
100% Matte Sn
tL
Preheat/Soak
Tsmax
Tsmin
Temperature Minimum (TSmin
Temperature Maximum (TSmax
Time (tS) from TSmin to TSmax
)
100°C
150°C
150°C
200°C
)
tS
60 – 120 seconds
60 – 120 seconds
Ramp-Up Rate (TL to TP)
Liquidous Temperature (TL)
Time Above Liquidous (tL)
Peak Temperature (TP)
3°C/secondꢀmaximum 3°C/secondꢀmaximum
25
183°C
60 – 150 seconds
235°C
217°C
60 – 150 seconds
260°C
25° C to Peak
Time
TimeꢀWithinꢀ5°CꢀofꢀMaximumꢀ
20 seconds maximum 30 seconds maximum
Peak Temperature (tP)
Ramp-Down Rate (TP to TL) 6°C/secondꢀmaximum 6°C/secondꢀmaximum
Timeꢀ25°CꢀtoꢀPeakꢀ
6 minutes maximum
8 minutes maximum
Temperature
Note 1: All temperatures refer to the center of the package, measured on the
capacitor body surface that is facing up during assembly reflow.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 10
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
Package Size (L" x W")
Force
Duration
0402
0603
5 N (0.51 kg)
Terminal Strength
JIS–C–6429
Appendix 1, Note:
10 N (1.02 kg) 60 seconds
18 N (1.83 kg)
≥ꢀ0805
Board Flex
JIS–C–6429
J–STD–002
Appendix 2, Note: 3.0 mm (minimum).
Magnificationꢀ50ꢀXꢀConditions:
a)ꢀMethodꢀB,ꢀ4ꢀhoursꢀatꢀ155°C,ꢀdryꢀheatꢀatꢀ235°C
b)ꢀMethodꢀBꢀatꢀ215°Cꢀcategoryꢀ3
Solderability
c)ꢀMethodꢀD,ꢀcategoryꢀ3ꢀatꢀ260°C
Temperature Cycling
Biased Humidity
JESD22 Method JA-104
MIL-STD-202 Method 103
1,000ꢀcyclesꢀ(−55°Cꢀtoꢀ+125°C).ꢀMeasurementꢀatꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.
LoadꢀHumidity:ꢀ1,000ꢀhoursꢀ85°C/85%ꢀRHꢀandꢀratedꢀvoltage.ꢀAddꢀ100ꢀKꢀohmꢀresistor.ꢀMeasurementꢀ
atꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.
LowꢀVoltꢀHumidity:ꢀ1,000ꢀhoursꢀ85C°/85%ꢀRHꢀandꢀ1.5ꢀV.ꢀAddꢀ100ꢀKꢀohmꢀresistor.ꢀMeasurementꢀatꢀ
24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.
tꢀ=ꢀ24ꢀhours/cycle.ꢀꢀStepsꢀ7aꢀ&ꢀ7bꢀnotꢀrequired.ꢀMeasurementꢀatꢀ24ꢀhrs.ꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀ
conclusion.
−55°C/+125°C.ꢀNote:ꢀNumberꢀofꢀcyclesꢀrequiredꢀ–ꢀ300.ꢀMaximumꢀtransferꢀtimeꢀ–ꢀ20ꢀseconds.ꢀDwellꢀ
time – 15 minutes. Air – Air.
Moisture Resistance
Thermal Shock
MIL-STD-202 Method 106
MIL-STD-202 Method 107
MIL-STD-202
Method 108/EIA -198
High Temperature Life
Storage Life
1,000ꢀhoursꢀatꢀ125°Cꢀwithꢀ2ꢀXꢀratedꢀvoltageꢀapplied.
125°C,ꢀ0ꢀVDCꢀforꢀ1,000ꢀhours.
MIL-STD-202 Method 108
5 G's for 20 minutes, 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7 secure
points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2"
from any secure point. Test from 10 – 2,000 Hz
Vibration
MIL-STD-202 Method 204
Mechanical Shock
MIL-STD-202 Method 213
MIL-STD-202 Method 215
Figure 1 of Method 213, Condition F.
Resistance to Solvents
Add aqueous wash chemical, OKEM clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may
increase.ꢀKEMETꢀrecommendsꢀthatꢀmaximumꢀstorageꢀtemperatureꢀnotꢀexceedꢀ40ºCꢀandꢀmaximumꢀstorageꢀhumidityꢀnotꢀexceedꢀ70%ꢀ
relativeꢀhumidity.ꢀTemperatureꢀfluctuationsꢀshouldꢀbeꢀminimizedꢀtoꢀavoidꢀcondensationꢀonꢀtheꢀpartsꢀandꢀatmospheresꢀshouldꢀbeꢀfreeꢀofꢀ
chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of
receipt.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 11
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Construction
Detailed Cross Section
Dielectric Material
(CaZrO3)
Barrier Layer
(Ni)
Dielectric Material
(CaZrO3)
End Termination/
External Electrode
(Cu)
Termination Finish
(100% Matte Sn)
Inner Electrodes
(Ni)
End Termination/
External Electrode
(Cu)
Barrier Layer
(Ni)
Termination Finish
(100% Matte Sn)
Inner Electrodes
(Ni)
Capacitor Marking (Optional):
Laser marking option is not available on:
• C0G, Ultra Stable X8R and Y5V dielectric devices
• EIA 0402 case size devices
• EIA 0603 case size devices with Flexible Termination option.
• KPS Commercial and Automotive grade stacked devices.
These capacitors are supplied unmarked only.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 12
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
Bar Code Label
Anti-Static Reel
®
Embossed Plastic* or
Punched Paper Carrier.
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
KEMET
Sprocket Holes
Embossment or Punched Cavity
8 mm, 12 mm
or 16 mm Carrier Tape
Anti-Static Cover Tape
(.10 mm (.004") Maximum Thickness)
178 mm (7.00")
or
330 mm (13.00")
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 – Carrier Tape Configuration, Embossed Plastic & Punched Paper (mm)
New 2 mm Pitch Reel Options*
Embossed Plastic Punched Paper
Tape
Packaging
Ordering Code
(C-Spec)
C-3190
7" Reel
13" Reel
7" Reel
13" Reel
EIA Case Size Size
(W)*
Packaging Type/Options
Pitch (P1)*
Pitch (P1)*
01005 – 0402
0603
8
8
2
2/4
4
2
2/4
4
Automotive grade 7" reel unmarked
Automotive grade 13" reel unmarked
Commercial grade 7" reel unmarked
Commercial grade 13" reel unmarked
C-3191
C-7081
0805
8
4
4
4
4
C-7082
1206 – 1210
1805 – 1808
≥ꢀ1812
8
4
4
* 2 mm pitch reel only available for 0603 EIA case size.
2 mm pitch reel for 0805 EIA case size under development.
12
12
12
16
8
4
4
8
8
Benefits of Changing from 4 mm to 2 mm Pitching Spacing
• Lower placement costs
• Double the parts on each reel results in fewer reel
changesꢀandꢀincreasedꢀef ꢀciency
• Fewer reels result in lower packaging, shipping and
storage costs, reducing waste
KPS 1210
8
8
KPS 1812 & 2220
Array 0508 & 0612
12
4
12
4
*Refer to Figures 1 & 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 & 7 for tolerance specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 13
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
T
T
P2
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
2
E
1
Po
ØDo
Ao
F
Ko
W
E
2
B
1
Bo
S
1
P
1
T
1
Embossment
For cavity size,
see Note 1 Table 4
Center Lines of Cavity
ØD
1
Cover Tape
is for tape feeder reference only,
including draft concentric about B
B
1
o
.
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
D1 Minimum
Note 1
1.0
(0.039)
R Reference S1 Minimum
T
T1
Tape Size
8 mm
D0
E1
P0
P2
Note 2
Note 3
Maximum
Maximum
25.0
(0.984)
1.5ꢀ+0.10/-0.0ꢀ
(0.059ꢀ+0.004/-0.0)
1.75 ±0.10
4.0 ±0.10
2.0 ±0.05
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
12 mm
16 mm
(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)
1.5
(0.059)
30
(1.181)
Variable Dimensions — Millimeters (Inches)
B1 Maximum
Note 4
4.35
(0.171)
E2
T2
W
Tape Size
8 mm
Pitch
F
P1
A0,B0 & K0
Minimum
6.25
(0.246)
Maximum
2.5
(0.098)
Maximum
8.3
(0.327)
3.5 ±0.05
(0.138 ±0.002) (0.157 ±0.004)
4.0 ±0.10
Single (4 mm)
Single (4 mm) &
Double (8 mm)
8.2
10.25
5.5 ±0.05
8.0 ±0.10
4.6
12.3
12 mm
16 mm
Note 5
(0.323)
(0.404)
(0.217 ±0.002) (0.315 ±0.004)
(0.181)
(0.484)
12.1
(0.476)
14.25
(0.561)
7.5 ±0.05 12.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
4.6
(0.181)
16.3
(0.642)
Triple (12 mm)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6).
3. If S1 < 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 14
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
T
P2
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
E
1
Po
ØDo
0
A
F
W
2
E
0
B
Bottom Cover Tape
P
1
G
Cavity Size,
See
1
T
1
T
Top Cover Tape
Center Lines of Cavity
Note 1, Table 7
Bottom Cover Tape
User Direction of Unreeling
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
R Reference
Note 2
Tape Size
8 mm
D0
E1
P0
P2
T1 Maximum
G Minimum
0.10
1.5ꢀ+0.10ꢀ-0.0ꢀ
(0.059ꢀ+0.004ꢀ-0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.75
(0.030)
25
(0.984)
(0.004)
Maximum
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
Pitch
E2 Minimum
F
P1
T Maximum
W Maximum
A0 B0
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
8.3
(0.327)
8.3
Half (2 mm)
Single (4 mm)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
1.1
(0.098)
Note 1
8 mm
(0.157 ±0.004)
(0.327)
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 15
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
8 mm
Peel Strength
0.1 to 1.0 Newton (10 to 100 gf)
0.1 to 1.3 Newton (10 to 130 gf)
12 and 16 mm
Theꢀdirectionꢀofꢀtheꢀpullꢀshallꢀbeꢀoppositeꢀtheꢀdirectionꢀofꢀtheꢀcarrierꢀtapeꢀtravel.ꢀTheꢀpullꢀangleꢀofꢀtheꢀcarrierꢀtapeꢀshallꢀbeꢀ165°ꢀtoꢀ180°ꢀ
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Maximum
°
°
T
s
Width (mm) Rotation (
)
8,12
16 – 200
20
10
Bo
Tape
Maximum
°
S
Width (mm) Rotation (
)
8,12
16 – 56
72 – 200
20
10
5
Typical Component Centerline
Ao
Figure 5 – Bending Radius
Figure 4 – Maximum Lateral Movement
Embossed
Carrier
Punched
Carrier
8 mm & 12 mm Tape
16 mm Tape
0.5 mm maximum
0.5 mm maximum
1.0 mm maximum
1.0 mm maximum
R
Bending
Radius
R
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 16
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3 (Includes
flange distortion
at outer edge)
Access Hole at
Slot Location
(Ø 40 mm minimum)
W
2 (Measured at hub)
D
(See Note)
A
N
C
(Arbor hole
W
1 (Measured at hub)
diameter)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
B
(see Note)
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
8 mm
A
B Minimum
C
D Minimum
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0ꢀ+0.5/-0.2ꢀ
(0.521ꢀ+0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
N Minimum
W1
W2 Maximum
W3
8.4ꢀ+1.5/-0.0
(0.331ꢀ+0.059/-0.0)
14.4
(0.567)
50
(1.969)
12.4ꢀ+2.0/-0.0
18.4
Shall accommodate tape width
without interference
12 mm
16 mm
(0.488ꢀ+0.078/-0.0)ꢀꢀ
(0.724)
16.4ꢀ+2.0/-0.0
(0.646ꢀ+0.078/-0.0)
22.4
(0.882)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 17
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Embossed Carrier
Carrier Tape
Round Sprocket Holes
Punched Carrier
8 mm & 12 mm only
START
END
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
100 mm
Minimum Leader
400 mm Minimum
Trailer
160 mm Minimum
Components
Top Cover Tape
Figure 8 – Maximum Camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm Maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 18
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
KEMET Corporation
World Headquarters
Europe
Asia
Southern Europe
Sasso Marconi, Italy
Tel: 39-051-939111
Northeast Asia
Hong Kong
Tel: 852-2305-1168
2835 KEMET Way
Simpsonville, SC 29681
Skopje, Macedonia
Tel: 389-2-55-14-623
Shenzhen, China
Tel: 86-755-2518-1306
Mailing Address:
P.O. Box 5928
Greenville, SC 29606
Beijing, China
Central Europe
Landsberg, Germany
Tel: 49-8191-3350800
Tel: 86-10-5877-1075
www.kemet.com
Tel: 864-963-6300
Fax: 864-963-6521
Shanghai, China
Tel: 86-21-6447-0707
Kamen, Germany
Tel: 49-2307-438110
Corporate Offices
Fort Lauderdale, FL
Tel: 954-766-2800
Seoul, South Korea
Tel: 82-2-6294-0550
Northern Europe
Wyboston, United Kingdom
Tel: 44-1480-273082
Taipei, Taiwan
Tel: 886-2-27528585
North America
Northeast
Wilmington, MA
Tel: 978-658-1663
Espoo, Finland
Tel: 358-9-5406-5000
Southeast Asia
Singapore
Tel: 65-6701-8033
Southeast
Lake Mary, FL
Tel: 407-855-8886
Penang, Malaysia
Tel: 60-4-6430200
Central
Novi, MI
Tel: 248-994-1030
Bangalore, India
Tel: 91-806-53-76817
Irving, TX
Tel: 972-915-6041
West
Milpitas, CA
Tel: 408-433-9950
Mexico
Guadalajara, Jalisco
Tel: 52-33-3123-2141
Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 19
Preliminary Data Sheet
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – U2J Dielectric, 10 - 50 VDC (Commercial Grade)
Disclaimer
Allꢀproductꢀspeci ꢀcations,ꢀstatements,ꢀinformationꢀandꢀdataꢀ(collectively,ꢀtheꢀ“Information”)ꢀinꢀthisꢀdatasheetꢀareꢀsubjectꢀtoꢀchange.ꢀTheꢀcustomerꢀisꢀresponsibleꢀforꢀcheckingꢀandꢀ
verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.
All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are
notꢀintendedꢀtoꢀconstituteꢀ–ꢀandꢀKEMETꢀspeci ꢀcallyꢀdisclaimsꢀ–ꢀanyꢀwarrantyꢀconcerningꢀsuitabilityꢀforꢀaꢀspeci ꢀcꢀcustomerꢀapplicationꢀorꢀuse.ꢀTheꢀInformationꢀisꢀintendedꢀforꢀuseꢀonlyꢀ
by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise
provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still
occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective
circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not
be required.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1086_U2J • 6/7/2016 20
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