C0805F332K5RACTU_技术文档

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC

(Commercial & Automotive Grade)

Overview

KEMET’s Ceramic Open Mode capacitor in X7R dielectric is

designed to signiﬁcantly minimize the probability of a low IR or

short circuit condition when forced to failure in a board stress

ﬂex situation, thus reducing the potential for catastrophic failure.

The Open Mode capacitor may experience a drop in capaci-

tance; however, a short is unlikely because a crack will not

mechanical damage that may propagate during extreme envi-

ronmental and handling conditions, it does provide superior ﬂex

performance over standard termination systems. When combined

with ﬂexible termination technology these devices offer the ultimate

level of protection against a low IR or short circuit condition. Open

Mode devices compliment KEMET's Floating Electrode (FE-

typically propagate across counter electrodes within the device’s CAP) and Floating Electrode with Flexible Termination (FF-CAP)

“active area.” Since there will not be any current leakage associ-

ated with a typical Open Mode ﬂex crack, there is no localized

heating and therefore little chance for a catastrophic and poten-

tially costly failure event.

product lines by providing a fail-safe design optimized for mid to

high range capacitance values. These devices exhibit a predict-

able change in capacitance with respect to time and voltage and

boast a minimal change in capacitance with reference to ambient

temperature. Capacitance change is limited to ±15% from -55°C

to +125°C.

Driven by the demand for a more robust and reliable com-

ponent, the Open Mode capacitor was designed for critical

applications where higher operating temperatures and mechani-

cal stress are a concern. These capacitors are widely used in

automotive circuits as well as power supplies (input and output

ﬁlters) and general electronic applications.

Concerned with ﬂex cracks resulting from excessive tensile

and shear stresses produced during board ﬂexure and thermal

cycling? These devices are available with KEMET's Flexible

termination technology which inhibits the transfer of board

stress to the rigid ceramic body, therefore mitigating ﬂex cracks

which can result in low IR or short circuit failures. Although ﬂex-

ible termination technology does not eliminate the potential for

Click image above for interactive 3D content

Open PDF in Adobe Reader for full functionality

Ordering Information

C

1210

J

685

K

3

R

A

C

TU

Case Size Speciﬁcation/

Capacitance

Code (pF)

Capacitance

Tolerance

Failure Rate/

Design

Packaging/Grade

(C-Spec)²

Ceramic

Voltage Dielectric

Termination Finish¹

(L" x W")

Series

0805

1206

1210

1812

F = Open Mode 2 Signiﬁcant Digits K = ±10% 4 = 16 V R = X7R A = N/A

J = Open Mode + Number of Zeros M = ±20% 3 = 25 V

C = 100% Matte Sn Blank = Bulk

L = SnPb (5%

minimum)

TU = 7" Reel

Unmarked

withFlexible

5 = 50 V

1 = 100 V

2 = 200 V

Termination

TM = 7" Reel Marked

AUTO = Automotive

Grade

¹Additional termination ﬁnish options may be available. Contact KEMET for details.

^{1, 2}SnPb termination ﬁnish option is not available on automotive grade product.

²Additional reeling or packaging options may be available. Contact KEMET for details.

One world. One KEMET

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Dimensions – Millimeters (Inches) – Standard Termination

L

W

T

B

S

EIA

Size

Code

Metric

Size

Code

S

L

W

Width

T

B

Mounting

Technique

Separation

Minimum

Length

Thickness

Bandwidth

0805

1206

1210

1812

2012

3216

3225

4532

2.00 (.079) ± 0.20 (.008) 1.25 (.049) ± 0.20 (.008)

3.20 (.126) ± 0.20 (.008) 1.60 (.063) ± 0.20 (.008)

3.20 (.126) ± 0.20 (.008) 2.50 (.098) ± 0.20 (.008)

4.50 (.177) ± 0.30 (.012) 3.20 (.126) ± 0.30 (.012)

0.50 (0.02) ± 0.25 (.010)

0.60 (.024) ± 0.35 (.014)

0.75 (.030)

Solder Wave or

Solder Reﬂow

See Table 2 for

Thickness

N/A

Solder Reﬂow Only

Dimensions – Millimeters (Inches) – Flexible Termination

EIA

Size

Code

Metric

Size

Code

S

L

W

Width

T

B

Mounting

Technique

Separation

Minimum

Length

Thickness

Bandwidth

0805

1206

1210

1812

2012

3216

3225

4532

2.00 (.079) ± 0.20 (.008) 1.25 (.049) ± 0.20 (.008)

3.30 (.130) ± 0.40 (.016) 1.60 (.063) ± 0.20 (.008)

3.30 (.130) ± 0.40 (.016) 2.50 (.098) ± 0.20 (.008)

4.50 (.178) ± 0.40 (.016) 3.20 (.126) ± 0.30 (.012)

0.50 (0.02) ± 0.25 (.010)

0.60 (.024) ± 0.25 (.010)

0.70 (.028) ± 0.35 (.014)

0.75 (.030)

Solder Wave or

Solder Reﬂow

See Table 2 for

Thickness

N/A

Solder Reﬂow Only

Beneﬁts

• -55°C to +125°C operating temperature range

• Open Mode/fail open design

• Mid to high capacitance ﬂex mitigation

• Non-polar device, minimizing installation concerns

• 100% pure matte tin-plated termination ﬁnish allowing for

excellent solderability

• Lead (Pb)-Free, RoHS and REACH compliant

• EIA 0805, 1206, 1210, and 1812 case sizes

• DC voltage ratings of 16 V, 25 V, 50 V, 100 V, and 200 V

• Capacitance offerings ranging from 1,000 pF to 6.8 μF

• Available capacitance tolerances of ±5%, ±10%, and ±20%

• Commercial and Automotive (AEC–Q200) grades available

• SnPb termination ﬁnish option available upon request (5%

minimum)

• Flexible termination option available upon request

2

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Applications

Typical applications include input side ﬁltering (power plane/bus), high current (battery line) and circuits that cannot be fused to open

when short circuits occur due to ﬂex cracks. Markets include automotive applications that are directly connected to the battery and/or

involve conversion to a 42 V system and raw power input side ﬁltering in power conversion.

Qualiﬁcation/Certiﬁcation

Commercial Grade products are subject to internal qualiﬁcation. Details regarding test methods and conditions are referenced in

Table 4, Performance and Reliability.

Automotive Grade products meet or exceed the requirements outlined by the Automotive Electronics Council. Details regarding test

methods and conditions are referenced in document AEC–Q200, Stress Test Qualiﬁcation for Passive Components. For additional

information regarding the Automotive Electronics Council and AEC–Q200, please visit their website at www.aecouncil.com.

Environmental Compliance

Lead (Pb)-Free, RoHS, and REACH compliant without exemptions (excluding SnPb termination ﬁnish option).

Electrical Parameters/Characteristics

Item

Parameters/Characteristics

Operating Temperature Range

-55°C to +125°C

±15%

Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

3.0%

250% of rated voltage

Dielectric Withstanding Voltage (DWV)

Dissipation Factor (DF) Maximum Limit @ 25ºC

Insulation Resistance (IR) Limit @ 25°C

(5 ±1 seconds and charge/discharge not exceeding 50 mA)

5% (6.3 and 10 V), 3.5% (16 and 25 V) and 2.5% (50 to 250 V)

See Insulation Resistance Limit Table

(Rated voltage applied for 120 ±5 seconds @ 25°C)

Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 1,000 hours.

To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF

120 Hz ±10Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as

Automatic Level Control (ALC). The ALC feature should be switched to "ON."

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Rated DC

Voltage

Capacitance

Dissipation Factor

(Maximum %)

Capacitance

Insulation

Dielectric

X7R

Value

Shift

Resistance

> 25

16/25

< 16

3.0

5.0

7.5

All

±20%

10% of Initial Limit

Insulation Resistance Limit Table (X7R Dielectric)

1,000 Megohm

EIA Case Size

500 Megohm

Microfarads or 10 GΩ

Microfarads or 100 GΩ

0201

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

N/A

< 0.012 µF

< 0.047 µF

< 0.15 µF

< 0.47 µF

< 0.39 µF

ALL

≥ 0.012 µF

≥ 0.047 µF

≥ 0.15 µF

≥ 0.47 µF

≥ 0.39 µF

N/A

< 2.2 µF

ALL

≥ 2.2 µF

N/A

< 10 µF

ALL

≥ 10 µF

N/A

4

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Table 1 – Capacitance Range/Selection Waterfall (0805 – 1812 Case Sizes)

Case Size/

Series

Voltage Code

C0805F

C1206F

C1210F

C1812F

Capacitance

Code

4

3

5

1

2

4

3

5

1

2

4

3

5

1

2

3

5

1

2

Capacitance

Rated Voltage (VDC) 16

25

50

100 200

16

25

50

100 200

16

25

50

100 200

25

50

100 200

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

Capacitance

Tolerance

1,000 pF

1,200 pF

1,500 pF

1,800 pF

2,200 pF

2,700 pF

3,300 pF

3,900 pF

4,700 pF

5,600 pF

6,800 pF

8,200 pF

10,000 pF

12,000 pF

15,000 pF

18,000 pF

22,000 pF

27,000 pF

33,000 pF

39,000 pF

47,000 pF

56,000 pF

68,000 pF

82,000 pF

0.10 µF

102

122

152

182

222

272

332

392

472

562

682

822

103

123

153

183

223

273

333

393

473

563

683

823

104

124

154

184

224

274

334

394

474

564

684

824

105

125

155

185

225

275

335

395

475

685

K

M

DD DD DD DD DD

DD DD DD DD DG

DD DD DD DD

DD DD DD DG

DD DD DD DE

DD DD DD

EC

EG

ED

EC

EG

GB GB GB GB

GB GB GB GC

GB GB GB GF

GB GB GB GK

DD DD DG DG

DD DD DG

DG DG DG

DG DG

DG DD DG

DD DD

DD DG

FD

FG

FH

FJ

FD

FG

FH

FD

FG

FH

FJ

FD

FG

FH

FJ

FD

FG

FH

FS

0.12 µF

0.15 µF

0.18 µF

0.22 µF

0.27 µF

0.33 µF

0.39 µF

0.47 µF

0.56 µF

0.68 µF

0.82 µF

1.0 µF

1.2 µF

1.5 µF

1.8 µF

2.2 µF

EG EG EG EG

EG EG

DD DG

DE DG

GB GB GB

GB GB GC

GB GB GD

GD GD GF

GD GD GK

GN GN GM

GL

EG EG

EG

EC

FR

FS

DG

EG

EC

EH

EC

EH

FM FM

2.7 µF

3.3 µF

3.9 µF

4.7 µF

FM

FG

FS

FM

FS

GK GK

6.8 µF

Rated Voltage (VDC) 16

25

3

50

5

100 200

16

4

25

3

50

5

100 200

16

4

25

3

50

5

100 200

25

3

50

5

100 200

Capacitance

Code

Voltage Code

4

1

2

1

2

1

2

1

2

Capacitance

Case Size/

Series

C0805F

C1206F

C1210F

C1812F

5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Table 2 – Chip Thickness/Packaging Quantities

Paper Quantity

Plastic Quantity

7" Reel 13" Reel

Thickness Case Thickness ±

Code

Size

Range (mm)

7" Reel

13" Reel

DD

DE

DG

EC

ED

EG

EH

FD

FG

FH

FM

FJ

0805

1206

1210

1812

0.90 ± 0.10

1.00 ± 0.10

1.25 ± 0.15

0.90 ± 0.10

1.00 ± 0.10

1.60 ± 0.15

1.60 ± 0.20

0.95 ± 0.10

1.25 ± 0.15

1.55 ± 0.15

1.70 ± 0.20

1.85 ± 0.20

2.25 ± 0.20

2.50 ± 0.30

1.00 ± 0.10

1.10 ± 0.10

1.25 ± 0.15

1.50 ± 0.10

1.60 ± 0.20

1.70 ± 0.20

1.90 ± 0.20

2.00 ± 0.20

4,000

0

10,000

0

2,500

4,000

2,500

2,000

4,000

2,500

2,000

1,000

500

10,000

8,000

10,000

8,000

4,000

2,000

FR

FS

GB

GC

GD

GF

GK

GN

GL

GM

0

500

7" Reel

13" Reel

7" Reel

13" Reel

Thickness

Code

Case

Size

Thickness ±

Range (mm)

Paper Quantity

Plastic Quantity

Package quantity based on ﬁnished chip thickness speciﬁcations.

6

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Table 3A – Land Pattern Design Recommendations per IPC–7351 – Standard Termination

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

EIA

Size

Code

Metric

Size

Code

C

Y

X

V1

V2

C

Y

X

V1

V2

C

Y

X

V1

V2

0805

1206

1210

1210¹

1812

2012

3216

3225

4532

1.00

1.35

1.55

4.40

2.60

0.90

1.15

1.45

3.50

2.00

0.75

0.95

1.35

2.80

1.70

1.60

1.50

2.15

1.35

1.60

1.90

2.80

2.90

3.60

5.60

5.65

5.60

6.90

2.90

3.80

3.90

4.60

1.50

1.40

2.05

1.15

1.40

1.80

2.70

2.80

3.50

4.70

6.00

2.30

3.20

3.30

4.00

1.40

1.30

1.95

0.95

1.20

1.70

2.60

2.70

3.40

4.00

5.30

2.00

2.90

3.00

3.70

¹Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reﬂow solder

processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reﬂow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualiﬁcation

testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

V1

Y

V2

X

C

Grid Placement Courtyard

7

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Table 3B – Land Pattern Design Recommendations per IPC–7351 – Flexible Termination

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

EIA

Size

Code

Metric

Size

Code

C

Y

X

V1

V2

C

Y

X

V1

V2

C

Y

X

V1

V2

0805

1206

1210

1812

2012

3216

3225

4532

1.00

1.35

1.55

4.40

2.60

0.90

1.15

1.45

3.50

2.00

0.75

0.95

1.35

2.80

1.70

1.60

2.10

1.65

1.80

1.90

2.80

3.60

5.90

7.00

2.90

3.80

4.60

1.50

2.00

1.45

1.60

1.80

2.70

3.50

5.00

6.10

2.30

3.20

4.00

1.40

1.90

1.25

1.40

1.70

2.60

3.40

4.30

5.40

2.00

2.90

3.70

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reﬂow solder

processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reﬂow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualiﬁcation

testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

V1

Y

V2

X

C

Grid Placement Courtyard

8

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Soldering Process

Recommended Soldering Technique:

• Solder wave or solder reﬂow for EIA case sizes 0603, 0805 and 1206

• All other EIA case sizes are limited to solder reﬂow only

Recommended Reﬂow Soldering Proﬁle:

KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection,

IR or vapor phase reﬂow techniques. Preheating of these components is recommended to avoid extreme thermal stress. KEMET’s

recommended proﬁle conditions for convection and IR reﬂow reﬂect the proﬁle conditions of the IPC/J-STD-020 standard for moisture

sensitivity testing. These devices can safely withstand a maximum of three reﬂow passes at these conditions.

T_P

T_L

Termination Finish

t_P

Maximum Ramp Up Rate = 3°C/sec

Maximum Ramp Down Rate = 6°C/sec

Proﬁle Feature

SnPb

100% Matte Sn

t_L

Preheat/Soak

T_smax

T_smin

Temperature Minimum (T_Smin

Temperature Maximum (T_Smax

Time (t_S) from T_Sminto T_Smax

)

100°C

150°C

200°C

)

t_S

60 – 120 seconds

Ramp-Up Rate (T_Lto T_P)

Liquidous Temperature (T_L)

Time Above Liquidous (t_L)

Peak Temperature (T_P)

3°C/second maximum 3°C/second maximum

25

183°C

60 – 150 seconds

235°C

217°C

60 – 150 seconds

260°C

25° C to Peak

Time

Time Within 5°C of Maximum

20 seconds maximum 30 seconds maximum

Peak Temperature (t_P)

Ramp-Down Rate (T_Pto T_L) 6°C/second maximum 6°C/second maximum

Time 25°C to Peak

6 minutes maximum

8 minutes maximum

Temperature

Note 1: All temperatures refer to the center of the package, measured on the

capacitor body surface that is facing up during assembly reﬂow.

9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Stress

Reference

Test or Inspection Method

Terminal Strength

JIS–C–6429

Appendix 1, Note: Force of 1.8 kg for 60 seconds.

Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G.

Flexible termination system – 3.0 mm (minimum).

Board Flex

JIS–C–6429

Magniﬁcation 50 X. Conditions:

a) Method B, 4 hours @ 155°C, dry heat @ 235°C

b) Method B @ 215°C category 3

Solderability

J–STD–002

c) Method D, category 3 @ 260°C

Temperature Cycling

Biased Humidity

JESD22 Method JA–104

MIL–STD–202 Method 103

1,000 Cycles (-55°C to +125°C). Measurement at 24 hours +/- 2 hours after test conclusion.

Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor. Measurement

at 24 hours +/- 2 hours after test conclusion.

Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.

Measurement at 24 hours +/- 2 hours after test conclusion.

t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.

Measurement at 24 hours +/- 2 hours after test conclusion.

-55°C/+125°C. Note: Number of cycles required – 300, maximum transfer time – 20 seconds, dwell

time – 15 minutes. Air – Air.

Moisture Resistance

Thermal Shock

MIL–STD–202 Method 106

MIL–STD–202 Method 107

MIL–STD–202 Method 108

/EIA–198

High Temperature Life

Storage Life

1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied.

MIL–STD–202 Method 108 150°C, 0 VDC for 1,000 hours.

5 g's for 20 min., 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7 secure

MIL–STD–202 Method 204 points on one long side and 2 secure points at corners of opposite sides. Parts mounted within 2"

from any secure point. Test from 10 – 2,000 Hz

Vibration

Mechanical Shock

MIL–STD–202 Method 213 Figure 1 of Method 213, Condition F.

Resistance to Solvents MIL–STD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent.

Storage and Handling

Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other

environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term

storage. In addition, packaging materials will be degraded by high temperature– reels may soften or warp and tape peel force may

increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum storage humidity not exceed 70%

relative humidity. Temperature ﬂuctuations should be minimized to avoid condensation on the parts and atmospheres should be free of

chlorine and sulfur bearing compounds. For optimized solderability chip stock should be used promptly, preferably within 1.5 years of

receipt.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Construction – Standard Termination

Detailed Cross Section

Dielectric Material

(BaTiO₃)

Dielectric Material

(BaTiO₃)

Barrier Layer

(Ni)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Base Metal

(Cu)

Inner Electrodes

(Ni)

Base Metal

(Cu)

Barrier Layer

(Ni)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Inner Electrodes

(Ni)

Construction – Flexible Termination

Detailed Cross Section

Dielectric Material

(BaTiO₃)

Barrier Layer

(Ni)

Base Metal

(Cu)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Epoxy Layer

(Ag)

Dielectric Material

(BaTiO₃)

Inner Electrodes

(Ni)

Base Metal

(Cu)

Epoxy Layer

(Ag)

Barrier Layer

(Ni)

Termination Finish

(100% Matte Sn /

SnPb - 5% min)

Inner Electrodes

(Ni)

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Capacitor Marking (Optional):

These surface mount multilayer ceramic capacitors are

normally supplied unmarked. If required, they can be marked

as an extra cost option. Marking is available on most KEMET

devices but must be requested using the correct ordering

code identiﬁer(s). If this option is requested, two sides of the

ceramic body will be laser marked with a “K” to identify KEMET,

followed by two characters (per EIA–198 - see table below) to

identify the capacitance value. EIA 0603 case size devices are

limited to the “K” character only.

Marking appears in legible contrast. Illustrated below is an

example of an MLCC with laser marking of “KA8”, which

designates a KEMET device with rated capacitance of 100 µF.

Orientation of marking is vendor optional.

2-Digit

KEMET

Capacitance

ID

Code

Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices

• EIA 0402 case size devices

• EIA 0603 case size devices with Flexible Termination option.

• KPS Commercial and Automotive Grade stacked devices.

• X7R dielectric products in capacitance values outlined below

EIA Case Size

0603

Metric Size Code

Capacitance

≤ 170 pF

1608

2012

3216

3225

4520

4532

4564

5650

5664

0805

≤ 150 pF

1206

≤ 910 pF

1210

≤ 2,000 pF

≤ 3,900 pF

≤ 6,700 pF

≤ 0.018 µF

≤ 0.027 µF

≤ 0.033 µF

1808

1812

1825

2220

2225

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Capacitor Marking (Optional) cont’d

Capacitance (pF) For Various Alpha/Numeral Identiﬁers

Numeral

Alpha

Character

9

0

1

2

3

4

5

6

7

8

Capacitance (pF)

A

B

C

D

E

F

G

H

J

0.1

0.11

0.12

0.13

0.15

0.16

0.18

0.2

1 0

1.1

1 2

1 3

1 5

1 6

1 8

2 0

2 2

2.4

2.7

3 0

3 3

3 6

3 9

4 3

4.7

5.1

5 6

6 2

6 8

7 5

8 2

9.1

2 5

3 5

4 0

4 5

5 0

6 0

7 0

8 0

9 0

10

11

12

13

15

16

18

20

22

24

27

30

33

36

39

43

47

51

56

62

68

75

82

91

25

35

40

45

50

60

70

80

90

100

110

120

130

150

160

180

200

220

240

270

300

330

360

390

430

470

510

560

620

680

750

820

910

250

350

400

450

500

600

700

800

900

1,000

1,100

1,200

1,300

1,500

1,600

1,800

2,000

2,200

2,400

2,700

3,000

3,300

3,600

3,900

4,300

4,700

5,100

5,600

6,200

6,800

7,500

8,200

9,100

2,500

3,500

4,000

4,500

5,000

6,000

7,000

8,000

9,000

10,000

11,000

12,000

13,000

15,000

16,000

18,000

20,000

22,000

24,000

27,000

30,000

33,000

36,000

39,000

43,000

47,000

51,000

56,000

62,000

68,000

75,000

82,000

91,000

25,000

35,000

40,000

45,000

50,000

60,000

70,000

80,000

90,000

100,000 1,000,000

110,000 1,100,000

120,000 1,200,000

130,000 1,300,000

150,000 1,500,000

160,000 1,600,000

180,000 1,800,000

200,000 2,000,000

220,000 2,200,000

240,000 2,400,000

270,000 2,700,000

300,000 3,000,000

330,000 3,300,000

360,000 3,600,000

390,000 3,900,000

430,000 4,300,000

470,000 4,700,000

510,000 5,100,000

560,000 5,600,000

620,000 6,200,000

680,000 6,800,000

750,000 7,500,000

820,000 8,200,000

910,000 9,100,000

250,000 2,500,000

350,000 3,500,000

400,000 4,000,000

450,000 4,500,000

500,000 5,000,000

600,000 6,000,000

700,000 7,000,000

800,000 8,000,000

900,000 9,000,000

10,000,000

11,000,000

12,000,000

13,000,000

15,000,000

16,000,000

18,000,000

20,000,000

22,000,000

24,000,000

27,000,000

30,000,000

33,000,000

36,000,000

39,000,000

43,000,000

47,000,000

51,000,000

56,000,000

62,000,000

68,000,000

75,000,000

82,000,000

91,000,000

25,000,000

35,000,000

40,000,000

45,000,000

50,000,000

60,000,000

70,000,000

80,000,000

90,000,000

100,000,000

110,000,000

120,000,000

130,000,000

150,000,000

160,000,000

180,000,000

200,000,000

220,000,000

240,000,000

270,000,000

300,000,000

330,000,000

360,000,000

390,000,000

430,000,000

470,000,000

510,000,000

560,000,000

620,000,000

680,000,000

750,000,000

820,000,000

910,000,000

250,000,000

350,000,000

400,000,000

450,000,000

500,000,000

600,000,000

700,000,000

800,000,000

900,000,000

0.22

0.24

0.27

0.3

K

L

M

N

P

Q

R

S

T

U

V

W

X

Y

Z

a

0.33

0.36

0.39

0.43

0.47

0.51

0.56

0.62

0.68

0.75

0.82

0.91

0.25

0.35

0.4

b

d

e

0.45

0.5

f

m

n

0.6

0.7

t

0.8

y

0.9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Tape & Reel Packaging Information

KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA

Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on

reeling quantities for commercial chips.

Bar Code Label

Anti-Static Reel

®

Embossed Plastic* or

Punched Paper Carrier.

Chip and KPS Orientation in Pocket

(except 1825 Commercial, and 1825 and 2225 Military)

KEMET

Sprocket Holes

Embossment or Punched Cavity

8 mm, 12 mm

or 16 mm Carrier Tape

Anti-Static Cover Tape

(.10 mm (.004") Maximum Thickness)

178 mm (7.00")

or

330 mm (13.00")

*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.

Table 5 – Carrier Tape Conﬁguration – Embossed Plastic & Punched Paper (mm)

EIA Case Size

01005 – 0402

0603 – 1210

Tape Size (W)*

Pitch (P₁)*

8

2

4

1805 – 1808

12

16

8

4

≥ 1812

8

KPS 1210

8

KPS 1812 & 2220

Array 0508 & 0612

12

4

*Refer to Figures 1 & 2 for W and P₁carrier tape reference locations.

*Refer to Tables 6 & 7 for tolerance speciﬁcations.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

T

P2

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

2

E

1

Po

ØDo

Ao

F

Ko

W

E

2

B

1

Bo

S

1

P

1

T

1

Embossment

For cavity size,

see Note 1 Table 4

Center Lines of Cavity

ØD

1

Cover Tape

is for tape feeder reference only,

including draft concentric about B

B

1

o

.

User Direction of Unreeling

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

D₁Minimum

Note 1

1.0

(0.039)

R Reference S₁Minimum

T

T₁

Tape Size

8 mm

D₀

E₁

P₀

P₂

Note 2

Note 3

Maximum

25.0

(0.984)

1.5 +0.10/-0.0

(0.059 +0.004/-0.0)

1.75 ±0.10

4.0 ±0.10

2.0 ±0.05

0.600

(0.024)

0.600

(0.024)

0.100

(0.004)

12 mm

16 mm

(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)

1.5

(0.059)

30

(1.181)

Variable Dimensions — Millimeters (Inches)

B₁Maximum

Note 4

4.35

(0.171)

E₂

T₂

W

Tape Size

8 mm

Pitch

F

P₁

A₀,B₀& K₀

Minimum

6.25

(0.246)

Maximum

2.5

(0.098)

Maximum

8.3

(0.327)

3.5 ±0.05

(0.138 ±0.002) (0.157 ±0.004)

4.0 ±0.10

Single (4 mm)

Single (4 mm) &

8.2

10.25

5.5 ±0.05

8.0 ±0.10

4.6

12.3

12 mm

16 mm

Note 5

Double (8 mm)

(0.323)

(0.404)

(0.217 ±0.002) (0.315 ±0.004)

(0.181)

(0.484)

12.1

(0.476)

14.25

(0.561)

7.5 ±0.05 12.0 ±0.10

(0.138 ±0.002) (0.157 ±0.004)

4.6

(0.181)

16.3

(0.642)

Triple (12 mm)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and

hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 6).

3. If S₁< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B₁dimension is a reference dimension for tape feeder clearance only.

5. The cavity deﬁned by A₀, B₀and K₀shall surround the component with sufﬁcient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).

(e) for KPS Series product, A₀and B₀are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Figure 2 – Punched (Paper) Carrier Tape Dimensions

T

P2

[10 pitches cumulative

tolerance on tape ± 0.2 mm]

E

1

Po

ØDo

0

A

F

W

2

E

0

B

Bottom Cover Tape

P

1

G

Cavity Size,

See

1

T

1

T

Top Cover Tape

Center Lines of Cavity

Note 1, Table 7

Bottom Cover Tape

User Direction of Unreeling

Table 7 – Punched (Paper) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

R Reference

Note 2

Tape Size

D₀

E₁

P₀

P₂

T₁Maximum

G Minimum

1.5 +0.10 -0.0

(0.059 +0.004 -0.0)

1.75 ±0.10

(0.069 ±0.004)

4.0 ±0.10

(0.157 ±0.004)

2.0 ±0.05

0.10

0.75

(0.030)

25

(0.984)

8 mm

(0.079 ±0.002) (0.004) Maximum

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

Pitch

E2 Minimum

F

P₁

T Maximum

W Maximum

A₀B₀

2.0 ±0.05

(0.079 ±0.002)

4.0 ±0.10

8.3

(0.327)

8.3

Half (2 mm)

Single (4 mm)

6.25

(0.246)

3.5 ±0.05

(0.138 ±0.002)

1.1

(0.098)

Note 1

8 mm

(0.157 ±0.004)

(0.327)

1. The cavity deﬁned by A₀, B₀and T shall surround the component with sufﬁcient clearance that:

a) the component does not protrude beyond either surface of the carrier tape.

b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

c) rotation of the component is limited to 20° maximum (see Figure 3).

d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).

e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

2. The tape with or without components shall pass around R without damage (see Figure 6).

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force: 1.0 Kg minimum.

2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:

Tape Width

8 mm

Peel Strength

0.1 to 1.0 Newton (10 to 100 gf)

0.1 to 1.3 Newton (10 to 130 gf)

12 and 16 mm

The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°

from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.

3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA

Standards 556 and 624.

Figure 3 – Maximum Component Rotation

°

T

Maximum Component Rotation

Top View

Maximum Component Rotation

Side View

Typical Pocket Centerline

Tape

Maximum

°

T

s

Width (mm) Rotation (

)

8,12

16 – 200

20

10

Bo

Tape

Maximum

°

S

Width (mm) Rotation (

)

8,12

16 – 56

72 – 200

20

10

5

Typical Component Centerline

Ao

Figure 4 – Maximum Lateral Movement

Figure 5 – Bending Radius

Embossed

Carrier

Punched

Carrier

8 mm & 12 mm Tape

16 mm Tape

0.5 mm maximum

1.0 mm maximum

R

Bending

Radius

R

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Figure 6 – Reel Dimensions

Full Radius,

W3 (Includes

flange distortion

at outer edge)

Access Hole at

Slot Location

(Ø 40 mm minimum)

See Note

W

2 (Measured at hub)

D

(See Note)

A

N

C

(Arbor hole

W

1 (Measured at hub)

diameter)

If present,

tape slot in core

for tape start:

2.5 mm minimum width x

10.0 mm minimum depth

B

(see Note)

Note: Drive spokes optional; if used, dimensions B and D shall apply.

Table 8 – Reel Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size

8 mm

A

B Minimum

C

D Minimum

178 ±0.20

(7.008 ±0.008)

or

330 ±0.20

(13.000 ±0.008)

1.5

(0.059)

13.0 +0.5/-0.2

(0.521 +0.02/-0.008)

20.2

(0.795)

12 mm

16 mm

Variable Dimensions — Millimeters (Inches)

Tape Size

N Minimum

W₁

W₂Maximum

W₃

8.4 +1.5/-0.0

(0.331 +0.059/-0.0)

14.4

(0.567)

8 mm

50

(1.969)

12.4 +2.0/-0.0

18.4

Shall accommodate tape width

without interference

12 mm

16 mm

(0.488 +0.078/-0.0)

(0.724)

16.4 +2.0/-0.0

(0.646 +0.078/-0.0)

22.4

(0.882)

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Figure 7 – Tape Leader & Trailer Dimensions

Embossed Carrier

Carrier Tape

Round Sprocket Holes

Punched Carrier

8 mm & 12 mm only

START

END

Top Cover Tape

Elongated Sprocket Holes

(32 mm tape and wider)

100 mm

Minimum Leader

400 mm Minimum

Trailer

160 mm Minimum

Components

Top Cover Tape

Figure 8 – Maximum Camber

Elongated sprocket holes

(32 mm & wider tapes)

Carrier Tape

Round Sprocket Holes

1 mm Maximum, either direction

Straight Edge

250 mm

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

KEMET Corporation

World Headquarters

Europe

Asia

Southern Europe

Paris, France

Tel: 33-1-4646-1006

Northeast Asia

Hong Kong

Tel: 852-2305-1168

2835 KEMET Way

Simpsonville, SC 29681

Sasso Marconi, Italy

Tel: 39-051-939111

Shenzhen, China

Tel: 86-755-2518-1306

Mailing Address:

P.O. Box 5928

Greenville, SC 29606

Beijing, China

Central Europe

Landsberg, Germany

Tel: 49-8191-3350800

Tel: 86-10-5829-1711

www.kemet.com

Tel: 864-963-6300

Fax: 864-963-6521

Shanghai, China

Tel: 86-21-6447-0707

Kamen, Germany

Tel: 49-2307-438110

Corporate Ofﬁces

Fort Lauderdale, FL

Tel: 954-766-2800

Taipei, Taiwan

Tel: 886-2-27528585

Northern Europe

Bishop’s Stortford, United Kingdom

Tel: 44-1279-460122

North America

Southeast Asia

Singapore

Southeast

Tel: 65-6586-1900

Lake Mary, FL

Tel: 407-855-8886

Espoo, Finland

Tel: 358-9-5406-5000

Penang, Malaysia

Tel: 60-4-6430200

Northeast

Wilmington, MA

Tel: 978-658-1663

Bangalore, India

Tel: 91-806-53-76817

Central

Novi, MI

Tel: 248-306-9353

West

Milpitas, CA

Tel: 408-433-9950

Mexico

Guadalajara, Jalisco

Tel: 52-33-3123-2141

Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not

assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of

KEMET Electronics Corporation.

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

Open Mode Design (FO-CAP), X7R Dielectric, 16 – 200 VDC (Commercial & Automotive Grade)

Disclaimer

All product speciﬁcations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for checking and

verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.

All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.

Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such applications, but are

not intended to constitute – and KEMET speciﬁcally disclaims – any warranty concerning suitability for a speciﬁc customer application or use. The Information is intended for use only

by customers who have the requisite experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise

provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no obligation or liability for the advice given or results obtained.

Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still

occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective

circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.

Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other measures may not

be required.


型号：	C0805F332K5RACTU
厂家：	KEMET CORPORATION
描述：	Ceramic Capacitor, Multilayer, Ceramic, 50V, 10% +Tol, 10% -Tol, X7R, 15% TC, 0.0033uF, Surface Mount, 0805, CHIP, ROHS COMPLIANT 电容器
文件：	总21页 (文件大小：3312K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C0805F332K5RACTU [KEMET]

相关型号：

C0805F332K5RAL3325

C0805F332K5RAL7411

C0805F332K5RAL7867

C0805F332M1RAC

C0805F332M1RACTM

C0805F332M1RACTU

C0805F332M2RAC

C0805F332M3RAC

C0805F332M3RAC7867

C0805F332M4RAC

C0805F332M4RAC7867

C0805F332M5RAC