C1206C106K3PAC7411 [KEMET]
Ceramic Capacitor, Multilayer, Ceramic, 25V, 10% +Tol, 10% -Tol, X5R, -/+15ppm/Cel TC, 10uF, 1206,;型号: | C1206C106K3PAC7411 |
厂家: | KEMET CORPORATION |
描述: | Ceramic Capacitor, Multilayer, Ceramic, 25V, 10% +Tol, 10% -Tol, X5R, -/+15ppm/Cel TC, 10uF, 1206, |
文件: | 总18页 (文件大小:890K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Overview
KEMET’s X5R dielectric features an 85°C maximum operating
temperature and is considered “semi-stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes X5R dielectric as a Class II material. Components
discriminating circuits where Q and stability of capacitance
characteristics are not critical. X5R exhibits a predictable change
in capacitance with respect to time and voltage and boasts
a minimal change in capacitance with reference to ambient
of this classification are fixed, ceramic dielectric capacitors suited temperature. Capacitance change is limited to ±15% from -55°C
for bypass and decoupling applications or for frequency
to +85°C.
Applications
Benefits
Typical applications include decoupling, bypass, and filtering.
• -55°C to +85°C operating temperature range
• Pb-Free and RoHS Compliant
• Temperature stable dielectric
• EIA 0201, 0402, 0603, 0805, 1206, and 1210 case sizes
• DC voltage ratings of 4 V, 6.3 V, 10 V, 16 V, 25 V, 35 V and 50 V
• Capacitance offerings ranging from 0.01 μF to 100 μF
• Available capacitance tolerances of ±10% and ±20%
• Non-polar device, minimizing installation concerns
• 100% pure matte tin-plated termination finish allowing for
excellent solderability
Ordering Information
C
1206
C
107
M
9
P
A
C
TU
Case Size
(L" x W")
Specification/
Series
Capacitance
Code (pF)
Capacitance
Tolerance
Failure Rate/
Design
Packaging/Grade
(C–Spec)2
Ceramic
Voltage
Dielectric
P = X5R
Termination Finish1
1005 =
01005
0201
0402
0603
0805
1206
1210
C = Standard
2 Sig. Digits
+ Number of
Zeros
K = ±10%
M = ±20%
7 = 4 V
A = N/A
C = 100% Matte
Sn
Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
9 = 6.3 V
8 = 10 V
4 = 16 V
3 = 25 V
6 = 35 V
5 = 50 V
1 Additional termination finish options may be available. Contact KEMET for details.
2 Additional reeling or packaging options may be available. Contact KEMET for details.
One WORLD
One Brand
One Strategy
One Focus
One Team
One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
100% Tin or SnPb Plate
L
Dimensions – Millimeters (Inches)
W
B
T
Nickel Plate
S
Conductive Metalization
Electrodes
EIA
Size
Code
01005
0201
0402
0603
0805
1206
1210
Metric
Size
Code
0402
0603
1005
1608
2012
S
L
W
Width
T
B
Mounting
Technique
Separation
Minimum
Length
Thickness
Bandwidth
0.40 (.016) ± 0.02 (.001) 0.20 (.008) ± 0.02 (.001)
0.60 (.024) ± 0.03 (.001) 0.30 (.012) ± 0.03 (.001)
1.00 (.040) ± 0.05 (.002) 0.50 (.020) ± 0.05 (.002)
1.60 (.063) ± 0.15 (.006) 0.80 (.032) ± 0.15 (.006)
2.00 (.079) ± 0.20 (.008) 1.25 (.049) ± 0.20 (.008)
3.20 (.126) ± 0.20 (.008) 1.60 (.063) ± 0.20 (.008)
3.20 (.126) ± 0.20 (.008) 2.50 (.098) ± 0.20 (.008)
4.50 (.177) ± 0.30 (.012) 3.20 (.126) ± 0.30 (.012)
4.50 (.177) ± 0.30 (.012) 6.40 (.252) ± 0.40 (.016)
5.70 (.224) ± 0.40 (.016) 5.00 (.197) ± 0.40 (.016)
5.60 (.220) ± 0.40 (.016) 6.40 (.248) ± 0.40 (.016)
0.10 (.004) ± 0.03 (.001)
0.15 (.006) ± 0.05 (.002)
0.30 (.012) ± 0.10 (.004)
0.35 (.014) ± 0.15 (.006)
0.50 (0.02) ± 0.25 (.010)
0.50 (0.02) ± 0.25 (.010)
0.50 (0.02) ± 0.25 (.010)
0.60 (.024) ± 0.35 (.014)
0.60 (.024) ± 0.35 (.014)
0.60 (.024) ± 0.35 (.014)
0.60 (.024) ± 0.35 (.014)
N/A
Solder Reflow Only
0.30 (.012)
0.70 (.028)
0.75 (.030)
Solder Wave or
Solder Reflow
See Table 2 for
Thickness
3216
3225
4532
4564
5650
5664
1812
N/A
1825
2220
2225
Solder Reflow Only
Qualification/Certification
Commercial grade products are subject to internal qualification. Details regarding test methods and conditions are referenced in
Table 4, Performance & Reliability.
Environmental Compliance
Pb-Free and RoHS Compliant.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
-55°C to +85°C
±15%
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)
Aging Rate (Maximum % Cap Loss/Decade Hour)
4.0%
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
Dielectric Withstanding Voltage
Dissipation Factor (DF) Maximum Limits @ 25ºC
See Dissipation Factor Limit Table
See Insulation Resistance Limit Table
(Rated voltage applied for 120 ±5 seconds @ 25°C)
Insulation Resistance (IR) Limit @ 25°C
Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specific
datasheet for referee time details.
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Rated DC
Voltage
Capacitance
Dissipation Factor
(Maximum %)
Capacitance
Insulation
Resistance
Dielectric
X5R
Value
Shift
> 25
25
3.0
7.5
All
±20%
10% of Initial Limit
< 25
< 25
< 0.56 µF
≥ 0.56 µF
7.5
12.0
Dissipation Factor Limit Table
Rated DC Voltage Capacitance
Dissipation Factor
50 – 200 V
25 V
All
3%
5%
All
< 25 V
< 25 V
< 0.56 µF
≥ 0.56 µF
5%
10%
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Insulation Resistance Limit Table
1,000 Megohm
Microfarads or 100 GΩ
500 Megohm
Microfarads or 10 GΩ
EIA Case Size
0201
0402
0603
0805
1206
1210
1808
1812
1825
2220
2225
N/A
ALL
≥ .012 µF
≥ .047 µF
≥ .047 µF
≥ 0.22 µF
≥ 0.39 µF
N/A
< .012 µF
< .047 µF
< .047 µF
< 0.22 µF
< 0.39 µF
ALL
< 2.2 µF
ALL
≥ 2.2 µF
N/A
< 10 µF
ALL
≥ 10 µF
N/A
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 1 – Capacitance Range/Selection Waterfall (1005 – 1210 Case Sizes)
Series C1005 C0201
C0402
C0603
C0805
C1206
C1210
Cap
Code
Voltage Code
7
9
7
9
8
4
7
9
8
4
3
5
7
9
8
4
3
5
7
9
8
4
3
5
9
8
4
3
1
9
8
4
3
6
5
Cap
Voltage DC
Cap Tolerance
Product Availability and Chip Thickness Codes - See Table 2 for Chip Thickness Dimensions
10,000 pF
12,000 pF
15,000 pF
18,000 pF
22,000 pF
27,000 pF
33,000 pF
39,000 pF
47,000 pF
56,000 pF
68,000 pF
82,000 pF
0.10 uF
0.12 uF
0.15 uF
0.18 uF
0.22 uF
0.27 uF
0.33 uF
0.39 uF
0.47 uF
0.56 uF
0.68 uF
0.82 uF
1.0 uF
1.2 uF
1.5 uF
1.8 uF
2.2 uF
2.7 uF
3.3 uF
3.9 uF
4.7 uF
5.6 uF
6.8 uF
8.2 uF
10 uF
12 uF
15 uF
18 uF
22 uF
103
123
153
183
223
273
333
393
473
563
683
823
104
124
154
184
224
274
334
394
474
564
684
824
105
125
155
185
225
275
335
395
475
565
685
825
106
126
156
186
226
276
336
396
476
107
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
AB AB AB AB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
BB BB BB BB
AB AB
BB BB BB BB
BB BB
CC CC CC CC
CC CC CC CC
CC CC CC CC
CC CC CC CC
CC CC CC CC
CC CC CC CC
CC CC CC CC
CC CC CC CC CC
EB EB EB EB
EB EB EB EB
EB EB EB EB
EC EC EC EC
ED ED ED ED
EE EE EE EE
EF EF EF EF
FD FD FD FD FD
FD FD FD FD FD
FD FD FD FD FD
FD FD FD FD FD
FF FF FF FF FF
FH FH FH FH FH FH
FD FD FD FD
FD FD FD FD
FD FD FD FD
FG FG FG FG
FG FG FG FG
FH FH FH FH
FJ FJ FJ FJ
BB BB
DC DC DC DC DC
DD DD DD DD DD
DE DE DE DE DE
DF DF DF DF DF
BB BB
DG DG DG DG DG DG EE EE EE EH
DC DC DC DC
DC DC DC DC
DD DD DD DD
DG DG DG DG
DL DL DL DL
DL DL DL DG
DG DG DG DG
DG DG DH DH DG
DG DG DG
EC EC EC EC
EC EC EC EC
EC EC EC EC
EE EE EE EE
EF EF EF EF
EH EH EH EH
EH EH EH EH
BB¹ BB¹
BB¹
CC CC CC CC
CC¹ CC¹
BC¹
CC CC CC
EH EH EH EH EH FK FK FK FK
EK EK EH
EK EK EH
ED ED EH
EH EH EH EH
FG FG FG FE
FJ FJ FJ FJ
FK FK FK FG
FK FK FK FH
FD¹ FD FG
FF FF FG
FG FG FH
FH FH FJ FS¹
DG DG DG
CC¹ CC¹
DG DG DG DG
DG¹ DG¹
EH¹ EH¹
27 uF
33 uF
39 uF
47 uF
DH¹ DG¹
EH¹ EH¹
EH¹
FS¹ FS¹ FS¹
FS¹
100 uF
Voltage DC
Cap
C
M
9
C
TU
C
1206
107
P
A
Case Size
(L" x W")
Specification/
Series
Capacitance
Code (pF)
Capacitance
Tolerance
Failure Rate/
Design
Packaging/Grade
(C–Spec)
C
e
ra
m
i
c
Voltage
Dielectric
P = X5R
Termination Finish
1005 =
01005
0201
0402
0603
0805
1206
1210
C = Standard
2 Sig. Digits
+ Number of
Zeros
K = ±10%
M = ±20%
7 = 4 V
A = N/A
C = 100% Matte
Sn
Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
9 = 6.3 V
8 = 10 V
4 = 16 V
3 = 25 V
6 = 35 V
5 = 50 V
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
5
Roll Over for
Order Info.
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 2 – Chip Thickness/Packaging Quantities
Paper Quantity
7" Reel 13" Reel
Plastic Quantity
7" Reel 13" Reel
Thickness Case Thickness ±
Code
Size
Range (mm)
AB
BB
BC
BB
CC
DG
DH
DG
DC
DD
DL
DE
DF
EB
EH
EH
EK
EC
ED
EE
EF
FH
FS
FT
FD
FE
FF
0201
0402
0402
0402
0603
0805
0805
0805
0805
0805
0805
0805
0805
1206
1206
1206
1206
1206
1206
1206
1206
1210
1210
1210
1210
1210
1210
1210
1210
1210
0.30 ± 0.03
0.50 ± 0.05
0.50 ± 0.05
0.50 ± 0.05
0.80 ± 0.10
0.60 ± 0.10
0.60 ± 0.10
0.60 ± 0.10
0.78 ± 0.10
0.90 ± 0.10
0.95 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
0.78 ± 0.10
0.78 ± 0.10
0.78 ± 0.10
0.80 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.20 ± 0.15
0.78 ± 0.10
0.78 ± 0.10
0.78 ± 0.10
0.95 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
1.85 ± 0.20
2.10 ± 0.20
15,000
10,000
10,000
10,000
4,000
4,000
4,000
4,000
4,000
4,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
50,000
50,000
50,000
10,000
10,000
10,000
10,000
10,000
10,000
0
0
0
10,000
10,000
10,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4,000
2,500
2,500
4,000
4,000
4,000
2,000
4,000
2,500
2,500
2,500
4,000
4,000
4,000
4,000
2,500
2,500
2,500
2,000
2,000
10,000
10,000
10,000
10,000
10,000
10,000
8,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
10,000
8,000
8,000
0
4,000
4,000
4,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FG
FJ
FK
7" Reel
13" Reel
7" Reel
13" Reel
Thickness
Code
Case
Size
Thickness ±
Range (mm)
Paper Quantity
Plastic Quantity
Package quantity based on finished chip thickness specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
EIA
Size
Code
Metric
Size
Code
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
01005
0201
0402
0603
0805
1206
1210
1808
1812
1825
2220
2225
0402
0603
1005
1608
2012
3216
3225
4520
4532
4564
5650
5664
0.33
0.38
0.50
0.90
1.00
1.60
1.60
2.30
2.15
2.15
2.75
2.70
0.46
0.56
0.72
1.15
1.35
1.35
1.35
1.75
1.60
1.60
1.70
1.70
0.43
0.52
0.72
1.10
1.55
1.90
2.80
2.30
3.60
6.90
5.50
6.90
1.60
1.80
2.20
4.00
4.40
5.60
5.65
7.40
6.90
6.90
8.20
8.10
0.90
1.00
1.20
2.10
2.60
2.90
3.80
3.30
4.60
7.90
6.50
7.90
0.28
0.33
0.45
0.80
0.90
1.50
1.50
2.20
2.05
2.05
2.65
2.60
0.36
0.46
0.62
0.95
1.15
1.15
1.15
1.55
1.40
1.40
1.50
1.50
0.33
0.42
0.62
1.00
1.45
1.80
2.70
2.20
3.50
6.80
5.40
6.80
1.30
1.50
1.90
3.10
3.50
4.70
4.70
6.50
6.00
6.00
7.30
7.20
0.70
0.80
1.00
1.50
2.00
2.30
3.20
2.70
4.00
7.30
5.90
7.30
0.23
0.28
0.40
0.60
0.75
1.40
1.40
2.10
1.95
1.95
2.55
2.50
0.26
0.36
0.52
0.75
0.95
0.95
0.95
1.35
1.20
1.20
1.30
1.30
0.23
0.32
0.52
0.90
1.35
1.70
2.60
2.10
3.40
6.70
5.30
6.70
1.00
1.20
1.60
2.40
2.80
4.00
4.00
5.80
5.30
5.30
6.60
6.50
0.50
0.60
0.80
1.20
1.70
2.00
2.90
2.40
3.70
7.00
5.60
7.00
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow solder
processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform qualification
testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
Soldering Process
Recommended Soldering Technique:
• Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206
• All other EIA case sizes are limited to solder reflow only
Recommended Soldering Profile:
• KEMET recommends following the guidelines outlined in IPC/JEDEC J–STD–020
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Terminal Strength
Board Flex
Reference
JIS–C–6429
JIS–C–6429
Test or Inspection Method
Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Appendix 2, Note: 2 mm (min) for all except 3 mm for C0G.
Magnification 50 X. Conditions:
a) Method B, 4 hours @ 155°C, dry heat @ 235°C
b) Method B @ 215°C category 3
Solderability
J–STD–002
c) Method D, category 3 @ 260°C
Temperature Cycling
Biased Humidity
JESD22 Method JA–104
MIL–STD–202 Method 103
1,000 Cycles (-55°C to +125°C), Measurement at 24 hours. +/- 2 hours after test conclusion.
Load Humidity: 1,000 hours 85°C/85% RH and Rated Voltage. Add 100 K ohm resistor.
Measurement at 24 hours. +/- 2 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours. +/- 2 hours after test conclusion.
t = 24 hours/cycle. Steps 7a and 7b not required. Unpowered.
Measurement at 24 hours. +/- 2 hours after test conclusion.
-55°C/+125°C. Note: Number of cycles required-300, maximum transfer time-20 seconds, dwell
time-15 minutes. Air-Air.
Moisture Resistance
Thermal Shock
MIL–STD–202 Method 106
MIL–STD–202 Method 107
MIL–STD–202 Method 108
/EIA–198
High Temperature Life
1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 2 X rated voltage applied.
Storage Life
MIL–STD–202 Method 108 150°C, 0 VDC, for 1,000 hours.
Mechanical Shock
MIL–STD–202 Method 213 Figure 1 of Method 213, Condition F.
Resistance to Solvents MIL–STD–202 Method 215 Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in other
environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres, and long term
storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp, and tape peel force may
increase. KEMET recommends that maximum storage temperature not exceed 40ºC, and maximum storage humidity not exceed 70%
relative humidity. Temperature fluctuations should be minimized to avoid condensation on the parts, and atmospheres should be free of
chlorine and sulfur bearing compounds. For optimized solderability, chip stock should be used promptly, preferably within 1.5 years of
receipt.
Construction
Reference
Item
Material
A
B
C
D
Finish
100% Matte Sn
Termination
System
Barrier Layer
Base metal
Ni
Cu
Ni
Inner Electrode
Dielectric Material
E
BaTiO3
Note: Image is exaggerated in order to clearly identify all components of construction.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA
Standard 481. This packaging system is compatible with all tape fed automatic pick and place systems. See Table 2 for details on
reeling quantities for commercial chips.
Bar Code Label
Anti-Static Reel
®
Embossed Plastic* or
Punched Paper Carrier.
Chip and KPS Orientation in Pocket
(except 1825 Commercial, and 1825 and 2225 Military)
KEMET
Sprocket Holes
Embossment or Punched Cavity
8 mm, 12 mm
or 16 mm Carrier Tape
Anti-Static Cover Tape
(.10 mm (.004") Max Thickness)
178 mm (7.00")
or
330 mm (13.00")
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 – Carrier Tape Configuration (mm)
EIA Case Size
01005 – 0402
0603 – 1210
Tape Size (W)*
Lead Space (P1)*
8
8
2
4
1805 – 1808
12
12
12
16
8
4
≥ 1812
8
KPS 1210
8
KPS 1812 & 2220
Array 0508 & 0612
12
4
*Refer to Figure 1 for W and P1 carrier tape reference locations.
*Refer to Table 6 for tolerance specifications.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012
9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
T
T
P2
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
2
E
1
Po
ØDo
Ao
F
Ko
W
E
2
B
1
Bo
S
1
P
1
T
1
Embossment
For cavity size,
see Note 1 Table 5
Center Lines of Cavity
ØD
1
Cover Tape
is for tape feeder reference only,
including draft concentric about B
B
1
o
.
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
D1 Minimum
Note 1
1.0
(0.039)
R Reference S1 Minimum
T
T1
Tape Size
8 mm
D0
E1
P0
P2
Note 2
Note 3
Maximum. Maximum.
25.0
(0.984)
1.5 +0.10/-0.0 (0.059
+0.004/-0.0)
1.75 ±0.10
4.0 ±0.10
2.0 ±0.05
0.600
(0.024)
0.600
(0.024)
0.100
(0.004)
12 mm
16 mm
(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)
1.5
(0.059)
30
(1.181)
Variable Dimensions — Millimeters (Inches)
B1 Maximum
Note 4
4.35
(0.171)
Tape Size
8 mm
Pitch
E2 Minimum
F
P1
T2 Maximum W Maximum
A0,B0 & K0
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002) (0.157 ±0.004)
4.0 ±0.10
2.5
8.3
(0.327)
Single (4 mm)
(0.098)
Single (4 mm) &
Double (8 mm)
8.2
10.25
5.5 ±0.05
8.0 ±0.10
4.6
12.3
12 mm
16 mm
Note 5
(0.323)
(0.404)
(0.217 ±0.002) (0.315 ±0.004)
(0.181)
(0.484)
12.1
(0.476)
14.25
(0.561)
5.5 ±0.05 8.0 ±0.10
(0.217 ±0.002) (0.315 ±0.004)
4.6
(0.181)
16.3
(0.642)
Triple (12 mm)
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and
hole location shall be applied independent of each other.
2. The tape with or without components shall pass around R without damage (see Figure 5).
3. If S1< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see Figure 4).
(e) for KPS Series product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
T
P2
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
E
1
Po
ØDo
0
A
F
W
2
E
0
B
Bottom Cover Tape
P
1
G
Cavity Size,
See
1
T
1
T
Top Cover Tape
Center Lines of Cavity
Note 1, Table 7
Bottom Cover Tape
User Direction of Unreeling
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
R Ref.
Note 2
Tape Size
8 mm
D0
E1
P0
P2
T1Max
G Minimum
1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002) (0.004) Maximum
0.10
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
Pitch
E2 Minimum
F
P1
T Maximum
W Maximum
A0 B0
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
8.3
(0.327)
8.3
Half (2 mm)
Single (4 mm)
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
1.1
(0.098)
Note 1
8 mm
(0.157 ±0.004)
(0.327)
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 5).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 Kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
8 mm
Peel Strength
0.1 to 1.0 Newton (10 to 100 gf)
0.1 to 1.3 Newton (10 to 130 gf)
12 and 16 mm
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be 165° to 180°
from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of 300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 2 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Maximum
°
°
T
s
Width (mm) Rotation (
)
8,12
16-200
20
10
Bo
Tape
Maximum
°
S
Width (mm) Rotation (
)
8,12
16-56
72-200
20
10
5
Typical Component Centerline
Ao
Figure 3 – Maximum Lateral Movement
Figure 4 – Bending Radius
Embossed
Carrier
Punched
Carrier
8 mm & 12 mm Tape
16 mm Tape
0.5 mm maximum
0.5 mm maximum
1.0 mm maximum
1.0 mm maximum
R
Bending
Radius
R
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3 (Includes
flange distortion
at outer edge)
Access Hole at
Slot Location
(Ø 40 mm min.)
W
2 (Measured at hub)
D
(See Note)
A
N
C
(Arbor hole
W
1 (Measured at hub)
diameter)
If present,
tape slot in core
for tape start:
2.5 mm min. width x
10.0 mm min. depth
B
(see Note)
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
8 mm
A
B Minimum
C
D Minimum
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/-0.2
(0.521 +0.02/-0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
N Minimum
W1
W2 Maximum
W3
8.4 +1.5/-0.0
(0.331 +0.059/-0.0)
14.4
(0.567)
50
(1.969)
12.4 +2.0/-0.0
18.4
Shall accommodate tape width
without interference
12 mm
16 mm
(0.488 +0.078/-0.0)
(0.724)
16.4 +2.0/-0.0
(0.646 +0.078/-0.0)
22.4
(0.882)
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Embossed Carrier
Carrier Tape
Punched Carrier
8 mm & 12 mm only
Round Sprocket Holes
START
END
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
100 mm Min.
Leader
Trailer
160 mm minimum,
Components
400 mm Minimum,
Top Cover Tape
Figure 8 – Maximum Camber
Elongated sprocket holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 9 – Bulk Cassette Packaging (Ceramic Chips Only)
Meets Dimensional Requirements IEC-286 and EIAJ 7201
Unit mm *Reference
53 3*
10*
1.5 ± 00.1
2.0 ± 00.1
3.0 ± 00.2
5 0*
110 ± 0.7
Table 9 – Capacitor Dimensions for Bulk Cassette
Cassette Packaging – Millimeters
EIA Size Metric Size
S Separation
minimum
0.3
Number of
Pcs/Cassette
L Length
W Width
B Bandwidth
T Thickness
Code
Code
0402
1005
1.0 ± 0.05
1.6 ± 0.07
0.5 ± 0.05
0.8 ± 0.07
0.2 to 0.4
0.2 to 0.5
0.5 ± .05
0.8 ± .07
50,000
0603
1608
0.7
15,000
Table 10 – Capacitor Marking
Laser marking is available as an extra-cost option for most KEMET ceramic chips. Such marking is two sided, and includes a K to
identify KEMET, followed by two characters (per EIA-198) to identify the capacitance value. Note that marking is not available for any
Y5V chip. ln addition, the 0603 marking option is limited to the K only. (Marking Optional – Not Available for 0402 Size)
N u m e r a l
Alpha
Character
Capacitance (pF) For Various Numeral Identifiers
9
0
1
2
3
4
5
6
7
A
B
C
D
E
F
G
H
J
0.1
1
10
11
12
13
15
16
18
20
22
24
27
30
33
36
39
43
47
51
56
62
68
75
82
91
25
35
40
45
50
60
70
80
90
100
110
120
130
150
160
180
200
220
240
270
300
330
360
390
430
470
510
560
620
680
750
820
910
250
350
400
450
500
600
700
800
900
1000
1100
1200
1300
1500
1600
1800
2000
2200
2400
2700
3000
3300
3600
3900
4300
4700
5100
5600
6200
6800
7500
8200
9100
2500
3500
4000
4500
5000
6000
7000
8000
9000
10000
11000
12000
13000
15000
16000
18000
20000
22000
24000
27000
30000
33000
36000
39000
43000
47000
51000
56000
62000
68000
75000
82000
91000
25000
35000
40000
45000
50000
60000
70000
80000
90000
100000
110000
120000
130000
150000
160000
180000
200000
220000
240000
270000
300000
330000
360000
390000
430000
470000
510000
560000
620000
680000
750000
820000
910000
250000
350000
400000
450000
500000
600000
700000
800000
900000
1000000
1100000
1200000
1300000
1500000
1600000
1800000
2000000
2200000
2400000
2700000
3000000
3300000
3600000
3900000
4300000
4700000
5100000
5600000
6200000
6800000
7500000
8200000
9100000
2500000
3500000
4000000
4500000
5000000
6000000
7000000
8000000
9000000
10000000
11000000
12000000
13000000
15000000
16000000
18000000
20000000
22000000
24000000
27000000
30000000
33000000
36000000
39000000
43000000
47000000
51000000
56000000
62000000
68000000
75000000
82000000
91000000
25000000
35000000
40000000
45000000
50000000
60000000
70000000
80000000
90000000
0.11
0.12
0.13
0.15
0.16
0.18
0.2
0.22
0.24
0.27
0.3
0.33
0.36
0.39
0.43
0.47
0.51
0.56
0.62
0.68
0.75
0.82
0.91
0.25
0.35
0.4
1.1
1.2
1.3
1.5
1.6
1.8
2
2.2
2.4
2.7
3
3.3
3.6
3.9
4.3
4.7
5.1
5.6
6.2
6.8
7.5
8.2
9.1
2.5
3.5
4
Example shown is 1,000 pF capacitor
K
L
M
N
P
Q
R
S
T
U
V
W
X
Y
Z
a
b
d
e
f
m
n
t
0.45
0.5
0.6
0.7
0.8
4.5
5
6
7
8
y
0.9
9
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
KEMET Corporation
World Headquarters
Europe
Asia
Southern Europe
Geneva, Switzerland
Tel: 41-22-715-0100
Northeast Asia
Hong Kong
Tel: 852-2305-1168
2835 KEMET Way
Simpsonville, SC 29681
Paris, France
Tel: 33-1-4646-1009
Shenzhen, China
Tel: 86-755-2518-1306
Mailing Address:
P.O. Box 5928
Greenville, SC 29606
Sasso Marconi, Italy
Tel: 39-051-939111
Beijing, China
Tel: 86-10-5829-1711
www.kemet.com
Tel: 864-963-6300
Fax: 864-963-6521
Milan, Italy
Tel: 39-02-57518176
Shanghai, China
Tel: 86-21-6447-0707
Corporate Offices
Fort Lauderdale, FL
Tel: 954-766-2800
Rome, Italy
Tel: 39-06-23231718
Taipei, Taiwan
Tel: 886-2-27528585
Madrid, Spain
Tel: 34-91-804-4303
North America
Southeast Asia
Singapore
Tel: 65-6586-1900
Southeast
Lake Mary, FL
Tel: 407-855-8886
Central Europe
Landsberg, Germany
Tel: 49-8191-3350800
Penang, Malaysia
Tel: 60-4-6430200
Northeast
Wilmington, MA
Tel: 978-658-1663
Bangalore, India
Tel: 91-806-53-76817
Dortmund, Germany
Tel: 49-2307-3619672
West Chester, PA
Tel: 610-692-4642
Kwidzyn, Poland
Tel: 48-55-279-7025
Central
Novi, MI
Tel: 248-994-1030
Northern Europe
Bishop’s Stortford, United Kingdom
Tel: 44-1279-757201
Carmel, IN
Tel: 317-706-6742
Weymouth, United Kingdom
Tel: 44-1305-830747
West
Milpitas, CA
Tel: 408-433-9950
Coatbridge, Scotland
Tel: 44-1236-434455
Mexico
Zapopan, Jalisco
Tel: 52-33-3123-2141
Färjestaden, Sweden
Tel: 46-485-563934
Espoo, Finland
Tel: 358-9-5406-5000
Note: KEMET reserves the right to modify minor details of internal and external construction at any time in the interest of product improvement. KEMET does not
assume any responsibility for infringement that might result from the use of KEMET Capacitors in potential circuit designs. KEMET is a registered trademark of
KEMET Electronics Corporation.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Other KEMET Resources
Tools
Resource
Location
Configure A Part: CapEdge
SPICE & FIT Software
http://capacitoredge.kemet.com
http://www.kemet.com/spice
http://www.kemet.com/keask
Search Our FAQs: KnowledgeEdge
Product Information
Resource
Location
Products
Technical Resources (Including Soldering Techniques)
RoHS Statement
http://www.kemet.com/products
http://www.kemet.com/technicalpapers
http://www.kemet.com/rohs
Quality Documents
http://www.kemet.com/qualitydocuments
Product Request
Resource
Location
http://www.kemet.com/sample
http://www.kemet.com/kits
Sample Request
Engineering Kit Request
Contact
Resource
Location
Website
Contact Us
Investor Relations
Call Us
www.kemet.com
http://www.kemet.com/contact
http://www.kemet.com/ir
1-877-MyKEMET
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http://twitter.com/kemetcapacitors
Disclaimer
All product specifications, statements, information and data (collectively, the “Information”) are subject to change without notice.
All Information given herein is believed to be accurate and reliable, but is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on our knowledge of typical operating conditions for such applications, but are not intended to constitute – and we
specifically disclaim – any warranty concerning suitability for a specific customer application or use. This Information is intended for use only by customers who have the requisite
experience and capability to determine the correct products for their application. Any technical advice inferred from this Information or otherwise provided by us with reference to the
use of our products is given gratis, and we assume no obligation or liability for the advice given or results obtained.
Although we design and manufacture our products to the most stringent quality and safety standards, given the current state of the art, isolated component failures may still occur.
Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards (such as installation of protective circuitry or
redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or property damage.
Although all product-related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicated or that other measures may not
be required.
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Digitally signed by omjbfl1
DN: dc=com, dc=KEMET, ou=Sales, ou=USA, ou=FTLAUD, cn=omjbfl1
Date: 2012.05.08 08:43:44 -04'00'
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/7/2012 18
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C1206C106K4RACAUTO
Ceramic, AUTO-(CxxxxC-AUTO), 10 uF, 10%, 16 V, 1206, X7R, SMD, MLCC, Temperature Stable, Automotive Grade
KEMET
C1206C106K4RACTU_17
Ceramic, Commercial-(CxxxxC), 10 uF, 10%, 16 V, 1206, X7R, SMD, MLCC, Temperature Stable, Class II
KEMET
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