LD5525GN [LEADTREND]
Multi-Mode PWM Controller of Flyback with Integrated BNI/BNO and Protection;
| 型号： | LD5525GN |
| 厂家： | 
Leadtrend Technology |
| 描述： | Multi-Mode PWM Controller of Flyback with Integrated BNI/BNO and Protection |
| 文件： | 总16页 (文件大小：734K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LD5525
06/30/2015
Multi-Mode PWM Controller of Flyback with
Integrated BNI/BNO and Protection
REV. 00
Features
General Description
Secondary-side feedback control with
In order to enhance the efficiency performance, the
LD5525 integrates the multi-mode PWM controller,
which consists of Quasi-Resonant (QR) PWM control for
light load condition and Continue Conduction Mode
(CCM) for heavy load condition. Moreover, the QR
controller not only gains the system performance, but
also brings the worse EMI capability, while the
frequency swapping function of LD5525 can reduce the
EMI emission of SMPS and helps the power circuit
designers to simply deal with EMI filter and saves
several component and developing time.
quasi-resonant operation
Low Startup Current (<3A)
0.5mA Ultra-low operating current at light load
Current Mode Control with Cycle-by-Cycle Current
Limit
Green Mode Control
UVLO (Under Voltage Lockout)
LEB (Leading-Edge Blanking) on CS Pin
VCC OVP (Over Voltage Protection)
Adj. OVP (Over Voltage Protection) on FB pin.
Adj. UVP (Under Voltage Protection) on FB pin.
Adjustable Brown in/out on FB pin.
OLP (Over Load Protection)
The LD5525 is implemented in SOT-26 package, and
includes the comprehensive protection function, such as
Over Load Protection (OLP), Over Voltage Protection
(OVP), Output Short Circuit Protection (OSCP) and
External OTP (Over Temperature Protection) on
CS Pin
internal
Over
Temperature
Protection
(OTP).
Internal OTP (Over Temperature Protection)
Gate Source/Sink Capability: 250mA/-500mA
Furthermore, the programmable Brown-in/out Protection
is built-in.
Applications
Switching AC/DC Adaptor
Typical Application
DC
Output
AC
input
EMI
Filter
VCC
OUT
CS
FB
LD5525
photocoupler
COMP
GND
NTC
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Pin Configuration
SOT-26 (TOP VIEW)
DIP-8 (TOP VIEW)
OUT VCC
CS
8
7
6
5
6
1
5
4
25
YWt
TOP MARK
YYWWPP
pp
2
3
1
2
3
4
GND COMP FB
YY, Y : Year code (D: 2004, E: 2005…..)
WW, W : Week code
PP
T25
: Production code
: LD5525
Ordering Information
Part number
Package
TOP MARK
YWt/25
Shipping
LD5525 GL
LD5525 GN
SOT-26
DIP-8
(Green Package)
(Green Package)
3000 /tape & reel
3600 /tube /Carton
LD5525 GN
The LD5525 is ROHS compliant/Green Packaged.
Protection Mode
Switching
VCC OVP
FB_OVP
FB_UVP
OLP
BNI/BNO
CS_OTP
Freq.
85kHz/65kHz Auto recovery Auto recovery Auto recovery/80ms Auto recovery/80ms
Auto recovery
Auto recovery
Pin Descriptions
PIN
Pin
NAME
FUNCTION
(SOT-26)
(DIP-8)
GND
COMP
FB
1
2
3
4
5
6
8
7
5
4
2
1
3
6
Ground
Output of the error amplifier for voltage compensation
Auxiliary voltage sense, brown in/out and Quasi Resonant detection
CS
Current sense pin, connect to sense the MOSFET current
Supply voltage pin
VCC
OUT
NC
Gate drive output to drive the external MOSFET
NC
2
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Block Diagram
VCC
UVLO
OVP
Comparator
28.5V
OVP
Comparator
internal bias
& Vref
VCC OK
16V/7.5V
Vref OK
Internal OTP
Protection
Driver
Stage
PG
OUT
15V
Oscillator
Vbias
Counter
Q
S
R
QRD
QRD
Time-Out 2
Gate-off
Time-Out 1
4R
COMP
R
OCP
Comparator
OLP
Comparator
+
Slope
Vcs_limit
Compensation
+
OLP
LEB
CS
VOLP
Over Current
Compensation
BNI/BNO
Detection
FB
OLP
OVP
FB_OVP
Output Voltage
Detection
Protection Logic
Protection
FB_UVP
QRD
Detection
QRD
GND
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Absolute Maximum Ratings
Supply Voltage VCC,
-0.3V ~ 30V
-0.3V ~ VCC
-0.3V ~ 7V
-20C ~ 85C
-40C ~ 125C
-65C ~ 150C
200C/W
OUT
COMP, FB, CS
Operating Ambient Temperature
Operating Junction Temperature
Storage Temperature Range
Package Thermal Resistance (SOT-26, θJA)
Package Thermal Resistance (DIP-8, θJA)
Power Dissipation (SOT-26, at Ambient Temperature = 85C)
Power Dissipation (DIP-8, at Ambient Temperature = 85C)
Lead temperature (Soldering, 10sec)
ESD Voltage Protection, Human Body Model
ESD Voltage Protection, Machine Model
Gate Output Current
100C/W
200mW
400mW
260C
2.5 KV
250 V
250mA/-500mA
Caution:
Stress exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stress above Recommended Operating Conditions may affect
device reliability
Recommended Operating Conditions
Item
Operating Ambient Temperature
Operating Junction Temperature
Supply VCC Voltage
Min.
-40
-40
8.0
3.3
400K
1
Max.
85
Unit
C
C
V
125
26.5
10
VCC Capacitor
F
Start-up resistor Value (AC Side, Half Wave)
Comp Pin Capacitor
2M
10
nF
pF
CS Pin Capacitor Value
Note:
47
470
1. It’s essential to connect VCC pin with a SMD ceramic capacitor (0.1F ~ 0.47F) to
filter out the undesired switching noise for stable operation. This capacitor should be
placed close to IC pin as possible
2. It’s also essential to connect a capacitor to COMP to filter out the undesired switching
noise for stable operation.
3. The small signal components should be placed close to IC pin as possible.
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Electrical Characteristics
(TA = +25oC unless otherwise stated, VCC=15.0V)
PARAMETER
Supply Voltage (VCC Pin)
Startup Current
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
ICC_ST
ICC_OP1
ICC_OP2
ICC_OPA1
3
A
mA
mA
mA
VCOMP=0V, OUT=1nF
VCOMP=3V, OUT=1nF
OVP/OLP Tripped/ Auto
Brown in / Start-up
0.5
1.5
0.5
Operating Current
(with 1nF load on OUT pin)
ICC_OPA3
0.75
mA
(Before the first pulse)
Brown out / Auto
ICC_OPA4
VCC_OFF
0.45
7.5
16
mA
V
UVLO(OFF)
7.0
15
8.0
17
UVLO(ON)
VCC_ON
V
VCC OVP Level
VCC_OVP
NTD_VCCOVP
27.5
28.5
8
29.5
V
VCC OVP de-bounce time
Voltage Feedback (COMP Pin)
Short Circuit Current
Open Loop Voltage
Maximum Frequency Mode
Green Mode Threshold
Cycle
VCOMP=0V
ICOMP
VCOMP_OPEN
VCOMP_Fmax
VG
0.1
4.9
0.125
5.2
0.15
5.5
mA
V
(1)
(1)
2.2
V
1.8
V
VZDC
1.4
1.5
1.6
V
Burst Mode
Hysteresis
VZDCH
100
mV
Min.
OCP
OCP
Compensation
Compensation
(1)
IFB =IBNI
IOCP_MIN
47.5
uA
Current
Max.
(1)
IOCP_MAX
IGM
200
200
uA
uA
Current
Green mode operation switch
Current Sensing (CS Pin)
IFB <IGM
IFB >IGM
VCS_LIMIT_LL
VCS_LIMIT_HL
TLEB
0.49
0.54
250
0.52
0.57
350
0.55
0.60
450
V
V
Maximum Input Voltage
Leading Edge Blanking Time
Internal Slope Compensation
Delay to Output
ns
*ton>3us
(Linearly increase), (1)
to
DMAX.
VSLP_L
TPD
170
80
mV
ns
5
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PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
QRD (Quasi Resonant Detection, FB Pin)
OVP Trip voltage Level
VFB_OVP
NTFB_OVP
VFB_UVP
VQRD
3.4
3.5
8
3.6
V
Cycle
V
OVP De-bounce Cycle
(1)
UVP Trip voltage Level
1
(1)
QRD Trip Level
100
100
5
mV
ns
(1)
QRD Delay Time
TQRD
QR Mode Time Out 1
Max Frequency Clamp Time
Out 2
TOUT1
s
TOUT2
100
150
200
s
BNO Protection (FB Pin)
Brown In Trip Level
Brown Out Trip Level
BNO_hys
IBNI
85
79
6
95
85
101.5
93.5
A
A
A
ms
IBNO
IBNO_HYS
TDB_BNO
60
Brown Out De-bounce Time
OTP (Over Temperature, CS Pin)
CS OTP Level
VCOMP=3V
VCSOTP
0.5
8
V
TD_CSOTP
CS OTP de-bounce time
Cycle
Oscillator for Switching Frequency
IFB <IGM
FQR_MAX_LL
FQR_MAX_HL
FCCM_LL
121
79
130
85
85
65
±6
25
3
139
91
kHz
kHz
kHz
kHz
%
QR Maximum Frequency
IFB >IGM
IFB <IGM
IFB >IGM
(1)
(1)
,
,
79
91
CCM Frequency
FCCM_HL
60
70
Frequency Swapping
Green Mode Frequency
Temp. Stability
FSW_MOD
FSW_GREEN
FSW_TS
27
5
kHz
%
Voltage Stability
VCC =9V~24V
FSW_VS
1
%
Maximum ON Time
Maximum On Time
TON_MAX
15
s
Gate Drive Output (OUT Pin)
Output Low Level
VCC =15V, Io=20mA
VCC =15V, Io=20mA
VCC =15V CL=1000pF
VCC =15V CL =1000pF
VCC =18V
1
V
V
VOL
VOH
Tr
Output High Level
Rising Time
8
13
200
80
350
150
ns
ns
V
Falling Time
Tf
Output High Clamp Level
VO_CLAMP
13.5
6
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PARAMETER
Soft Start
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
VCS_OFF from 0.2V to
0.5V
Soft Start Time
TSS
5
ms
Open Loop Protection
OLP Trip Level
VOLP
4.3
72
4.5
80
4.7
88
V
OLP delay time
ms
After soft-start
TD_OLP
On Chip OTP (Over Temperature)
OTP Level
(1,2)
(1,2)
TINOTP
140
30
C
C
OTP Hysteresis
TINOTP_HYS
Notes:
1. Guaranteed by design.
2. The threshold temperature for enabling the output again and resetting the latch after OTP has been activated.
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Typical Performance Characteristics
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Application Information
Operation Overview
current and to charge the capacitor C1. Whenever the
VCC voltage is high enough to turn on the LD5525 and
further to deliver the gate drive signal, the supply current
is provided from the auxiliary winding of the transformer.
The LD5525 is built in the multi-mode PWM controller, in
which operates a constant frequency to achieve the CCM
as heavy load. For demanding higher power efficiency
and power-saving in light load condition, the LD5525
implements QR function to allow the valley switching and
accomplish zero voltage switching (ZVS). Under different
load conditions, LD5525 provides the different solutions
for achieving higher efficiency and performance.
Lower startup current requirement on the PWM controller
will help to increase the value of R1 and then reduce the
power consumption on R1. By using CMOS process and
the special circuit design, the maximum startup current of
LD5525 is only 3A. If a higher resistance value of R1 is
chosen, it usually takes more time to start up. To select
the value of R1 and C1 carefully will optimize the power
consumption and startup time.
Under Voltage Lockout (UVLO)
An UVLO comparator is implemented in it to detect the
voltage on the VCC pin. It would assure the supply
voltage enough to turn on the LD5525 PWM controllers
and further to drive the power MOSFET. As shown in Fig.
7, a hysteresis is built in to prevent the shutdown from the
voltage dip during startup. The turn-on and turn-off
threshold level are set at 16.0V and 7.5V, respectively.
EMI
Filter
AC
input
Cbulk
D1
C1
R1
Vcc
UVLO(on)
UVLO(off)
VCC
OUT
CS
LD5525
t
GND
I(Vcc)
operating current
(~ mA)
Fig. 8
startup current
(~uA)
Q-R Mode Detection
t
The transformer will be demagnetized after the main
power MOSFET turns off. A quasi resonant signal will be
detected from auxiliary winding by FB pin through the
external resister.
Fig. 7
Startup Current and Startup Circuit
The typical startup circuit to generate the LD5525 VCC is
shown in Fig. 8. During the startup transient, the VCC is
lower than the UVLO threshold thus there is no gate pulse
produced from LD5525 to drive power MOSFET.
Therefore, the current through R1 will provide the startup
As soon as the current of the secondary side diode is
down to zero during MOSFET-off period, the transformer’s
core is demagnetized completely. VDS of MOSFET will
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resonate in discontinuous current mode. The resonance
frequency (FQR) will be obtained as below.
However, the total pulse width of the turn-on spike is
decided by the output power, circuit design and PCB
layout. It is strongly recommended to adopt a smaller
R-C filter (as shown in figure 10) for higher power
application to avoid the CS pin being damaged by the
negative turn-on spike.
1
F
(HZ)
QR
2 L C
m
R
L
Inductance of primary winding
Resonance equivalent parasitic capacitance
M
C
R
If VDS voltage falls to resonant valley level from max
plateau value, the QRD comparator will be tripped while
FB pin voltage is close to 100mV.
Output Stage and Maximum ON Time
An output stage of a CMOS buffer, with typical 250mA
driving capability, is incorporated to drive a power
MOSFET directly. And the maximum on time of LD5525
is limited to 15us to limit the minimum frequency of the
system.
Voltage Feedback Loop
The voltage feedback signal is provided from the TL431 at
the secondary side through the photo-coupler to the
COMP pin of the LD5525. Similar to UC3842, the
LD5525 would without voltage offset to feed the voltage
divider at the ratio of RA and RB, that is,
Maximum Switching Frequency Clamp
According to the QR operation principle, the switching
frequency is inversely proportional to the output power.
Therefore, as the output power decreases, the switching
frequency can become rather high without limiting. The
maximum switching frequency of LD5525 is clamped at
65 kHz internally to provide the optimized operations by
considering the EMI performance, thermal treatment,
component sizes and transformer design.
RB
V
VCOMP
(PWMCOMPARATOR
)
RA RB
A pull-high resistor is embedded internally and therefore
no external one is required.
Current Sensing, Leading Edge Blanking
The typical current mode of PWM controller feedbacks
both current signal and voltage signal to close the control
loop and achieve regulation. The LD5525 detect the
primary MOSFET current from the CS pin, which is not
only for the peak current mode control but also for the
pulse-by-pulse current limit. The maximum voltage
threshold of the current sensing pin sets at 0.57V. From
above, the MOSFET peak current can be obtained from
below.
350ns
blanking
time
VCC
OUT
LD5525
0.57V
CS
IPEAK (MAX )
RCS
GND
A 350nS leading-edge blanking (LEB) time is included in
the input of CS pin to prevent the false-trigger from the
current spike. In the low power application, if the total
pulse width of the turn-on spike is less than 350nS and
the negative spike on the CS pin doesn’t exceed -0.3V, it
could remote the R-C filter (as shown in the figure 9).
Can be removed if the negative
spike is not over spec. (-0.3V).
Fig. 9
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Over Load Protection (OLP) – Auto
Recovery
To protect the circuit from damage due to over-load
condition and short or open-loop condition, the LD5525 is
implemented with smart OLP function. It also features
auto –recovery function, see Fig. 12 for the waveform. In
case of fault condition, the feedback system will force the
voltage loop toward the saturation and then pull the
voltage high on COMP pin (VCOMP). When the VCOMP
ramps up to the OLP threshold of 4.5V and continues over
OLP delay time, the protection will be activated and then
turn off the gate output to stop the switching of power
circuit.
VCC
OUT
LD5525
CS
GND
RC filter is needed whenever the negative
spike is exceed -0.3 V or the total spike
width is over 350 nS LEB period.
Fig. 10
Over Voltage Protection on VCC pin
With the protection mechanism, the average input power
will be minimized to remain the component temperature
and stress within the safe operating area.
(VCC OVP) – Auto Recovery
The VGS ratings of the nowadays power MOSFETs are
often limited up to max. 28.5V. To prevent the VGS from
the fault condition, LD5525 is implemented with an OVP
function on VCC. Whenever the VCC voltage is higher
than the OVP threshold voltage, the output gate drive
circuit will be shutdown simultaneously thus to stop the
switching of the power MOSFET until the next UVLO(ON).
VCC
UVLO(on)
UVLO(off)
OLP
UVLO(off)
OLP Reset
t
COMP
The VCC OVP function in LD5525 is an auto-recovery
type protection. The Fig. 11 shows its operation.
OLP delay time
4.5V
On the other hand, if the OVP condition is removed, the
VCC level will get back to normal level and the output will
automatically return to the normal operation.
OLP trip Level
t
OUT
VCC
Switching
Non-Switching
Switching
OVP Tripped
OVP Level
t
UVLO(on)
UVLO(off)
Fig. 12
t
OUT
Non-Switching
Switching
Switching
t
Fig.11
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Adjustable Over Current Compensation on
FB Pin
BNO function is implemented, while turns off the gate
signal after de-bounce time 60ms as BNO occurring, as
shown in Fig. 15. The relationship of input voltage and
BNI/BNO is expressed in following equation.
For compensating the differential input current from
high/low line conditions on current sensing resistor,
LD5525 mirrors a compensation current IOCP from IFB to
CS pin. The relationship of compensation current IOCP and
IFB is expressed by following equation and shown in Fig.
13.
푁푃
푉퐷퐶_퐵푁퐼
푉퐷퐶_퐵푁푂
=
=
∙ 퐼퐵푁퐼 ∙ 푅1
∙ 퐼퐵푁푂 ∙ 푅1
푁푎
푁푃
푁푎
IOCP = K × IFB
,where
K = 0.5
, where
VDC_BNI is predicted BNI DC value of input voltage
VDC_BNO is predicted BNO DC value of input voltage
IBNI is BNI trip current.
K is the mirror current ratio of FB pin, and the IOCP follows
to the input voltage.
IBNO is BNO trip current.
The compensation current IOCP supplies an offset voltage
by external resistor ROCP, which is series between the
current sensing resistor RS and CS pin. By selecting a
proper value of the resistor ROCP in series with the CS pin,
the amount of compensation can be adjusted.
Np is turns ration of primary-side winding
Na is turns ration of auxiliary winding
VCC
Va
R1
LD5525
FB
IOCP
VFB
R2
GND
200uA
Fig. 14
47.5uA
IFB
95uA
400uA
Fig. 13
Brown-In/
Brown-Out
Protection
(BNI/BNO) – Auto Recovery
The LD5525 integrate the brown in, brownout protection
and valley detection into FB pin. The auxiliary voltage
reflects a proportional bulk voltage during the on time. Fix
the internal current at the BNI and BNO, the BNI level
could be set by modulating the FB divided resistors and
auxiliary voltage, as shown in Fig. 14. For preventing the
abnormal condition of line voltage to causing damage,
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auto-recovery protection mode till the FB OVP status is
defused
Line Voltage
t
Under Voltage Protection on FB pin
(FB UVP) – Auto Recovery
IFB
In order to prevent output short situation, LD5525 is
implemented by FB_UVP. When the output load is
shorted to ground, the voltage suddenly decreases to zero,
which always reflects to auxiliary winding during the gate
off region. Therefore, as VFB is lower than 1V during gate
off region, and then the FB_UVP is triggered.
95uA
80uA
Normal Range
t
Vcc
UVLO(on)
UVLO(off)
t
Over Temperature Protection on CS pin
(CS OTP)- Auto Recovery
OUT
LD5525 is implemented over temperature protection on
CS pin which senses voltage to determine NTC status
during gate off region. As VCS is greater than 0.5V and
continues for 8 cycles, CS_OTP is triggered, than LD5525
is in auto recovery mode till the temperature drops to
setting work condition.
Non-
Switching
Non-Switching
Switching
t
Fig. 15
Over Voltage Protection on FB pin (FB
OVP) – Auto Recovery
An output overvoltage protection is implemented in the
LD5525. The auxiliary winding voltage can be reflected
from secondary winding, in which the FB pin voltage is
proportional to output voltage during the gate off time.
OVP is worked by sensing the auxiliary voltage via the
divided resistors R2, refereeing to Fig. 14. The equation of
FB OVP is shown as follows.
Oscillator and Switching Frequency
The LD5525 is implemented with Frequency Swapping
function which helps the power supply designers to both
optimize EMI performance and lower system cost.
Green Mode Operation
By using the green-mode control, the switching frequency
can be reduced under the light load condition. This feature
helps to improve the efficiency in light load conditions.
The green-mode control is Leadtrend Technology’s own
property.
푅1 ∙ 푉퐹퐵_푂푉푃
푅2 =
푉 − 푉퐹퐵_푂푉푃
푎
푁
푎 ꢀ
푉푂 + 푉퐹
푉 =
푎
푁
푆
Fault Protection
There are several critical protections integrated in the
LD5525 to prevent from damage to the power supply.
Those damages usually come from open or short
conditions on the pins of LD5525.
VFB_OVP is the FB pin OVP trip voltage level. Va is the
auxiliary winding voltage which reflects from the forward
voltage VF of Schottky diode and output voltage VO. NS is
turns ration of secondary-side winding.
In case under such conditions listed below, the gate
output will turn off immediately to protect the power circuit.
If VFB overs the FB OVP trip level, the internal counter
starts counting 8 cycles, and then LD5525 goes to
1.
2.
CS pin floating
COMP pin floating
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Package Information
SOT-26
Dimension in Millimeters
Dimensions in Inches
Symbol
Min
Max
Min
Max
A
B
C
D
F
H
I
2.692
1.397
-------
0.300
3.099
1.803
1.450
0.500
0.106
0.055
-------
0.012
0.122
0.071
0.057
0.020
0.95 TYP
0.037 TYP
0.080
0.050
2.600
0.300
0°
0.254
0.150
3.000
0.600
10°
0.003
0.002
0.102
0.012
0°
0.010
0.006
0.118
0.024
10°
J
M
θ
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LD5525
06/30/2015
Package Information
DIP-8
Dimension in Millimeters
Dimensions in Inches
Symbol
Min
Max
10.160
7.112
5.334
0.584
1.778
2.743
3.556
8.255
------
Min
Max
0.400
0.280
0.210
0.023
0.070
0.108
0.140
0.325
--------
A
B
C
D
E
F
I
9.017
6.096
-----
0.355
0.240
------
0.356
1.143
2.337
2.921
7.366
0.381
0.014
0.045
0.092
0.115
0.29
J
L
0.015
Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers
should verify the datasheets are current and complete before placing order.
15
Leadtrend Technology Corporation www.leadtrend.com.tw
LD5525-DS-00 June 2015
LD5525
06/30/2015
Revision History
Rev. Date
Change Notice
00
06/30/2015 Original Specification.
16
Leadtrend Technology Corporation www.leadtrend.com.tw
LD5525-DS-00 June 2015
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